23 AhciReadReg (  in AhciReadReg()  function
96   Data  = AhciReadReg (PciIo, Offset);  in AhciAndReg()
123   Data  = AhciReadReg (PciIo, Offset);  in AhciOrReg()
169     Value = AhciReadReg (PciIo, (UINT32) Offset) & MaskValue;  in AhciWaitMmioSet()
314   AhciWriteReg (PciIo, Offset, AhciReadReg (PciIo, Offset));  in AhciClearPortStatus()
320   AhciWriteReg (PciIo, Offset, AhciReadReg (PciIo, Offset));  in AhciClearPortStatus()
325   AhciWriteReg (PciIo, EFI_AHCI_IS_OFFSET, AhciReadReg (PciIo, EFI_AHCI_IS_OFFSET));  in AhciClearPortStatus()
372       Data   = AhciReadReg (PciIo, (UINT32)Offset);  in AhciDumpPortStatus()
436   Data   = AhciReadReg (PciIo, Offset);  in AhciDisableFisReceive()
780         PortTfd = AhciReadReg (PciIo, (UINT32) Offset);  in AhciPioTransfer()
823     PortTfd = AhciReadReg (PciIo, (UINT32) Offset);  in AhciPioTransfer()
1028   PortTfd = AhciReadReg (PciIo, (UINT32) Offset);  in AhciDmaTransfer()
1164   PortTfd = AhciReadReg (PciIo, (UINT32) Offset);  in AhciNonDataTransfer()
1211   Data   = AhciReadReg (PciIo, Offset);  in AhciStopCommand()
1263   Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);  in AhciStartCommand()
1283   PortStatus = AhciReadReg (PciIo, Offset);  in AhciStartCommand()
1287     StartCmd = AhciReadReg (PciIo, Offset);  in AhciStartCommand()
1293   PortTfd = AhciReadReg (PciIo, Offset);  in AhciStartCommand()
1348   Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);  in AhciReset()
1359     Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);  in AhciReset()
1897   Capability           = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);  in AhciCreateTransferDescriptor()
1904   PortImplementBitMap  = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET);  in AhciCreateTransferDescriptor()
2208   Capability2 = AhciReadReg (PciIo, AHCI_CAPABILITY2_OFFSET);  in AhciEnableDevSlp()
2219   PortCmd    = AhciReadReg (PciIo, Offset + EFI_AHCI_PORT_CMD);  in AhciEnableDevSlp()
2220   PortDevSlp = AhciReadReg (PciIo, Offset + AHCI_PORT_DEVSLP);  in AhciEnableDevSlp()
2498   Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);  in AhciModeInitialization()
2503   Value = AhciReadReg(PciIo, EFI_AHCI_GHC_OFFSET);  in AhciModeInitialization()
2536   PortImplementBitMap  = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET);  in AhciModeInitialization()
2576       Data = AhciReadReg (PciIo, Offset);  in AhciModeInitialization()
2613         Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_SSTS_DET_MASK;  in AhciModeInitialization()
2639         if (AhciReadReg(PciIo, Offset) != 0) {  in AhciModeInitialization()
2640           AhciWriteReg (PciIo, Offset, AhciReadReg(PciIo, Offset));  in AhciModeInitialization()
2644         Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_TFD_MASK;  in AhciModeInitialization()
2673       Data = AhciReadReg (PciIo, Offset);  in AhciModeInitialization()