Lines Matching refs:GPReg

42     : MCTargetStreamer(S), GPReg(Mips::GP), ModuleDirectiveAllowed(true) {  in MipsTargetStreamer()
129 GPReg = RegNo; in emitDirectiveCpLocal()
296 emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI); in emitGPRestore()
1137 emitAddu(RegNo, RegNo, GPReg, getABI().IsN64(), &STI); in emitDirectiveCpAdd()
1165 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1177 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1178 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1190 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1191 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1219 emitStoreWithImmOffset(Mips::SW, GPReg, Mips::SP, Offset, GetATReg, IDLoc, in emitDirectiveCpRestore()
1240 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI); in emitDirectiveCpsetup()
1243 emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI); in emitDirectiveCpsetup()
1256 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI); in emitDirectiveCpsetup()
1259 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(), in emitDirectiveCpsetup()
1273 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI); in emitDirectiveCpsetup()
1276 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(), in emitDirectiveCpsetup()
1280 emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI); in emitDirectiveCpsetup()
1293 Inst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpreturn()
1298 Inst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpreturn()