backend/arm/code-generator-arm.cc

364     __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));        \
367     __ load_instr(i.OutputRegister(0), i.TempRegister(1));                    \
368     __ store_instr(i.TempRegister(0), i.InputRegister(2), i.TempRegister(1)); \
369     __ teq(i.TempRegister(0), Operand(0));                                    \
381     __ load_instr(i.OutputRegister(0), i.TempRegister(1));                    \
384     __ store_instr(i.TempRegister(0), i.InputRegister(3), i.TempRegister(1)); \
385     __ teq(i.TempRegister(0), Operand(0));                                    \
394     __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));       \
397     __ load_instr(i.OutputRegister(0), i.TempRegister(1));                   \
398     __ bin_instr(i.TempRegister(0), i.OutputRegister(0),                     \
400     __ store_instr(i.TempRegister(2), i.TempRegister(0), i.TempRegister(1)); \
401     __ teq(i.TempRegister(2), Operand(0));                                   \
409     __ add(i.TempRegister(0), i.InputRegister(2), i.InputRegister(3)); \
412     __ ldrexd(r2, r3, i.TempRegister(0));                              \
413     __ instr1(i.TempRegister(1), r2, i.InputRegister(0), SBit::SetCC); \
414     __ instr2(i.TempRegister(2), r3, Operand(i.InputRegister(1)));     \
416     __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
417               i.TempRegister(0));                                      \
418     __ teq(i.TempRegister(3), Operand(0));                             \
426     __ add(i.TempRegister(0), i.InputRegister(2), i.InputRegister(3)); \
429     __ ldrexd(r2, r3, i.TempRegister(0));                              \
430     __ instr(i.TempRegister(1), r2, Operand(i.InputRegister(0)));      \
431     __ instr(i.TempRegister(2), r3, Operand(i.InputRegister(1)));      \
432     __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
433               i.TempRegister(0));                                      \
434     __ teq(i.TempRegister(3), Operand(0));                             \
520       Register shift = i.TempRegister(1);                \
539       Register shift = i.TempRegister(1);                 \
642             converter->TempRegister(instr->TempCount() - 1) == high) ||  in VerifyOutputOfAtomicPairInstr()
644             converter->TempRegister(instr->TempCount() - 1) == low);  in VerifyOutputOfAtomicPairInstr()
647   return (converter->TempRegister(instr->TempCount() - 2) == low &&  in VerifyOutputOfAtomicPairInstr()
648           converter->TempRegister(instr->TempCount() - 1) == high);  in VerifyOutputOfAtomicPairInstr()
792                                          i.TempRegister(0), i.TempRegister(1),  in AssembleArchInstruction()
793                                          i.TempRegister(2));  in AssembleArchInstruction()
992         lhs_register = i.TempRegister(0);  in AssembleArchInstruction()
1306           instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);  in AssembleArchInstruction()
1318           instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);  in AssembleArchInstruction()
1330           instr->OutputCount() >= 2 ? i.OutputRegister(1) : i.TempRegister(0);  in AssembleArchInstruction()
3321       __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));  in AssembleArchInstruction()
3322       __ uxtb(i.TempRegister(2), i.InputRegister(2));  in AssembleArchInstruction()
3324                                                i.TempRegister(2));  in AssembleArchInstruction()
3328       __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));  in AssembleArchInstruction()
3329       __ uxtb(i.TempRegister(2), i.InputRegister(2));  in AssembleArchInstruction()
3331                                                i.TempRegister(2));  in AssembleArchInstruction()
3334       __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));  in AssembleArchInstruction()
3335       __ uxth(i.TempRegister(2), i.InputRegister(2));  in AssembleArchInstruction()
3337                                                i.TempRegister(2));  in AssembleArchInstruction()
3341       __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));  in AssembleArchInstruction()
3342       __ uxth(i.TempRegister(2), i.InputRegister(2));  in AssembleArchInstruction()
3344                                                i.TempRegister(2));  in AssembleArchInstruction()
3347       __ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));  in AssembleArchInstruction()
3378         __ add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1));  in AssembleArchInstruction()
3379         __ ldrexd(r0, r1, i.TempRegister(0));  in AssembleArchInstruction()
3390           Register temp = i.TempRegister(0);  in AssembleArchInstruction()
3405       Register actual_addr = i.TempRegister(0);  in AssembleArchInstruction()
3408       Register tmp1 = i.TempRegister(1);  in AssembleArchInstruction()
3409       Register tmp2 = i.TempRegister(2);  in AssembleArchInstruction()
3446       __ add(i.TempRegister(0), i.InputRegister(2), i.InputRegister(3));  in AssembleArchInstruction()
3449       __ ldrexd(r6, r7, i.TempRegister(0));  in AssembleArchInstruction()
3450       __ strexd(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1),  in AssembleArchInstruction()
3451                 i.TempRegister(0));  in AssembleArchInstruction()
3452       __ teq(i.TempRegister(1), Operand(0));  in AssembleArchInstruction()
3459       __ add(i.TempRegister(0), i.InputRegister(4), i.InputRegister(5));  in AssembleArchInstruction()
3464       __ ldrexd(r2, r3, i.TempRegister(0));  in AssembleArchInstruction()
3469       __ strexd(i.TempRegister(1), i.InputRegister(2), i.InputRegister(3),  in AssembleArchInstruction()
3470                 i.TempRegister(0));  in AssembleArchInstruction()
3471       __ teq(i.TempRegister(1), Operand(0));  in AssembleArchInstruction()