execution/arm64/simulator-logic-arm64.cc

2111   VectorFormat vform_src = VectorFormatDoubleWidth(vform);  in shrn()
2120   VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform));  in shrn2()
2129   VectorFormat vformsrc = VectorFormatDoubleWidth(vform);  in rshrn()
2138   VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform));  in rshrn2()
2252   VectorFormat vformsrc = VectorFormatDoubleWidth(vform);  in sqshrn()
2261   VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform));  in sqshrn2()
2270   VectorFormat vformsrc = VectorFormatDoubleWidth(vform);  in sqrshrn()
2279   VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform));  in sqrshrn2()
2288   VectorFormat vformsrc = VectorFormatDoubleWidth(vform);  in sqshrun()
2297   VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform));  in sqshrun2()
2306   VectorFormat vformsrc = VectorFormatDoubleWidth(vform);  in sqrshrun()
2315   VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform));  in sqrshrun2()
2758   add(VectorFormatDoubleWidth(vform), temp, src1, src2);  in addhn()
2767   add(VectorFormatDoubleWidth(VectorFormatHalfLanes(vform)), temp, src1, src2);  in addhn2()
2776   add(VectorFormatDoubleWidth(vform), temp, src1, src2);  in raddhn()
2785   add(VectorFormatDoubleWidth(VectorFormatHalfLanes(vform)), temp, src1, src2);  in raddhn2()
2794   sub(VectorFormatDoubleWidth(vform), temp, src1, src2);  in subhn()
2803   sub(VectorFormatDoubleWidth(VectorFormatHalfLanes(vform)), temp, src1, src2);  in subhn2()
2812   sub(VectorFormatDoubleWidth(vform), temp, src1, src2);  in rsubhn()
2821   sub(VectorFormatDoubleWidth(VectorFormatHalfLanes(vform)), temp, src1, src2);  in rsubhn2()