Lines Matching refs:thresh_mult

322           rd->threshes[segment_id][bsize][i] = rd->thresh_mult[i] < thresh_max  in set_block_thresholds()
323 ? rd->thresh_mult[i] * t / 4 in set_block_thresholds()
680 rd->thresh_mult[i] = cpi->oxcf.mode == BEST ? -500 : 0; in vp9_set_rd_speed_thresholds()
683 rd->thresh_mult[THR_NEARESTMV] = 300; in vp9_set_rd_speed_thresholds()
684 rd->thresh_mult[THR_NEARESTG] = 300; in vp9_set_rd_speed_thresholds()
685 rd->thresh_mult[THR_NEARESTA] = 300; in vp9_set_rd_speed_thresholds()
687 rd->thresh_mult[THR_NEARESTMV] = 0; in vp9_set_rd_speed_thresholds()
688 rd->thresh_mult[THR_NEARESTG] = 0; in vp9_set_rd_speed_thresholds()
689 rd->thresh_mult[THR_NEARESTA] = 0; in vp9_set_rd_speed_thresholds()
692 rd->thresh_mult[THR_DC] += 1000; in vp9_set_rd_speed_thresholds()
694 rd->thresh_mult[THR_NEWMV] += 1000; in vp9_set_rd_speed_thresholds()
695 rd->thresh_mult[THR_NEWA] += 1000; in vp9_set_rd_speed_thresholds()
696 rd->thresh_mult[THR_NEWG] += 1000; in vp9_set_rd_speed_thresholds()
698 rd->thresh_mult[THR_NEARMV] += 1000; in vp9_set_rd_speed_thresholds()
699 rd->thresh_mult[THR_NEARA] += 1000; in vp9_set_rd_speed_thresholds()
700 rd->thresh_mult[THR_COMP_NEARESTLA] += 1000; in vp9_set_rd_speed_thresholds()
701 rd->thresh_mult[THR_COMP_NEARESTGA] += 1000; in vp9_set_rd_speed_thresholds()
703 rd->thresh_mult[THR_TM] += 1000; in vp9_set_rd_speed_thresholds()
705 rd->thresh_mult[THR_COMP_NEARLA] += 1500; in vp9_set_rd_speed_thresholds()
706 rd->thresh_mult[THR_COMP_NEWLA] += 2000; in vp9_set_rd_speed_thresholds()
707 rd->thresh_mult[THR_NEARG] += 1000; in vp9_set_rd_speed_thresholds()
708 rd->thresh_mult[THR_COMP_NEARGA] += 1500; in vp9_set_rd_speed_thresholds()
709 rd->thresh_mult[THR_COMP_NEWGA] += 2000; in vp9_set_rd_speed_thresholds()
711 rd->thresh_mult[THR_ZEROMV] += 2000; in vp9_set_rd_speed_thresholds()
712 rd->thresh_mult[THR_ZEROG] += 2000; in vp9_set_rd_speed_thresholds()
713 rd->thresh_mult[THR_ZEROA] += 2000; in vp9_set_rd_speed_thresholds()
714 rd->thresh_mult[THR_COMP_ZEROLA] += 2500; in vp9_set_rd_speed_thresholds()
715 rd->thresh_mult[THR_COMP_ZEROGA] += 2500; in vp9_set_rd_speed_thresholds()
717 rd->thresh_mult[THR_H_PRED] += 2000; in vp9_set_rd_speed_thresholds()
718 rd->thresh_mult[THR_V_PRED] += 2000; in vp9_set_rd_speed_thresholds()
719 rd->thresh_mult[THR_D45_PRED] += 2500; in vp9_set_rd_speed_thresholds()
720 rd->thresh_mult[THR_D135_PRED] += 2500; in vp9_set_rd_speed_thresholds()
721 rd->thresh_mult[THR_D117_PRED] += 2500; in vp9_set_rd_speed_thresholds()
722 rd->thresh_mult[THR_D153_PRED] += 2500; in vp9_set_rd_speed_thresholds()
723 rd->thresh_mult[THR_D207_PRED] += 2500; in vp9_set_rd_speed_thresholds()
724 rd->thresh_mult[THR_D63_PRED] += 2500; in vp9_set_rd_speed_thresholds()
728 static const int thresh_mult[2][MAX_REFS] = { in vp9_set_rd_speed_thresholds_sub8x8() local
734 memcpy(rd->thresh_mult_sub8x8, thresh_mult[idx], sizeof(thresh_mult[idx])); in vp9_set_rd_speed_thresholds_sub8x8()