1554     if (!Subtarget->isNeonAvailable()) {  in AArch64TargetLowering()
3764                                    !Subtarget->isNeonAvailable()))  in LowerXOR()
3974   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in LowerFP_EXTEND()
3990   if (useSVEForFixedLengthVectorVT(SrcVT, !Subtarget->isNeonAvailable()))  in LowerFP_ROUND()
4021   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()) ||  in LowerVectorFP_TO_INT()
4022       useSVEForFixedLengthVectorVT(InVT, !Subtarget->isNeonAvailable()))  in LowerVectorFP_TO_INT()
4276   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()) ||  in LowerVectorINT_TO_FP()
4277       useSVEForFixedLengthVectorVT(InVT, !Subtarget->isNeonAvailable()))  in LowerVectorINT_TO_FP()
4710   bool OverrideNEON = !Subtarget->isNeonAvailable();  in LowerMUL()
6341                                      !Subtarget->isNeonAvailable()))  in LowerOperation()
9038       useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable())) {  in LowerFCOPYSIGN()
9171       useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in LowerCTPOP_PARITY()
9785   if (useSVEForFixedLengthVectorVT(Ty, !Subtarget->isNeonAvailable())) {  in LowerSELECT()
12193   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in LowerVECTOR_SHUFFLE()
12366   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in LowerSPLAT_VECTOR()
12488       !DAG.getSubtarget<AArch64Subtarget>().isNeonAvailable())  in tryAdvSIMDModImm32()
12541       !DAG.getSubtarget<AArch64Subtarget>().isNeonAvailable())  in tryAdvSIMDModImm16()
12840                                    !Subtarget->isNeonAvailable()))  in LowerVectorOR()
12962   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable())) {  in LowerBUILD_VECTOR()
13408                                    !Subtarget->isNeonAvailable()))  in LowerCONCAT_VECTORS()
13447                                    !Subtarget->isNeonAvailable()))  in LowerINSERT_VECTOR_ELT()
13495   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in LowerEXTRACT_VECTOR_ELT()
13557       InVT.getSizeInBits() == 128 && Subtarget->isNeonAvailable())  in LowerEXTRACT_SUBVECTOR()
13560   if (useSVEForFixedLengthVectorVT(InVT, !Subtarget->isNeonAvailable())) {  in LowerEXTRACT_SUBVECTOR()
13748   if (useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in isShuffleMaskLegal()
13841                                    !Subtarget->isNeonAvailable()))  in LowerTRUNCATE()
13860         useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable()))  in LowerVectorSRA_SRL_SHL()
13873         useSVEForFixedLengthVectorVT(VT, !Subtarget->isNeonAvailable())) {  in LowerVectorSRA_SRL_SHL()
14023                                    !Subtarget->isNeonAvailable()))  in LowerVSETCC()
14201   bool OverrideNEON = !Subtarget->isNeonAvailable() ||  in LowerVECREDUCE()
15565   if (!Subtarget->isNeonAvailable() ||  in isLegalInterleavedAccessType()
17306   if (Subtarget->isNeonAvailable() && ISD::isNormalLoad(N0.getNode()) &&  in performIntToFpCombine()
17332   if (!Subtarget->isNeonAvailable())  in performFpToIntCombine()
17481           VT, !DAG.getSubtarget<AArch64Subtarget>().isNeonAvailable()))  in tryCombineToBSL()
26557   if (!Subtarget.isNeonAvailable() && !MinSVESize)  in GenerateFixedLengthSVETBL()
26770   if (MinSVESize || !Subtarget->isNeonAvailable())  in LowerFixedLengthVECTOR_SHUFFLEToSVE()