Lines Matching refs:RISCV
98 if (RISCV::VRM8RegClass.hasSubClassEq(RC)) in getVRLargestSuperClass()
99 return &RISCV::VRM8RegClass; in getVRLargestSuperClass()
100 if (RISCV::VRM4RegClass.hasSubClassEq(RC)) in getVRLargestSuperClass()
101 return &RISCV::VRM4RegClass; in getVRLargestSuperClass()
102 if (RISCV::VRM2RegClass.hasSubClassEq(RC)) in getVRLargestSuperClass()
103 return &RISCV::VRM2RegClass; in getVRLargestSuperClass()
104 if (RISCV::VRRegClass.hasSubClassEq(RC)) in getVRLargestSuperClass()
105 return &RISCV::VRRegClass; in getVRLargestSuperClass()
111 return RISCV::VRRegClass.hasSubClassEq(RC) || in isVectorRegClass()
112 RISCV::VRM2RegClass.hasSubClassEq(RC) || in isVectorRegClass()
113 RISCV::VRM4RegClass.hasSubClassEq(RC) || in isVectorRegClass()
114 RISCV::VRM8RegClass.hasSubClassEq(RC); in isVectorRegClass()
119 case RISCV::VRRegClassID: in getUndefInitOpcode()
120 return RISCV::PseudoRVVInitUndefM1; in getUndefInitOpcode()
121 case RISCV::VRM2RegClassID: in getUndefInitOpcode()
122 return RISCV::PseudoRVVInitUndefM2; in getUndefInitOpcode()
123 case RISCV::VRM4RegClassID: in getUndefInitOpcode()
124 return RISCV::PseudoRVVInitUndefM4; in getUndefInitOpcode()
125 case RISCV::VRM8RegClassID: in getUndefInitOpcode()
126 return RISCV::PseudoRVVInitUndefM8; in getUndefInitOpcode()
255 if (UseMO.getReg() == RISCV::NoRegister) { in processBasicBlock()