Lines Matching refs:VEX
218 VEX, VVVV, VEX_LIG, WIG;
223 VEX, VEX_LIG, Sched<[WriteFStore]>, WIG;
251 VEX, VEX_LIG, Sched<[WriteFLoad]>, WIG;
262 VEX, VEX_LIG, Sched<[WriteFLoad]>, WIG;
355 TB, VEX, WIG;
358 TB, PD, VEX, WIG;
361 TB, VEX, WIG;
364 TB, PD, VEX, WIG;
368 TB, VEX, VEX_L, WIG;
371 TB, PD, VEX, VEX_L, WIG;
374 TB, VEX, VEX_L, WIG;
377 TB, PD, VEX, VEX_L, WIG;
402 VEX, WIG;
406 VEX, WIG;
410 VEX, WIG;
414 VEX, WIG;
421 VEX, VEX_L, WIG;
425 VEX, VEX_L, WIG;
429 VEX, VEX_L, WIG;
433 VEX, VEX_L, WIG;
444 VEX, WIG;
448 VEX, WIG;
452 VEX, WIG;
456 VEX, WIG;
463 VEX, VEX_L, WIG;
467 VEX, VEX_L, WIG;
471 VEX, VEX_L, WIG;
475 VEX, VEX_L, WIG;
686 VEX, VVVV, WIG;
701 VEX, WIG;
706 VEX, WIG;
747 []>, VEX, WIG;
752 (iPTR 0))), addr:$dst)]>, VEX, WIG;
826 VEX, VVVV, Sched<[SchedWriteFShuffle.XMM]>, WIG;
833 VEX, VVVV, Sched<[SchedWriteFShuffle.XMM]>, WIG;
906 TB, XS, VEX, VEX_LIG;
910 TB, XS, VEX, REX_W, VEX_LIG;
914 TB, XD, VEX, VEX_LIG;
918 TB, XD, VEX, REX_W, VEX_LIG;
923 TB, XS, VEX, VEX_LIG;
927 TB, XS, VEX, REX_W, VEX_LIG;
931 TB, XD, VEX, VEX_LIG;
935 TB, XD, VEX, REX_W, VEX_LIG;
944 WriteCvtI2SS, SSEPackedSingle>, TB, XS, VEX, VVVV,
947 WriteCvtI2SS, SSEPackedSingle>, TB, XS, VEX, VVVV,
950 WriteCvtI2SD, SSEPackedDouble>, TB, XD, VEX, VVVV,
953 WriteCvtI2SD, SSEPackedDouble>, TB, XD, VEX, VVVV,
1077 WriteCvtSD2I, SSEPackedDouble>, TB, XD, VEX, VEX_LIG;
1080 WriteCvtSD2I, SSEPackedDouble>, TB, XD, VEX, REX_W, VEX_LIG;
1093 TB, XS, VEX, VVVV, VEX_LIG, SIMD_EXC;
1096 TB, XS, VEX, VVVV, VEX_LIG, REX_W, SIMD_EXC;
1099 TB, XD, VEX, VVVV, VEX_LIG;
1102 TB, XD, VEX, VVVV, VEX_LIG, REX_W, SIMD_EXC;
1153 WriteCvtSS2I, SSEPackedSingle>, TB, XS, VEX, VEX_LIG;
1157 TB, XS, VEX, VEX_LIG, REX_W;
1160 WriteCvtSS2I, SSEPackedDouble>, TB, XD, VEX, VEX_LIG;
1164 TB, XD, VEX, VEX_LIG, REX_W;
1220 WriteCvtSS2I, SSEPackedSingle>, TB, XS, VEX, VEX_LIG;
1223 WriteCvtSS2I, SSEPackedSingle>, TB, XS, VEX, REX_W, VEX_LIG;
1236 TB, VEX, Requires<[HasAVX, NoVLX]>, WIG;
1240 TB, VEX, VEX_L, Requires<[HasAVX, NoVLX]>, WIG;
1292 VEX, VVVV, VEX_LIG, WIG,
1298 TB, XD, VEX, VVVV, VEX_LIG, WIG,
1324 TB, XD, VEX, VVVV, VEX_LIG, WIG, Requires<[UseAVX]>,
1331 TB, XD, VEX, VVVV, VEX_LIG, WIG, Requires<[UseAVX]>,
1356 TB, XS, VEX, VVVV, VEX_LIG, WIG,
1362 TB, XS, VEX, VVVV, VEX_LIG, WIG,
1389 []>, TB, XS, VEX, VVVV, VEX_LIG, WIG,
1395 []>, TB, XS, VEX, VVVV, VEX_LIG, WIG, Requires<[HasAVX]>,
1530 VEX, Sched<[WriteCvtPS2I]>, WIG, SIMD_EXC;
1535 VEX, Sched<[WriteCvtPS2ILd]>, WIG, SIMD_EXC;
1540 VEX, VEX_L, Sched<[WriteCvtPS2IY]>, WIG, SIMD_EXC;
1545 VEX, VEX_L, Sched<[WriteCvtPS2IYLd]>, WIG, SIMD_EXC;
1567 VEX, Sched<[WriteCvtPD2I]>, WIG;
1573 (v4i32 (X86cvtp2Int (loadv2f64 addr:$src))))]>, VEX,
1581 VEX, VEX_L, Sched<[WriteCvtPD2IY]>, WIG;
1586 VEX, VEX_L, Sched<[WriteCvtPD2IYLd]>, WIG;
1613 VEX, Sched<[WriteCvtPS2I]>, WIG;
1618 VEX, Sched<[WriteCvtPS2ILd]>, WIG;
1623 VEX, VEX_L, Sched<[WriteCvtPS2IY]>, WIG;
1628 VEX, VEX_L,
1653 VEX, Sched<[WriteCvtPD2I]>, WIG;
1658 VEX, Sched<[WriteCvtPD2ILd]>, WIG;
1665 VEX, VEX_L, Sched<[WriteCvtPD2IY]>, WIG;
1670 VEX, VEX_L, Sched<[WriteCvtPD2IYLd]>, WIG;
1702 TB, VEX, Sched<[WriteCvtPS2PD]>, WIG;
1706 TB, VEX, Sched<[WriteCvtPS2PD.Folded]>, WIG;
1710 TB, VEX, VEX_L, Sched<[WriteCvtPS2PDY]>, WIG;
1714 TB, VEX, VEX_L, Sched<[WriteCvtPS2PDY.Folded]>, WIG;
1738 VEX, Sched<[WriteCvtI2PDLd]>, WIG;
1743 VEX, Sched<[WriteCvtI2PD]>, WIG;
1748 VEX, VEX_L, Sched<[WriteCvtI2PDYLd]>,
1754 VEX, VEX_L, Sched<[WriteCvtI2PDY]>, WIG;
1793 VEX, Sched<[WriteCvtPD2PS]>, WIG;
1797 VEX, Sched<[WriteCvtPD2PS.Folded]>, WIG;
1802 VEX, VEX_L, Sched<[WriteCvtPD2PSY]>, WIG;
1806 VEX, VEX_L, Sched<[WriteCvtPD2PSY.Folded]>, WIG;
1863 TB, XS, VEX, VVVV, VEX_LIG, WIG;
1868 TB, XD, VEX, VVVV, VEX_LIG, WIG;
1922 "ucomiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1924 "ucomisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1926 "comiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1928 "comisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1932 sse_load_f32, "ucomiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1934 sse_load_f64, "ucomisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1937 sse_load_f32, "comiss", SSEPackedSingle>, TB, VEX, VEX_LIG, WIG;
1939 sse_load_f64, "comisd", SSEPackedDouble>, TB, PD, VEX, VEX_LIG, WIG;
1982 SchedWriteFCmpSizes.PS.XMM, SSEPackedSingle, loadv4f32>, TB, VEX, VVVV, WIG;
1985 SchedWriteFCmpSizes.PD.XMM, SSEPackedDouble, loadv2f64>, TB, PD, VEX, VVVV, WIG;
1988 SchedWriteFCmpSizes.PS.YMM, SSEPackedSingle, loadv8f32>, TB, VEX, VVVV, VEX_L, WIG;
1991 … SchedWriteFCmpSizes.PD.YMM, SSEPackedDouble, loadv4f64>, TB, PD, VEX, VVVV, VEX_L, WIG;
2079 TB, VEX, VVVV, WIG;
2083 TB, VEX, VVVV, VEX_L, WIG;
2087 TB, PD, VEX, VVVV, WIG;
2091 TB, PD, VEX, VVVV, VEX_L, WIG;
2129 SchedWriteFShuffle.XMM, SSEPackedSingle>, TB, VEX, VVVV, WIG;
2132 SchedWriteFShuffle.XMM, SSEPackedDouble, 1>, TB, PD, VEX, VVVV, WIG;
2135 SchedWriteFShuffle.XMM, SSEPackedSingle>, TB, VEX, VVVV, WIG;
2138 SchedWriteFShuffle.XMM, SSEPackedDouble>, TB, PD, VEX, VVVV, WIG;
2142 SchedWriteFShuffle.YMM, SSEPackedSingle>, TB, VEX, VVVV, VEX_L, WIG;
2145 SchedWriteFShuffle.YMM, SSEPackedDouble>, TB, PD, VEX, VVVV, VEX_L, WIG;
2148 SchedWriteFShuffle.YMM, SSEPackedSingle>, TB, VEX, VVVV, VEX_L, WIG;
2151 SchedWriteFShuffle.YMM, SSEPackedDouble>, TB, PD, VEX, VVVV, VEX_L, WIG;
2211 SSEPackedSingle>, TB, VEX, WIG;
2213 SSEPackedDouble>, TB, PD, VEX, WIG;
2215 SSEPackedSingle>, TB, VEX, VEX_L, WIG;
2217 SSEPackedDouble>, TB, PD, VEX, VEX_L, WIG;
2279 IsCommutable, 0>, VEX, VVVV, WIG;
2288 IsCommutable, 0>, VEX, VVVV, VEX_L, WIG;
2315 [], [], 0>, TB, VEX, VVVV, VEX_L, WIG;
2319 [], [], 0>, TB, PD, VEX, VVVV, VEX_L, WIG;
2323 [], [], 0>, TB, VEX, VVVV, WIG;
2327 [], [], 0>, TB, PD, VEX, VVVV, WIG;
2639 SSEPackedSingle, sched.PS.XMM, 0>, TB, VEX, VVVV, WIG;
2642 SSEPackedDouble, sched.PD.XMM, 0>, TB, PD, VEX, VVVV, WIG;
2646 SSEPackedSingle, sched.PS.YMM, 0>, TB, VEX, VVVV, VEX_L, WIG;
2649 SSEPackedDouble, sched.PD.YMM, 0>, TB, PD, VEX, VVVV, VEX_L, WIG;
2668 TB, XS, VEX, VVVV, VEX_LIG, WIG;
2671 TB, XD, VEX, VVVV, VEX_LIG, WIG;
2690 SSEPackedSingle, sched.PS.Scl, 0>, TB, XS, VEX, VVVV, VEX_LIG, WIG;
2693 SSEPackedDouble, sched.PD.Scl, 0>, TB, XD, VEX, VVVV, VEX_LIG, WIG;
2952 VEX, Sched<[sched.XMM]>, WIG;
2957 VEX, Sched<[sched.XMM.Folded]>, WIG;
2962 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
2967 VEX, VEX_L, Sched<[sched.YMM.Folded]>, WIG;
2988 VEX, Sched<[sched.XMM]>, WIG;
2993 VEX, Sched<[sched.XMM.Folded]>, WIG;
2998 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
3003 VEX, VEX_L, Sched<[sched.YMM.Folded]>, WIG;
3023 TB, XS, VEX, VVVV, VEX_LIG, WIG;
3032 TB, XS, VEX, VVVV, VEX_LIG, WIG;
3041 TB, XD, VEX, VVVV, VEX_LIG, WIG;
3112 addr:$dst)]>, VEX, WIG;
3117 addr:$dst)]>, VEX, WIG;
3125 addr:$dst)]>, VEX, VEX_L, WIG;
3130 addr:$dst)]>, VEX, VEX_L, WIG;
3138 addr:$dst)]>, VEX, WIG,
3144 addr:$dst)]>, VEX, VEX_L, WIG,
3260 VEX, Sched<[WriteLDMXCSR]>, WIG;
3264 VEX, Sched<[WriteSTMXCSR]>, WIG;
3284 Sched<[SchedWriteVecMoveLS.XMM.RR]>, VEX, WIG;
3287 Sched<[SchedWriteVecMoveLS.XMM.RR]>, VEX, WIG;
3290 Sched<[SchedWriteVecMoveLS.YMM.RR]>, VEX, VEX_L, WIG;
3293 Sched<[SchedWriteVecMoveLS.YMM.RR]>, VEX, VEX_L, WIG;
3301 VEX, WIG;
3305 VEX, VEX_L, WIG;
3309 VEX, WIG;
3313 VEX, VEX_L, WIG;
3321 Sched<[SchedWriteVecMoveLS.XMM.RM]>, VEX, WIG;
3325 VEX, VEX_L, WIG;
3330 TB, XS, VEX, WIG;
3334 TB, XS, VEX, VEX_L, WIG;
3342 Sched<[SchedWriteVecMoveLS.XMM.MR]>, VEX, WIG;
3346 Sched<[SchedWriteVecMoveLS.YMM.MR]>, VEX, VEX_L, WIG;
3350 Sched<[SchedWriteVecMoveLS.XMM.MR]>, TB, XS, VEX, WIG;
3353 Sched<[SchedWriteVecMoveLS.YMM.MR]>, TB, XS, VEX, VEX_L, WIG;
3540 VEX, VVVV, WIG;
3545 0>, VEX, VVVV, VEX_L, WIG;
3553 VEX, VVVV, WIG;
3557 VEX, VVVV, VEX_L, WIG;
3607 DstVT128, SrcVT, load, 0>, VEX, VVVV, WIG;
3611 DstVT256, SrcVT, load, 0>, VEX, VVVV, VEX_L,
3634 VR128, v16i8, sched.XMM, 0>, VEX, VVVV, WIG;
3638 VEX, VVVV, VEX_L, WIG;
3710 VEX, Sched<[sched.XMM]>, WIG;
3717 (i8 timm:$src2))))]>, VEX,
3728 VEX, VEX_L, Sched<[sched.YMM]>, WIG;
3735 (i8 timm:$src2))))]>, VEX, VEX_L,
3824 VEX, VVVV, WIG;
3827 VEX, VVVV, WIG;
3831 VEX, VVVV, WIG;
3834 VEX, VVVV, WIG;
3840 VEX, VVVV, VEX_L, WIG;
3843 VEX, VVVV, VEX_L, WIG;
3847 VEX, VVVV, VEX_L, WIG;
3850 VEX, VVVV, VEX_L, WIG;
3895 VEX, VVVV, WIG;
3898 VEX, VVVV, WIG;
3901 VEX, VVVV, WIG;
3904 VEX, VVVV, WIG;
3910 VEX, VVVV, WIG;
3913 VEX, VVVV, WIG;
3916 VEX, VVVV, WIG;
3919 VEX, VVVV, WIG;
3925 VEX, VVVV, VEX_L, WIG;
3928 VEX, VVVV, VEX_L, WIG;
3931 VEX, VVVV, VEX_L, WIG;
3934 VEX, VVVV, VEX_L, WIG;
3940 VEX, VVVV, VEX_L, WIG;
3943 VEX, VVVV, VEX_L, WIG;
3946 VEX, VVVV, VEX_L, WIG;
3949 VEX, VVVV, VEX_L, WIG;
4007 TB, PD, VEX, WIG, Sched<[WriteVecExtract]>;
4017 defm VPINSRW : sse2_pinsrw<0>, TB, PD, VEX, VVVV, WIG;
4048 Sched<[WriteVecMOVMSK]>, VEX, WIG;
4055 Sched<[WriteVecMOVMSKY]>, VEX, VEX_L, WIG;
4070 // As VEX does not have separate instruction contexts for address size
4078 VEX, WIG;
4084 VEX, WIG;
4109 VEX, Sched<[WriteVecMoveFromGpr]>;
4114 VEX, Sched<[WriteVecLoad]>;
4119 VEX, Sched<[WriteVecMoveFromGpr]>;
4123 VEX, Sched<[WriteVecLoad]>;
4128 VEX, Sched<[WriteVecMoveFromGpr]>;
4163 VEX, Sched<[WriteVecMoveFromGpr]>;
4179 (iPTR 0)))]>, VEX,
4186 VEX, Sched<[WriteVecStore]>;
4208 VEX;
4220 VEX, Sched<[WriteVecStore]>;
4234 VEX, Sched<[WriteVecMoveToGpr]>;
4249 VEX, Sched<[WriteVecMoveToGpr]>;
4310 VEX, Requires<[UseAVX]>, WIG;
4326 VEX, WIG;
4337 "movq\t{$src, $dst|$dst, $src}", []>, VEX, WIG;
4372 TB, XS, VEX, Requires<[UseAVX]>, WIG;
4421 SchedWriteFShuffle.XMM>, VEX, WIG;
4424 SchedWriteFShuffle.XMM>, VEX, WIG;
4427 SchedWriteFShuffle.YMM>, VEX, VEX_L, WIG;
4430 SchedWriteFShuffle.YMM>, VEX, VEX_L, WIG;
4499 VEX, WIG;
4501 VEX, VEX_L, WIG;
4525 Sched<[SchedWriteVecMoveLS.XMM.RM]>, VEX, WIG;
4529 Sched<[SchedWriteVecMoveLS.YMM.RM]>, VEX, VEX_L, WIG;
4566 TB, XD, VEX, VVVV, WIG;
4569 TB, XD, VEX, VVVV, VEX_L, WIG;
4574 TB, PD, VEX, VVVV, WIG;
4577 TB, PD, VEX, VVVV, VEX_L, WIG;
4638 X86fhadd, WriteFHAdd, loadv4f32, 0>, VEX, VVVV, WIG;
4640 X86fhsub, WriteFHAdd, loadv4f32, 0>, VEX, VVVV, WIG;
4642 X86fhadd, WriteFHAddY, loadv8f32, 0>, VEX, VVVV, VEX_L, WIG;
4644 X86fhsub, WriteFHAddY, loadv8f32, 0>, VEX, VVVV, VEX_L, WIG;
4648 X86fhadd, WriteFHAdd, loadv2f64, 0>, VEX, VVVV, WIG;
4650 X86fhsub, WriteFHAdd, loadv2f64, 0>, VEX, VVVV, WIG;
4652 X86fhadd, WriteFHAddY, loadv4f64, 0>, VEX, VVVV, VEX_L, WIG;
4654 X86fhsub, WriteFHAddY, loadv4f64, 0>, VEX, VVVV, VEX_L, WIG;
4713 load>, VEX, WIG;
4715 load>, VEX, WIG;
4719 load>, VEX, WIG;
4723 VEX, VEX_L, WIG;
4725 VEX, VEX_L, WIG;
4729 VEX, VEX_L, WIG;
4809 SchedWriteVarShuffle.XMM, 0>, VEX, VVVV, WIG;
4812 SchedWriteVecIMul.XMM, 0>, VEX, VVVV, WIG;
4816 SchedWriteVecIMul.XMM, 0>, VEX, VVVV, WIG;
4823 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4826 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4829 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4832 SchedWritePHAdd.XMM, 0>, VEX, VVVV, WIG;
4835 SchedWriteVecALU.XMM, load, 0>, VEX, VVVV, WIG;
4838 SchedWriteVecALU.XMM, load, 0>, VEX, VVVV, WIG;
4841 SchedWriteVecALU.XMM, load, 0>, VEX, VVVV, WIG;
4844 SchedWritePHAdd.XMM, load, 0>, VEX, VVVV, WIG;
4847 SchedWritePHAdd.XMM, load, 0>, VEX, VVVV, WIG;
4855 SchedWriteVarShuffle.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4858 SchedWriteVecIMul.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4862 SchedWriteVecIMul.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4869 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4872 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4875 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4878 SchedWritePHAdd.YMM, 0>, VEX, VVVV, VEX_L, WIG;
4880 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4882 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4884 SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L, WIG;
4887 SchedWritePHAdd.YMM>, VEX, VVVV, VEX_L, WIG;
4890 SchedWritePHAdd.YMM>, VEX, VVVV, VEX_L, WIG;
4959 SchedWriteShuffle.XMM, 0>, VEX, VVVV, WIG;
4962 SchedWriteShuffle.YMM, 0>, VEX, VVVV, VEX_L, WIG;
5017 VEX, WIG;
5021 VEX, VEX_L, WIG;
5241 defm VPEXTRB : SS41I_extract8<0x14, "vpextrb">, VEX, WIG;
5265 defm VPEXTRW : SS41I_extract16<0x15, "vpextrw">, VEX, WIG;
5294 defm VPEXTRD : SS41I_extract32<0x16, "vpextrd">, VEX;
5316 defm VPEXTRQ : SS41I_extract64<0x16, "vpextrq">, VEX, REX_W;
5340 defm VEXTRACTPS : SS41I_extractf32<0x17, "vextractps">, VEX, WIG;
5370 defm VPINSRB : SS41I_insert8<0x20, "vpinsrb", 0>, VEX, VVVV, WIG;
5401 defm VPINSRD : SS41I_insert32<0x22, "vpinsrd", 0>, VEX, VVVV;
5427 defm VPINSRQ : SS41I_insert64<0x22, "vpinsrq", 0>, VEX, VVVV, REX_W;
5462 VEX, VVVV, WIG;
5623 VEX, WIG;
5626 VEX, VEX_L, WIG;
5632 VEX, WIG;
5635 VEX, VEX_L, WIG;
5641 VEX, VVVV, VEX_LIG, WIG, SIMD_EXC;
5643 VEX, VVVV, VEX_LIG, WIG, SIMD_EXC;
5697 Sched<[SchedWriteVecTest.XMM]>, VEX, WIG;
5702 VEX, WIG;
5707 Sched<[SchedWriteVecTest.YMM]>, VEX, VEX_L, WIG;
5712 VEX, VEX_L, WIG;
5733 Sched<[sched]>, VEX;
5737 Sched<[sched.Folded, sched.ReadAfterFold]>, VEX;
5814 WritePHMINPOS>, VEX, WIG;
5845 VEX, VVVV, WIG;
5848 VEX, VVVV, WIG;
5851 VEX, VVVV, WIG;
5854 VEX, VVVV, WIG;
5857 VEX, VVVV, WIG;
5862 VEX, VVVV, WIG;
5865 VEX, VVVV, WIG;
5868 VEX, VVVV, WIG;
5871 VEX, VVVV, WIG;
5877 VEX, VVVV, VEX_L, WIG;
5880 VEX, VVVV, VEX_L, WIG;
5883 VEX, VVVV, VEX_L, WIG;
5886 VEX, VVVV, VEX_L, WIG;
5889 VEX, VVVV, VEX_L, WIG;
5894 VEX, VVVV, VEX_L, WIG;
5897 VEX, VVVV, VEX_L, WIG;
5900 VEX, VVVV, VEX_L, WIG;
5903 VEX, VVVV, VEX_L, WIG;
5930 VEX, VVVV, WIG;
5934 VEX, VVVV, WIG;
5939 VEX, VVVV, VEX_L, WIG;
5943 VEX, VVVV, VEX_L, WIG;
6091 SchedWriteMPSAD.XMM>, VEX, VVVV, WIG;
6098 SchedWriteDPPS.XMM>, VEX, VVVV, WIG;
6102 SchedWriteDPPD.XMM>, VEX, VVVV, WIG;
6106 SchedWriteDPPS.YMM>, VEX, VVVV, VEX_L, WIG;
6114 SchedWriteMPSAD.YMM>, VEX, VVVV, VEX_L, WIG;
6173 VEX, VVVV, WIG;
6177 VEX, VVVV, VEX_L, WIG;
6181 VEX, VVVV, WIG;
6185 VEX, VVVV, VEX_L, WIG;
6189 VEX, VVVV, WIG;
6196 VEX, VVVV, VEX_L, WIG;
6293 SSEPackedInt>, TA, PD, VEX, VVVV,
6302 RC:$src1))], SSEPackedInt>, TA, PD, VEX, VVVV,
6476 Sched<[SchedWriteVecMoveLSNT.XMM.RM]>, VEX, WIG;
6480 Sched<[SchedWriteVecMoveLSNT.YMM.RM]>, VEX, VEX_L, WIG;
6567 VEX, VVVV, WIG;
6572 VEX, VVVV, VEX_L, WIG;
6596 defm VPCMPISTRM : pcmpistrm_SS42AI<"vpcmpistrm">, VEX, WIG;
6614 defm VPCMPESTRM : SS42AI_pcmpestrm<"vpcmpestrm">, VEX, WIG;
6632 defm VPCMPISTRI : SS42AI_pcmpistri<"vpcmpistri">, VEX, WIG;
6650 defm VPCMPESTRI : SS42AI_pcmpestri<"vpcmpestri">, VEX, WIG;
6837 int_x86_aesni_aesenc, load>, VEX, VVVV, WIG;
6839 int_x86_aesni_aesenclast, load>, VEX, VVVV, WIG;
6841 int_x86_aesni_aesdec, load>, VEX, VVVV, WIG;
6843 int_x86_aesni_aesdeclast, load>, VEX, VVVV, WIG;
6849 i256mem>, VEX, VVVV, VEX_L, WIG;
6852 i256mem>, VEX, VVVV, VEX_L, WIG;
6855 i256mem>, VEX, VVVV, VEX_L, WIG;
6858 i256mem>, VEX, VVVV, VEX_L, WIG;
6879 VEX, WIG;
6884 Sched<[WriteAESIMC.Folded]>, VEX, WIG;
6904 Sched<[WriteAESKeyGen]>, VEX, WIG;
6910 Sched<[WriteAESKeyGen.Folded]>, VEX, WIG;
6999 int_x86_pclmulqdq>, VEX, VVVV, WIG;
7003 int_x86_pclmulqdq_256>, VEX, VVVV, VEX_L, WIG;
7096 Sched<[Sched]>, VEX;
7104 Sched<[Sched]>, VEX;
7137 Sched<[WriteShuffleLd]>, VEX, VEX_L;
7144 Sched<[SchedWriteFShuffle.XMM.Folded]>, VEX, VEX_L;
7178 VEX, VVVV, VEX_L, Sched<[WriteFShuffle256]>;
7182 VEX, VVVV, VEX_L, Sched<[WriteFShuffle256.Folded, WriteFShuffle256.ReadAfterFold]>;
7221 []>, Sched<[WriteFShuffle256]>, VEX, VVVV, VEX_L;
7226 []>, Sched<[WriteFShuffle256.Folded, WriteFShuffle256.ReadAfterFold]>, VEX, VVVV, VEX_L;
7278 []>, Sched<[WriteFShuffle256]>, VEX, VEX_L;
7283 []>, Sched<[WriteFStoreX]>, VEX, VEX_L;
7324 VEX, VVVV, Sched<[schedX.RM]>;
7329 VEX, VVVV, VEX_L, Sched<[schedY.RM]>;
7334 VEX, VVVV, Sched<[schedX.MR]>;
7339 VEX, VVVV, VEX_L, Sched<[schedY.MR]>;
7370 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
7377 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM.Folded,
7387 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
7394 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM.Folded,
7433 [(set RC:$dst, (f_vt (X86VPermilpv RC:$src1, (i_vt RC:$src2))))]>, VEX, VVVV,
7439 (i_vt (load addr:$src2)))))]>, VEX, VVVV,
7445 [(set RC:$dst, (f_vt (X86VPermilpi RC:$src1, (i8 timm:$src2))))]>, VEX,
7451 (f_vt (X86VPermilpi (load addr:$src1), (i8 timm:$src2))))]>, VEX,
7483 [(int_x86_avx_vzeroall)]>, TB, VEX, VEX_L,
7488 [(int_x86_avx_vzeroupper)]>, TB, VEX,
7502 T8, PD, VEX, Sched<[sched]>;
7506 []>, T8, PD, VEX, Sched<[sched.Folded]>;
7515 TA, PD, VEX, Sched<[RR]>;
7520 TA, PD, VEX, Sched<[MR]>;
7567 Sched<[sched]>, VEX, VVVV;
7574 Sched<[sched.Folded, sched.ReadAfterFold]>, VEX, VVVV;
7660 Sched<[SchedWriteShuffle.XMM]>, VEX;
7665 Sched<[SchedWriteShuffle.XMM.Folded]>, VEX;
7670 Sched<[WriteShuffle256]>, VEX, VEX_L;
7675 Sched<[SchedWriteShuffle.XMM.Folded]>, VEX, VEX_L;
7824 Sched<[Sched]>, VEX, VVVV, VEX_L;
7832 Sched<[Sched.Folded, Sched.ReadAfterFold]>, VEX, VVVV, VEX_L;
7850 Sched<[Sched]>, VEX, VEX_L;
7858 Sched<[Sched.Folded, Sched.ReadAfterFold]>, VEX, VEX_L;
7875 Sched<[WriteShuffle256]>, VEX, VVVV, VEX_L;
7879 Sched<[WriteShuffle256.Folded, WriteShuffle256.ReadAfterFold]>, VEX, VVVV, VEX_L;
7897 []>, Sched<[WriteShuffle256]>, VEX, VVVV, VEX_L;
7902 []>, Sched<[WriteShuffle256.Folded, WriteShuffle256.ReadAfterFold]>, VEX, VVVV, VEX_L;
7923 Sched<[WriteShuffle256]>, VEX, VEX_L;
7928 Sched<[SchedWriteVecMoveLS.XMM.MR]>, VEX, VEX_L;
7954 VEX, VVVV, Sched<[schedX.RM]>;
7959 VEX, VVVV, VEX_L, Sched<[schedY.RM]>;
7964 VEX, VVVV, Sched<[schedX.MR]>;
7969 VEX, VVVV, VEX_L, Sched<[schedY.MR]>;
8027 VEX, VVVV, Sched<[SchedWriteVarVecShift.XMM]>;
8034 VEX, VVVV, Sched<[SchedWriteVarVecShift.XMM.Folded,
8041 VEX, VVVV, VEX_L, Sched<[SchedWriteVarVecShift.YMM]>;
8048 VEX, VVVV, VEX_L, Sched<[SchedWriteVarVecShift.YMM.Folded,
8071 []>, VEX, Sched<[WriteLoad, WriteVecMaskedGatherWriteback]>;
8076 []>, VEX, VEX_L, Sched<[WriteLoad, WriteVecMaskedGatherWriteback]>;
8161 VEX, VVVV, REX_W;
8164 VEX, VVVV, VEX_L, REX_W;
8175 i128mem, SchedWriteVecALU.XMM>, VEX, VVVV;
8177 i256mem, SchedWriteVecALU.YMM>, VEX, VVVV, VEX_L;
8198 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8205 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8212 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8219 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8237 VEX, VVVV, Sched<[Sched]>;
8243 VEX, VVVV, Sched<[Sched.Folded, Sched.ReadAfterFold]>;
8292 Sched<[WriteCvtPH2PS]>, VEX;
8297 Sched<[WriteCvtPH2PSY]>, VEX, VEX_L;
8332 defm VCVTNEPS2BF16 : VCVTNEPS2BF16_BASE, VEX, T8, XS, ExplicitVEXPrefix;
8356 VEX, T8, XD, Sched<[WriteVecIMul]>;
8362 VEX, T8, XD, Sched<[WriteVecIMul]>;
8368 VEX_L, VEX, VVVV, T8, XD, Sched<[WriteVecIMul]>;
8380 Sched<[WriteVecIMul]>, VEX, VVVV;
8387 Sched<[WriteVecIMul]>, VEX, VVVV;
8410 defm VSM3RNDS2 : VSM3RNDS2_Base, VEX, VVVV, TA, PD;
8431 defm VSM4KEY4 : SM4_Base<"vsm4key4", VR128, "128", loadv4i32, i128mem>, T8, XS, VEX, VVVV;
8432 defm VSM4KEY4Y : SM4_Base<"vsm4key4", VR256, "256", loadv8i32, i256mem>, T8, XS, VEX_L, VEX, VVVV;
8433 defm VSM4RNDS4 : SM4_Base<"vsm4rnds4", VR128, "128", loadv4i32, i128mem>, T8, XD, VEX, VVVV;
8434 defm VSM4RNDS4Y : SM4_Base<"vsm4rnds4", VR256, "256", loadv8i32, i256mem>, T8, XD, VEX_L, VEX, VVVV;
8445 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8453 VEX, VVVV, Sched<[SchedWriteVecIMul.XMM]>;
8462 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;
8470 VEX, VVVV, VEX_L, Sched<[SchedWriteVecIMul.YMM]>;