Documentation/fpga/dfl.rst

28     Header            Header            Header            Header
39  |  Header  |  |   | Register |      | Register |      | Register |
42  +----------+  |      Header
51                    |  Header  |
66 Feature Header (Next_DFH) pointer.
69 The functional register set for FIU and AFU, is named as Header Register Set,
70 e.g. FME Header Register Set, and the one for Private Feature, is named as
78 Device Feature Header - Version 0
80 Version 0 (DFHv0) is the original version of the Device Feature Header.
115 Device Feature Header - Version 1
117 Version 1 (DFHv1) of the Device Feature Header adds the following functionality:
125 The format of Version 1 of the Device Feature Header (DFH) is shown below::