Lines Matching refs:Op1

241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) {  in Decode2OpInstruction()  argument
253 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 2, 2); in Decode2OpInstruction()
259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction() argument
268 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 4, 2); in Decode3OpInstruction()
347 unsigned Op1, Op2; in Decode2RInstruction() local
348 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in Decode2RInstruction()
352 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RInstruction()
360 unsigned Op1, Op2; in Decode2RImmInstruction() local
361 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in Decode2RImmInstruction()
365 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode2RImmInstruction()
373 unsigned Op1, Op2; in DecodeR2RInstruction() local
374 DecodeStatus S = Decode2OpInstruction(Insn, Op2, Op1); in DecodeR2RInstruction()
378 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeR2RInstruction()
386 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
387 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in Decode2RSrcDstInstruction()
391 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RSrcDstInstruction()
392 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RSrcDstInstruction()
400 unsigned Op1, Op2; in DecodeRUSInstruction() local
401 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in DecodeRUSInstruction()
405 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeRUSInstruction()
413 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
414 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in DecodeRUSBitpInstruction()
418 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeRUSBitpInstruction()
426 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
427 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in DecodeRUSSrcDstBitpInstruction()
431 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeRUSSrcDstBitpInstruction()
432 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeRUSSrcDstBitpInstruction()
511 unsigned Op1, Op2; in DecodeL2RInstruction() local
513 Op1, Op2); in DecodeL2RInstruction()
517 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL2RInstruction()
525 unsigned Op1, Op2; in DecodeLR2RInstruction() local
527 Op1, Op2); in DecodeLR2RInstruction()
532 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeLR2RInstruction()
539 unsigned Op1, Op2, Op3; in Decode3RInstruction() local
540 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3); in Decode3RInstruction()
542 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode3RInstruction()
552 unsigned Op1, Op2, Op3; in Decode3RImmInstruction() local
553 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3); in Decode3RImmInstruction()
555 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode3RImmInstruction()
565 unsigned Op1, Op2, Op3; in Decode2RUSInstruction() local
566 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3); in Decode2RUSInstruction()
568 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RUSInstruction()
578 unsigned Op1, Op2, Op3; in Decode2RUSBitpInstruction() local
579 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3); in Decode2RUSBitpInstruction()
581 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RUSBitpInstruction()
591 unsigned Op1, Op2, Op3; in DecodeL3RInstruction() local
593 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL3RInstruction()
595 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL3RInstruction()
605 unsigned Op1, Op2, Op3; in DecodeL3RSrcDstInstruction() local
607 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL3RSrcDstInstruction()
609 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL3RSrcDstInstruction()
610 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL3RSrcDstInstruction()
620 unsigned Op1, Op2, Op3; in DecodeL2RUSInstruction() local
622 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL2RUSInstruction()
624 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL2RUSInstruction()
634 unsigned Op1, Op2, Op3; in DecodeL2RUSBitpInstruction() local
636 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL2RUSBitpInstruction()
638 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL2RUSBitpInstruction()
648 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local
650 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL6RInstruction()
656 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL6RInstruction()
682 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local
684 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL5RInstruction()
691 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL5RInstruction()
702 unsigned Op1, Op2, Op3; in DecodeL4RSrcDstInstruction() local
705 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL4RSrcDstInstruction()
707 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL4RSrcDstInstruction()
721 unsigned Op1, Op2, Op3; in DecodeL4RSrcDstSrcDstInstruction() local
724 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3); in DecodeL4RSrcDstSrcDstInstruction()
726 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL4RSrcDstSrcDstInstruction()
730 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeL4RSrcDstSrcDstInstruction()