Lines Matching refs:SI
26 (define_mode_iterator int_modes [(SI "") (HI "") (QI "")])
33 [(SF "") (SI "") (HI "") (QI "")])
164 [(match_operand:SI 1 "register_operand")
165 (match_operand:SI 2 "rx_source_operand")])
175 [(match_operand:SI 0 "register_operand" "r")
176 (match_operand:SI 1 "rx_source_operand" "riQ")])
191 (compare:CC (match_operand:SI 0 "register_operand" "r,r,r,r,r,r,r")
192 (match_operand:SI 1 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")))]
204 [(and:SI (match_operand:SI 0 "register_operand" "r")
205 (match_operand:SI 1 "rx_source_operand" "riQ"))
225 [(zero_extract:SI
226 (match_operand:SI 0 "register_operand" "r")
227 (match_operand:SI 1 "rx_constshift_operand" "")
228 (match_operand:SI 2 "rx_constshift_operand" ""))
254 (and:SI (match_operand:SI 0 "register_operand" "r,r,r")
255 (match_operand:SI 1 "rx_source_operand" "r,i,Q"))
332 (match_operand:SI 0 "register_operand" "r"))]
341 (match_operand:SI 0 "register_operand" "r"))
369 [(set (reg:SI SP_REG)
370 (plus:SI (reg:SI SP_REG)
371 (const:SI (unspec:SI [(match_operand 0 "const_int_operand" "n")] UNSPEC_CONST))))
381 [(set (reg:SI SP_REG)
382 (plus:SI (reg:SI SP_REG)
383 (match_operand:SI 0 "const_int_operand" "n")))])
427 (match_operand:SI 1 "general_operand"))]
440 [(call (mem:QI (match_operand:SI 0 "rx_call_operand" "r,CALL_OP_SYMBOL_REF"))
454 (match_operand:SI 2 "general_operand")))]
468 (call (mem:QI (match_operand:SI 1 "rx_call_operand" "r,CALL_OP_SYMBOL_REF"))
486 [(call (mem:QI (match_operand:SI 0 "rx_symbolic_call_operand"))
487 (match_operand:SI 1 "general_operand"))
499 [(call (mem:QI (match_operand:SI 0 "rx_symbolic_call_operand" "Symbol"))
511 (call (mem:QI (match_operand:SI 1 "rx_symbolic_call_operand"))
512 (match_operand:SI 2 "general_operand")))
525 (call (mem:QI (match_operand:SI 1 "rx_symbolic_call_operand" "Symbol"))
606 [(set (match_operand:SI 0 "register_operand" "=r,r")
607 (sign_extend:SI (match_operand:small_int_modes
616 [(set (match_operand:SI 0 "register_operand" "=r,r")
617 (zero_extend:SI (match_operand:small_int_modes
626 [(set (reg:SI SP_REG)
627 (minus:SI (reg:SI SP_REG)
629 (set (mem:SI (minus:SI (reg:SI SP_REG) (const_int 4)))
630 (match_operand:SI 0 "register_operand" "r"))]
638 [(set (reg:SI SP_REG)
639 (minus:SI (reg:SI SP_REG)
640 (match_operand:SI 0 "const_int_operand" "n")))])]
651 [(set (match_operand:SI 0 "register_operand" "=r")
652 (mem:SI (reg:SI SP_REG)))
653 (set (reg:SI SP_REG)
654 (plus:SI (reg:SI SP_REG)
664 [(set (reg:SI SP_REG)
665 (plus:SI (reg:SI SP_REG)
666 (match_operand:SI 0 "const_int_operand" "n")))])]
677 [(set (match_operand:SI 0 "register_operand" "=r")
678 (match_operator:SI 1 "comparison_operator"
679 [(match_operand:SI 2 "register_operand" "r")
680 (match_operand:SI 3 "rx_source_operand" "riQ")]))
701 [(set (match_operand:SI 0 "register_operand" "=r")
702 (match_operator:SI 1 "comparison_operator"
710 [(set (match_operand:SI 0 "register_operand" "=r")
711 (match_operator:SI 1 "rx_fp_comparison_operator"
734 [(set (match_operand:SI 0 "register_operand")
735 (if_then_else:SI (match_operand 1 "comparison_operator")
736 (match_operand:SI 2 "nonmemory_operand")
737 (match_operand:SI 3 "nonmemory_operand")))
754 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
755 (if_then_else:SI
757 [(match_operand:SI 3 "register_operand" "r,r,r")
758 (match_operand:SI 4 "rx_source_operand" "riQ,riQ,riQ")])
759 (match_operand:SI 1 "nonmemory_operand" "i,ri,r")
760 (match_operand:SI 2 "nonmemory_operand" "ri,i,r")))
803 [(set (match_operand:SI 0 "register_operand" "+r,r,r,r")
804 (if_then_else:SI
807 (match_operand:SI 1 "immediate_operand" "Sint08,Sint16,Sint24,i")
821 [(set (match_operand:SI 0 "register_operand" "+r,r,r,r,r,r")
822 (if_then_else:SI
825 (match_operand:SI 1 "nonmemory_operand"
839 [(set (match_operand:SI 0 "register_operand" "=r,r")
840 (abs:SI (match_operand:SI 1 "register_operand" "0,r")))
851 (compare (abs:SI (match_operand:SI 1 "register_operand" "0,r"))
853 (set (match_operand:SI 0 "register_operand" "=r,r")
854 (abs:SI (match_dup 1)))]
866 [(parallel [(set (match_operand:SI 0 "register_operand" "")
867 (plus:SI (match_operand:SI 1 "register_operand" "")
868 (match_operand:SI 2 "rx_source_operand" "")))
879 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r,r,r,r,r,r")
880 (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,0,r,r,r,r,r,r,0")
881 …(match_operand:SI 2 "rx_source_operand" "r,Uint04,NEGint4,Sint08,Sint16,Sint24,i,0,r,Sint08,Sint16…
905 (compare (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,0,r,r,r,r,r,r,0")
906 …(match_operand:SI 2 "rx_source_operand" "r,Uint04,NEGint4,Sint08,Sint16,Sint24,i,0,r,Sint08,Sint16…
908 (set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r,r,r,r,r,r")
909 (plus:SI (match_dup 1) (match_dup 2)))]
934 (plus:SI (match_operand:SI 1 "register_operand")
935 (match_operand:SI 2 "rx_source_operand"))
937 (set (match_operand:SI 0 "register_operand")
938 (plus:SI (match_dup 1) (match_dup 2)))])]
942 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
943 (plus:SI
944 (plus:SI
945 (ltu:SI (reg:CC CC_REG) (const_int 0))
946 (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0"))
947 (match_operand:SI 2 "rx_source_operand" "r,Sint08,Sint16,Sint24,i,Q")))
958 (plus:SI
959 (plus:SI
960 (ltu:SI (reg:CC CC_REG) (const_int 0))
961 (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0"))
962 (match_operand:SI 2 "rx_source_operand" "r,Sint08,Sint16,Sint24,i,Q"))
964 (set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
965 (plus:SI
966 (plus:SI
967 (ltu:SI (reg:CC CC_REG) (const_int 0))
982 [(set (match_operand:SI 0 "register_operand")
983 (match_operand:SI 1 "register_operand"))
989 (compare:CC_ZSC (plus:SI (match_dup 1) (const_int 0))
992 (plus:SI (match_dup 1) (const_int 0))) ])]
996 [(set (match_operand:SI 0 "register_operand")
997 (match_operand:SI 1 "register_operand"))
1003 (compare:CC_ZSC (plus:SI (match_dup 1) (const_int 0))
1006 (plus:SI (match_dup 1) (const_int 0)))])]
1029 [(set (match_operand:SI 0 "register_operand" "=&r")
1030 (plus:SI (match_operand:SI 2 "register_operand" "r")
1031 (match_operand:SI 3 "rx_source_operand" "riQ")))
1032 (set (match_operand:SI 1 "register_operand" "=r")
1033 (plus:SI
1034 (plus:SI
1035 (ltu:SI (plus:SI (match_dup 2) (match_dup 3)) (match_dup 2))
1036 (match_operand:SI 4 "register_operand" "%1"))
1037 (match_operand:SI 5 "rx_source_operand" "riQ")))
1038 (clobber (match_scratch:SI 6 "=&r"))
1097 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r")
1098 (and:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,r,r,0")
1099 (match_operand:SI 2 "rx_source_operand" "r,Uint04,Sint08,Sint16,Sint24,i,0,r,Q")))
1133 (compare (and:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,r,r,0")
1134 (match_operand:SI 2 "rx_source_operand" "r,Uint04,Sint08,Sint16,Sint24,i,0,r,Q"))
1136 (set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r")
1137 (and:SI (match_dup 1) (match_dup 2)))]
1155 [(set (match_operand:SI 0 "register_operand" "=r")
1156 (bswap:SI (match_operand:SI 1 "register_operand" "r")))]
1172 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1173 (div:SI (match_operand:SI 1 "register_operand" "0,0,0,0,0,0")
1174 (match_operand:SI 2 "rx_source_operand" "r,Sint08,Sint16,Sint24,i,Q")))
1184 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1185 (udiv:SI (match_operand:SI 1 "register_operand" "0,0,0,0,0,0")
1186 (match_operand:SI 2 "rx_source_operand" "r,Sint08,Sint16,Sint24,i,Q")))
1202 (mult:DI (sign_extend:DI (match_operand:SI
1204 (sign_extend:DI (match_operand:SI
1219 (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0,0"))
1220 (zero_extend:DI (match_operand:SI 2 "rx_compare_operand" "r,Q"))))]
1228 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1229 (smax:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")
1230 (match_operand:SI 2 "rx_source_operand"
1239 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1240 (smin:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")
1241 (match_operand:SI 2 "rx_source_operand"
1250 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1251 (smax:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")
1252 (zero_extend:SI (match_operand:small_int_modes 2 "rx_minmaxex_operand"
1261 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1262 (smin:SI (zero_extend:SI (match_operand:small_int_modes 2 "rx_minmaxex_operand"
1264 (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")))]
1272 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1273 (smax:SI (zero_extend:SI (match_operand:small_int_modes 2 "rx_minmaxex_operand"
1275 (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")))]
1284 (zero_extend:SI (match_operand:small_int_modes 1 "register_operand" "%0,0,0,0,0,0")))
1286 (smax:SI (match_dup 4)
1308 (zero_extend:SI (match_operand:small_int_modes 1 "register_operand" "%0,0,0,0,0,0")))
1310 (smin:SI (match_dup 4)
1331 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r")
1332 (mult:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,0,r,r")
1333 (match_operand:SI 2 "rx_source_operand"
1351 [(set (match_operand:SI 0 "register_operand" "=r,r")
1352 (neg:SI (match_operand:SI 1 "register_operand" "0,r")))
1365 (compare (neg:SI (match_operand:SI 1 "register_operand" "0,r"))
1367 (set (match_operand:SI 0 "register_operand" "=r,r")
1368 (neg:SI (match_dup 1)))]
1377 [(set (match_operand:SI 0 "register_operand" "=r,r")
1378 (not:SI (match_operand:SI 1 "register_operand" "0,r")))
1389 (compare (not:SI (match_operand:SI 1 "register_operand" "0,r"))
1391 (set (match_operand:SI 0 "register_operand" "=r,r")
1392 (not:SI (match_dup 1)))]
1401 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r")
1402 (ior:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,r,r,0")
1403 (match_operand:SI 2 "rx_source_operand" "r,Uint04,Sint08,Sint16,Sint24,i,0,r,Q")))
1437 (compare (ior:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,r,r,0")
1438 (match_operand:SI 2 "rx_source_operand" "r,Uint04,Sint08,Sint16,Sint24,i,0,r,Q"))
1440 (set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r,r")
1441 (ior:SI (match_dup 1) (match_dup 2)))]
1458 [(set (match_operand:SI 0 "register_operand" "=r")
1459 (rotate:SI (match_operand:SI 1 "register_operand" "0")
1460 (match_operand:SI 2 "rx_shift_operand" "rn")))
1469 (compare (rotate:SI (match_operand:SI 1 "register_operand" "0")
1470 (match_operand:SI 2 "rx_shift_operand" "rn"))
1472 (set (match_operand:SI 0 "register_operand" "=r")
1473 (rotate:SI (match_dup 1) (match_dup 2)))]
1480 [(set (match_operand:SI 0 "register_operand" "=r")
1481 (rotatert:SI (match_operand:SI 1 "register_operand" "0")
1482 (match_operand:SI 2 "rx_shift_operand" "rn")))
1491 (compare (rotatert:SI (match_operand:SI 1 "register_operand" "0")
1492 (match_operand:SI 2 "rx_shift_operand" "rn"))
1494 (set (match_operand:SI 0 "register_operand" "=r")
1495 (rotatert:SI (match_dup 1) (match_dup 2)))]
1502 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
1503 (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r")
1504 (match_operand:SI 2 "rx_shift_operand" "r,n,n")))
1516 (compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r")
1517 (match_operand:SI 2 "rx_shift_operand" "r,n,n"))
1519 (set (match_operand:SI 0 "register_operand" "=r,r,r")
1520 (ashiftrt:SI (match_dup 1) (match_dup 2)))]
1530 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
1531 (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r")
1532 (match_operand:SI 2 "rx_shift_operand" "r,n,n")))
1544 (compare (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r")
1545 (match_operand:SI 2 "rx_shift_operand" "r,n,n"))
1547 (set (match_operand:SI 0 "register_operand" "=r,r,r")
1548 (lshiftrt:SI (match_dup 1) (match_dup 2)))]
1558 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
1559 (ashift:SI (match_operand:SI 1 "register_operand" "0,0,r")
1560 (match_operand:SI 2 "rx_shift_operand" "r,n,n")))
1572 (compare (ashift:SI (match_operand:SI 1 "register_operand" "0,0,r")
1573 (match_operand:SI 2 "rx_shift_operand" "r,n,n"))
1575 (set (match_operand:SI 0 "register_operand" "=r,r,r")
1576 (ashift:SI (match_dup 1) (match_dup 2)))]
1587 [(set (match_operand:SI 0 "register_operand" "=r")
1588 (ss_plus:SI (match_operand:SI 1 "register_operand" "r")
1589 (match_operand:SI 2 "rx_source_operand" "riQ")))
1596 (plus:SI (match_dup 1) (match_dup 2))
1599 (plus:SI (match_dup 1) (match_dup 2)))])
1601 (unspec:SI [(match_dup 0) (reg:CC CC_REG)]
1607 [(set (match_operand:SI 0 "register_operand" "=r")
1608 (unspec:SI [(match_operand:SI 1 "register_operand" "0")
1617 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
1618 (minus:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0")
1619 (match_operand:SI 2 "rx_source_operand" "r,Uint04,n,r,Q")))
1636 (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0")
1637 (match_operand:SI 2 "rx_source_operand" "r,Uint04,n,r,Q"))
1639 (set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
1640 (minus:SI (match_dup 1) (match_dup 2)))]
1656 (minus:SI (match_operand:SI 1 "register_operand")
1657 (match_operand:SI 2 "rx_source_operand"))
1659 (set (match_operand:SI 0 "register_operand")
1660 (minus:SI (match_dup 1) (match_dup 2)))])]
1664 [(set (match_operand:SI 0 "register_operand" "=r,r")
1665 (minus:SI
1666 (minus:SI
1667 (match_operand:SI 1 "register_operand" " 0,0")
1668 (match_operand:SI 2 "rx_compare_operand" " r,Q"))
1669 (geu:SI (reg:CC CC_REG) (const_int 0))))
1680 (minus:SI
1681 (minus:SI
1682 (match_operand:SI 1 "register_operand" " 0,0")
1683 (match_operand:SI 2 "rx_compare_operand" " r,Q"))
1684 (geu:SI (reg:CC CC_REG) (const_int 0)))
1686 (set (match_operand:SI 0 "register_operand" "=r,r")
1687 (minus:SI
1688 (minus:SI (match_dup 1) (match_dup 2))
1689 (geu:SI (reg:CC CC_REG) (const_int 0))))]
1716 [(set (match_operand:SI 0 "register_operand" "=&r,&r")
1717 (minus:SI (match_operand:SI 2 "register_operand" " 0, r")
1718 (match_operand:SI 3 "rx_compare_operand" "rQ, r")))
1719 (set (match_operand:SI 1 "register_operand" "= r, r")
1720 (minus:SI
1721 (minus:SI
1722 (match_operand:SI 4 "register_operand" " 1, 1")
1723 (match_operand:SI 5 "rx_compare_operand" " rQ,rQ"))
1724 (geu:SI (match_dup 2) (match_dup 3))))
1737 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1738 (xor:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")
1739 (match_operand:SI 2 "rx_source_operand"
1765 (compare (xor:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0")
1766 (match_operand:SI 2 "rx_source_operand"
1769 (set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
1770 (xor:SI (match_dup 1) (match_dup 2)))]
1791 [(set (match_operand:SI 0 "register_operand")
1792 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand")))
1793 (parallel [(set (match_operand:SI 2 "register_operand")
1794 (memex_commutative:SI (match_dup 0)
1799 (memex_commutative:SI (match_dup 2)
1800 (extend_types:SI (match_dup 1))))
1805 [(set (match_operand:SI 0 "register_operand")
1806 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand")))
1807 (parallel [(set (match_operand:SI 2 "register_operand")
1808 (memex_commutative:SI (match_dup 2)
1813 (memex_commutative:SI (match_dup 2)
1814 (extend_types:SI (match_dup 1))))
1819 [(set (match_operand:SI 0 "register_operand")
1820 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand")))
1821 (parallel [(set (match_operand:SI 2 "register_operand")
1822 (memex_noncomm:SI (match_dup 2)
1827 (memex_noncomm:SI (match_dup 2)
1828 (extend_types:SI (match_dup 1))))
1833 [(set (match_operand:SI 0 "register_operand")
1834 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand")))
1835 (set (match_operand:SI 2 "register_operand")
1836 (memex_nocc:SI (match_dup 0)
1840 (memex_nocc:SI (match_dup 2)
1841 (extend_types:SI (match_dup 1))))]
1845 [(set (match_operand:SI 0 "register_operand")
1846 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand")))
1847 (set (match_operand:SI 2 "register_operand")
1848 (memex_nocc:SI (match_dup 2)
1852 (memex_nocc:SI (match_dup 2)
1853 (extend_types:SI (match_dup 1))))]
1857 …[(set (match_operand:SI 0 "register_operand" "…
1858 (memex_commutative:SI (match_operand:SI 1 "register_operand" "%0")
1859 … (extend_types:SI (match_operand:small_int_modes 2 "rx_restricted_mem_operand" "Q"))))
1868 [(set (match_operand:SI 0 "register_operand" "=r")
1869 (memex_noncomm:SI (match_operand:SI 1 "register_operand" "0")
1870 … (extend_types:SI (match_operand:small_int_modes 2 "rx_restricted_mem_operand" "Q"))))
1879 [(set (match_operand:SI 0 "register_operand" "=r")
1880 (memex_nocc:SI (match_operand:SI 1 "register_operand" "%0")
1881 (extend_types:SI (match_operand:small_int_modes 2 "rx_restricted_mem_operand" "Q"))))]
1889 [(set (match_operand:SI 0 "register_operand")
1890 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand")))
1892 (compare:CC (match_operand:SI 2 "register_operand")
1897 (extend_types:SI (match_dup 1))))]
1906 [(set (match_operand:SI 0 "register_operand")
1907 (sign_extend:SI (match_operand:small_int_modes 1 "memory_operand")))
1908 (set (match_operand:SI 2 "register_operand")
1909 (zero_extend:SI (match_operand:small_int_modes 3 "register_operand")))]
1914 (zero_extend:SI (match_dup 1)))]
1921 [(set (match_operand:SI 0 "register_operand")
1922 (extend_types:SI (match_operand:small_int_modes 1 "memory_operand")))
1924 (extend_types:SI (match_operand:small_int_modes 2 "register_operand")))]
1926 [(set (match_dup 0) (extend_types:SI (match_dup 1)))]
1931 (compare:CC (match_operand:SI 0 "register_operand" "r")
1932 (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand" "Q"))))]
1986 [(set (match_operand:SI 0 "register_operand" "=r,r")
1987 (fix:SI (match_operand:SF 1 "rx_compare_operand" "r,Q")))
1997 (float:SF (match_operand:SI 1 "rx_compare_operand" "r,Q")))
2017 [(set (match_operand:SI 0 "register_operand" "=r")
2018 (ior:SI (ashift:SI (const_int 1)
2019 (match_operand:SI 1 "rx_shift_operand" "ri"))
2020 (match_operand:SI 2 "register_operand" "0")))]
2046 [(set (match_operand:SI 0 "register_operand" "=r")
2047 (xor:SI (ashift:SI (const_int 1)
2048 (match_operand:SI 1 "rx_shift_operand" "ri"))
2049 (match_operand:SI 2 "register_operand" "0")))]
2075 [(set (match_operand:SI 0 "register_operand" "=r")
2076 (and:SI (not:SI
2077 (ashift:SI
2079 (match_operand:SI 1 "rx_shift_operand" "ri")))
2080 (match_operand:SI 2 "register_operand" "0")))]
2108 [(set (zero_extract:SI
2109 (match_operand:SI 0 "register_operand" "+r")
2111 (match_operand:SI 1 "rx_shift_operand" "ri"))
2112 (match_operand:SI 2 "const_int_operand" ""))]
2124 [(set (zero_extract:SI
2125 (match_operand:SI 0 "register_operand" "+r")
2127 (match_operand:SI 1 "const_int_operand" ""))
2128 (match_operand:SI 2 "register_operand" "r"))
2133 [(set (zero_extract:SI (match_dup 0) (const_int 1) (match_dup 1))
2150 [(set (zero_extract:SI
2151 (match_operand:SI 0 "register_operand" "+r")
2153 (match_operand:SI 1 "const_int_operand" ""))
2154 (match_operator:SI 4 "comparison_operator"
2155 [(match_operand:SI 2 "register_operand" "r")
2156 (match_operand:SI 3 "rx_source_operand" "riQ")]))
2161 [(set (zero_extract:SI (match_dup 0) (const_int 1) (match_dup 1))
2176 [(set (zero_extract:SI
2177 (match_operand:SI 0 "register_operand" "+r")
2179 (match_operand:SI 1 "const_int_operand" ""))
2180 (match_operator:SI 2 "comparison_operator"
2189 [(set (zero_extract:SI
2190 (match_operand:SI 0 "register_operand" "+r")
2192 (match_operand:SI 1 "const_int_operand" ""))
2193 (match_operator:SI 3 "rshift_operator"
2194 [(match_operand:SI 2 "register_operand" "r")
2200 [(parallel [(set (zero_extract:SI (match_dup 0) (const_int 1) (match_dup 1))
2201 (lt:SI (match_dup 2) (const_int 0)))
2207 [(set (zero_extract:SI
2208 (match_operand:SI 0 "register_operand") ;; Destination
2209 (match_operand:SI 1 "const_int_operand") ;; # of bits to set
2210 (match_operand:SI 2 "nonmemory_operand")) ;; Starting bit
2211 (match_operand:SI 3 "nonmemory_operand"))] ;; Bits to insert
2245 [(set (match_operand:SI 0 "register_operand" "=r,r")
2246 (match_operand:SI 1 "rx_compare_operand" "=r,Q"))
2248 (match_operand:SI 2 "register_operand" "0,0"))]
2267 [(match_operand:SI 0 "register_operand") ;; oldval output
2268 (match_operand:SI 1 "rx_restricted_mem_operand") ;; memory
2269 (match_operand:SI 2 "register_operand") ;; newval input
2270 (match_operand:SI 3 "const_int_operand")] ;; memory model
2291 [(set (match_operand:SI 0 "register_operand")
2292 (match_operand:SI 1 "memory_operand"))
2294 (FETCHOP:SI (match_dup 1) (match_operand:SI 2 "rx_source_operand")))
2295 (match_operand:SI 3 "const_int_operand")] ;; memory model
2312 [(set (match_operand:SI 0 "register_operand")
2313 (match_operand:SI 1 "memory_operand"))
2315 (not:SI (and:SI (match_dup 1)
2316 (match_operand:SI 2 "rx_source_operand"))))
2317 (match_operand:SI 3 "const_int_operand")] ;; memory model
2338 [(set (match_operand:SI 0 "register_operand")
2339 (FETCHOP_NO_MINUS:SI (match_operand:SI 1 "rx_restricted_mem_operand")
2340 (match_operand:SI 2 "register_operand")))
2342 (FETCHOP_NO_MINUS:SI (match_dup 1) (match_dup 2)))
2343 (match_operand:SI 3 "const_int_operand")] ;; memory model
2357 [(set (match_operand:SI 0 "register_operand")
2358 (minus:SI (match_operand:SI 1 "rx_restricted_mem_operand")
2359 (match_operand:SI 2 "rx_source_operand")))
2361 (minus:SI (match_dup 1) (match_dup 2)))
2362 (match_operand:SI 3 "const_int_operand")] ;; memory model
2376 [(set (match_operand:SI 0 "register_operand")
2377 (not:SI (and:SI (match_operand:SI 1 "rx_restricted_mem_operand")
2378 (match_operand:SI 2 "register_operand"))))
2380 (not:SI (and:SI (match_dup 1) (match_dup 2))))
2381 (match_operand:SI 3 "const_int_operand")] ;; memory model
2401 (use (match_operand:SI 0 "register_operand")) ;; Updated Dest
2424 [(set (mem:BLK (reg:SI 1))
2425 (mem:BLK (reg:SI 2)))
2426 (unspec_volatile:BLK [(reg:SI 1) (reg:SI 2) (reg:SI 3)] UNSPEC_MOVSTR)
2427 (clobber (reg:SI 1))
2428 (clobber (reg:SI 2))
2429 (clobber (reg:SI 3))]
2437 [(set (match_operand:SI 0 "register_operand" "=r")
2438 (unspec_volatile:SI [(match_operand:SI 1 "register_operand" "r")
2439 (reg:SI 3)] UNSPEC_STRLEN))
2440 (clobber (reg:SI 1))
2441 (clobber (reg:SI 2))
2442 (clobber (reg:SI 3))
2455 (use (match_operand:SI 2 "register_operand")) ;; Length in bytes
2457 (unspec_volatile:BLK [(reg:SI 1) (reg:SI 2) (reg:SI 3)] UNSPEC_CPYMEM)]
2494 [(set (mem:BLK (reg:SI 1))
2495 (mem:BLK (reg:SI 2)))
2496 (use (reg:SI 3))
2497 (unspec_volatile:BLK [(reg:SI 1) (reg:SI 2) (reg:SI 3)] UNSPEC_CPYMEM)
2498 (clobber (reg:SI 1))
2499 (clobber (reg:SI 2))
2500 (clobber (reg:SI 3))]
2510 (use (match_operand:SI 1 "nonmemory_operand")) ;; Length
2512 (unspec_volatile:BLK [(reg:SI 1) (reg:SI 2) (reg:SI 3)] UNSPEC_SETMEM)]
2528 [(set (mem:BLK (reg:SI 1))
2529 (unspec_volatile:BLK [(reg:SI 1) (reg:SI 2) (reg:SI 3)] UNSPEC_SETMEM))
2530 (clobber (reg:SI 1))
2531 (clobber (reg:SI 3))]
2539 [(set (match_operand:SI 0 "register_operand") ;; Result
2540 (unspec_volatile:SI [(match_operand:BLK 1 "memory_operand") ;; String1
2543 (use (match_operand:SI 3 "register_operand")) ;; Max Length
2544 (match_operand:SI 4 "immediate_operand")] ;; Known Align
2561 [(set (match_operand:SI 0 "register_operand") ;; Result
2562 (unspec_volatile:SI [(match_operand:BLK 1 "memory_operand") ;; String1
2565 (match_operand:SI 3 "immediate_operand")] ;; Known Align
2582 [(set (match_operand:SI 0 "register_operand" "=r")
2583 (unspec_volatile:SI [(reg:SI 1) (reg:SI 2) (reg:SI 3)]
2587 (clobber (reg:SI 1))
2588 (clobber (reg:SI 2))
2589 (clobber (reg:SI 3))
2616 [(unspec:SI [(match_operand:SI 0 "register_operand" "r")
2617 (match_operand:SI 1 "register_operand" "r")]
2626 [(unspec:SI [(match_operand:SI 0 "register_operand" "r")
2627 (match_operand:SI 1 "register_operand" "r")]
2636 [(unspec:SI [(match_operand:SI 0 "register_operand" "r")
2637 (match_operand:SI 1 "register_operand" "r")]
2646 [(unspec:SI [(match_operand:SI 0 "register_operand" "r")
2647 (match_operand:SI 1 "register_operand" "r")]
2656 [(set (match_operand:SI 0 "register_operand" "=r")
2657 (unspec:SI [(const_int 0)]
2666 [(set (match_operand:SI 0 "register_operand" "=r")
2667 (unspec:SI [(const_int 0)]
2676 [(unspec_volatile:SI [(match_operand:SI 0 "register_operand" "r")]
2685 [(unspec_volatile:SI [(match_operand:SI 0 "register_operand" "r")]
2694 [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
2703 [(unspec:SI [(const_int 0) (reg:SI 1) (reg:SI 2) (reg:SI 3)
2704 (reg:SI 4) (reg:SI 5) (reg:SI 6)]
2706 (clobber (reg:SI 1))
2707 (clobber (reg:SI 2))
2708 (clobber (reg:SI 3))]
2719 [(set (match_operand:SI 0 "register_operand" "=r")
2720 (unspec:SI [(match_operand:SI 1 "register_operand" "r")]
2729 [(set (match_operand:SI 0 "register_operand" "=r,r")
2730 (unspec:SI [(match_operand:SF 1 "rx_compare_operand" "r,Q")]
2743 [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
2753 [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
2763 [(set (match_operand:SI 0 "register_operand" "=r")
2764 (unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "i")]
2775 [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i,i")
2776 (match_operand:SI 1 "nonmemory_operand" "r,i")]
2786 [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "Uint04")]
2807 [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
2832 [(set (match_operand:SI 0 "register_operand" "=r")
2833 (unspec:SI [(match_operand:SI 1 "immediate_operand" "i")
2834 (match_operand:SI 2 "immediate_operand" "i")]
2852 [(plus:SI (match_operand:SI 0)
2853 (const:SI (unspec:SI [(match_operand:SI 1)] UNSPEC_PID_ADDR)))]