dist/opcodes/i386-reg.tbl

22 st, Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33
24 al, Class=Reg|Instance=Accum|Byte, 0, 0, Dw2Inval, Dw2Inval
25 cl, Class=Reg|Instance=RegC|Byte, 0, 1, Dw2Inval, Dw2Inval
26 dl, Class=Reg|Byte, 0, 2, Dw2Inval, Dw2Inval
27 bl, Class=Reg|Byte, 0, 3, Dw2Inval, Dw2Inval
28 ah, Class=Reg|Byte, 0, 4, Dw2Inval, Dw2Inval
29 ch, Class=Reg|Byte, 0, 5, Dw2Inval, Dw2Inval
30 dh, Class=Reg|Byte, 0, 6, Dw2Inval, Dw2Inval
31 bh, Class=Reg|Byte, 0, 7, Dw2Inval, Dw2Inval
32 axl, Class=Reg|Byte, RegRex64, 0, Dw2Inval, Dw2Inval
33 cxl, Class=Reg|Byte, RegRex64, 1, Dw2Inval, Dw2Inval
34 dxl, Class=Reg|Byte, RegRex64, 2, Dw2Inval, Dw2Inval
35 bxl, Class=Reg|Byte, RegRex64, 3, Dw2Inval, Dw2Inval
36 spl, Class=Reg|Byte, RegRex64, 4, Dw2Inval, Dw2Inval
37 bpl, Class=Reg|Byte, RegRex64, 5, Dw2Inval, Dw2Inval
38 sil, Class=Reg|Byte, RegRex64, 6, Dw2Inval, Dw2Inval
39 dil, Class=Reg|Byte, RegRex64, 7, Dw2Inval, Dw2Inval
40 r8b, Class=Reg|Byte, RegRex|RegRex64, 0, Dw2Inval, Dw2Inval
41 r9b, Class=Reg|Byte, RegRex|RegRex64, 1, Dw2Inval, Dw2Inval
42 r10b, Class=Reg|Byte, RegRex|RegRex64, 2, Dw2Inval, Dw2Inval
43 r11b, Class=Reg|Byte, RegRex|RegRex64, 3, Dw2Inval, Dw2Inval
44 r12b, Class=Reg|Byte, RegRex|RegRex64, 4, Dw2Inval, Dw2Inval
45 r13b, Class=Reg|Byte, RegRex|RegRex64, 5, Dw2Inval, Dw2Inval
46 r14b, Class=Reg|Byte, RegRex|RegRex64, 6, Dw2Inval, Dw2Inval
47 r15b, Class=Reg|Byte, RegRex|RegRex64, 7, Dw2Inval, Dw2Inval
49 ax, Class=Reg|Instance=Accum|Word, 0, 0, Dw2Inval, Dw2Inval
50 cx, Class=Reg|Word, 0, 1, Dw2Inval, Dw2Inval
51 dx, Class=Reg|Instance=RegD|Word, 0, 2, Dw2Inval, Dw2Inval
52 bx, Class=Reg|Word|BaseIndex, 0, 3, Dw2Inval, Dw2Inval
53 sp, Class=Reg|Word, 0, 4, Dw2Inval, Dw2Inval
54 bp, Class=Reg|Word|BaseIndex, 0, 5, Dw2Inval, Dw2Inval
55 si, Class=Reg|Word|BaseIndex, 0, 6, Dw2Inval, Dw2Inval
56 di, Class=Reg|Word|BaseIndex, 0, 7, Dw2Inval, Dw2Inval
57 r8w, Class=Reg|Word, RegRex, 0, Dw2Inval, Dw2Inval
58 r9w, Class=Reg|Word, RegRex, 1, Dw2Inval, Dw2Inval
59 r10w, Class=Reg|Word, RegRex, 2, Dw2Inval, Dw2Inval
60 r11w, Class=Reg|Word, RegRex, 3, Dw2Inval, Dw2Inval
61 r12w, Class=Reg|Word, RegRex, 4, Dw2Inval, Dw2Inval
62 r13w, Class=Reg|Word, RegRex, 5, Dw2Inval, Dw2Inval
63 r14w, Class=Reg|Word, RegRex, 6, Dw2Inval, Dw2Inval
64 r15w, Class=Reg|Word, RegRex, 7, Dw2Inval, Dw2Inval
66 eax, Class=Reg|Instance=Accum|Dword|BaseIndex, 0, 0, 0, Dw2Inval
67 ecx, Class=Reg|Instance=RegC|Dword|BaseIndex, 0, 1, 1, Dw2Inval
68 edx, Class=Reg|Instance=RegD|Dword|BaseIndex, 0, 2, 2, Dw2Inval
69 ebx, Class=Reg|Instance=RegB|Dword|BaseIndex, 0, 3, 3, Dw2Inval
70 esp, Class=Reg|Dword, 0, 4, 4, Dw2Inval
71 ebp, Class=Reg|Dword|BaseIndex, 0, 5, 5, Dw2Inval
72 esi, Class=Reg|Dword|BaseIndex, 0, 6, 6, Dw2Inval
73 edi, Class=Reg|Dword|BaseIndex, 0, 7, 7, Dw2Inval
74 r8d, Class=Reg|Dword|BaseIndex, RegRex, 0, Dw2Inval, Dw2Inval
75 r9d, Class=Reg|Dword|BaseIndex, RegRex, 1, Dw2Inval, Dw2Inval
76 r10d, Class=Reg|Dword|BaseIndex, RegRex, 2, Dw2Inval, Dw2Inval
77 r11d, Class=Reg|Dword|BaseIndex, RegRex, 3, Dw2Inval, Dw2Inval
78 r12d, Class=Reg|Dword|BaseIndex, RegRex, 4, Dw2Inval, Dw2Inval
79 r13d, Class=Reg|Dword|BaseIndex, RegRex, 5, Dw2Inval, Dw2Inval
80 r14d, Class=Reg|Dword|BaseIndex, RegRex, 6, Dw2Inval, Dw2Inval
81 r15d, Class=Reg|Dword|BaseIndex, RegRex, 7, Dw2Inval, Dw2Inval
82 rax, Class=Reg|Instance=Accum|Qword|BaseIndex, 0, 0, Dw2Inval, 0
83 rcx, Class=Reg|Instance=RegC|Qword|BaseIndex, 0, 1, Dw2Inval, 2
84 rdx, Class=Reg|Instance=RegD|Qword|BaseIndex, 0, 2, Dw2Inval, 1
85 rbx, Class=Reg|Instance=RegB|Qword|BaseIndex, 0, 3, Dw2Inval, 3
86 rsp, Class=Reg|Qword, 0, 4, Dw2Inval, 7
87 rbp, Class=Reg|Qword|BaseIndex, 0, 5, Dw2Inval, 6
88 rsi, Class=Reg|Qword|BaseIndex, 0, 6, Dw2Inval, 4
89 rdi, Class=Reg|Qword|BaseIndex, 0, 7, Dw2Inval, 5
90 r8, Class=Reg|Qword|BaseIndex, RegRex, 0, Dw2Inval, 8
91 r9, Class=Reg|Qword|BaseIndex, RegRex, 1, Dw2Inval, 9
92 r10, Class=Reg|Qword|BaseIndex, RegRex, 2, Dw2Inval, 10
93 r11, Class=Reg|Qword|BaseIndex, RegRex, 3, Dw2Inval, 11
94 r12, Class=Reg|Qword|BaseIndex, RegRex, 4, Dw2Inval, 12
95 r13, Class=Reg|Qword|BaseIndex, RegRex, 5, Dw2Inval, 13
96 r14, Class=Reg|Qword|BaseIndex, RegRex, 6, Dw2Inval, 14
97 r15, Class=Reg|Qword|BaseIndex, RegRex, 7, Dw2Inval, 15
295 // No Class=Reg will make these registers rejected for all purposes except
299 // No Class=Reg will make these registers rejected for all purposes except
304 st(0), Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33
305 st(1), Class=Reg|Tbyte, 0, 1, 12, 34
306 st(2), Class=Reg|Tbyte, 0, 2, 13, 35
307 st(3), Class=Reg|Tbyte, 0, 3, 14, 36
308 st(4), Class=Reg|Tbyte, 0, 4, 15, 37
309 st(5), Class=Reg|Tbyte, 0, 5, 16, 38
310 st(6), Class=Reg|Tbyte, 0, 6, 17, 39
311 st(7), Class=Reg|Tbyte, 0, 7, 18, 40