Lines Matching refs:PULL
395 #define PULL PAD_CTL_PULL macro
418 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
419 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
420 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH),
421 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH),
429 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL),
430 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL),
431 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL),
432 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL),
433 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL),
434 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL),
486 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */
506 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K),
511 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
512 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
513 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
518 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */
530 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
531 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
534 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K),
535 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K),
536 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K),
591 #undef PULL