564 	reg = RW(reg, AR_GPIO_INPUT_MUX2_RFSILENT, 0);  in ar9003_rfsilent_init()
820 	reg = RW(reg, AR_RXBP_THRESH_HP, 1);  in ar9003_rx_enable()
821 	reg = RW(reg, AR_RXBP_THRESH_LP, 1);  in ar9003_rx_enable()
1864 	reg = RW(reg, AR_PHY_TIMING3_DSC_EXP, exp);  in ar9003_set_delta_slope()
1865 	reg = RW(reg, AR_PHY_TIMING3_DSC_MAN, man);  in ar9003_set_delta_slope()
1874 	reg = RW(reg, AR_PHY_SGI_DSC_EXP, exp);  in ar9003_set_delta_slope()
1875 	reg = RW(reg, AR_PHY_SGI_DSC_MAN, man);  in ar9003_set_delta_slope()
1966 		reg = RW(reg, AR_PHY_MAXCCA_PWR, nf[i]);  in ar9003_write_noisefloor()
1970 		reg = RW(reg, AR_PHY_EXT_MAXCCA_PWR, nf_ext[i]);  in ar9003_write_noisefloor()
2125 		reg = RW(reg, AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX, 10);  in ar9003_do_calib()
2202 		reg = RW(reg, AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF, i_coff);  in ar9003_calib_iq()
2203 		reg = RW(reg, AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF, q_coff);  in ar9003_calib_iq()
2345 	reg = RW(reg, AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT, DELPT);  in ar9003_calib_tx_iq()
2387 		reg = RW(reg, AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,  in ar9003_calib_tx_iq()
2392 		reg = RW(reg, AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_Q_COFF,  in ar9003_calib_tx_iq()
2394 		reg = RW(reg, AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_I_COFF,  in ar9003_calib_tx_iq()
2438 	reg = RW(reg, AR_PHY_PAPRD_AM2AM_MASK, ht20mask);  in ar9003_paprd_calib()
2443 	reg = RW(reg, AR_PHY_PAPRD_AM2PM_MASK, ht20mask);  in ar9003_paprd_calib()
2447 	reg = RW(reg, AR_PHY_PAPRD_HT40_MASK, ht40mask);  in ar9003_paprd_calib()
2455 		reg = RW(reg, AR_PHY_PAPRD_CTRL1_PA_GAIN_SCALE_FACT, 181);  in ar9003_paprd_calib()
2456 		reg = RW(reg, AR_PHY_PAPRD_CTRL1_MAG_SCALE_FACT, 361);  in ar9003_paprd_calib()
2463 		reg = RW(reg, AR_PHY_PAPRD_CTRL0_PAPRD_MAG_THRSH, 3);  in ar9003_paprd_calib()
2478 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL1_AGC2_SETTLING, 28);  in ar9003_paprd_calib()
2479 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL1_LB_SKIP, 0x30);  in ar9003_paprd_calib()
2490 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_FINE_CORR_LEN, 4);  in ar9003_paprd_calib()
2491 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_COARSE_CORR_LEN, 4);  in ar9003_paprd_calib()
2492 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_NUM_CORR_STAGES, 7);  in ar9003_paprd_calib()
2493 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_MIN_LOOPBACK_DEL, 1);  in ar9003_paprd_calib()
2495 		reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_QUICK_DROP, -3);  in ar9003_paprd_calib()
2497 		reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_QUICK_DROP, -6);  in ar9003_paprd_calib()
2498 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL3_ADC_DESIRED_SIZE, -15);  in ar9003_paprd_calib()
2503 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL4_SAFETY_DELTA, 0);  in ar9003_paprd_calib()
2504 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL4_MIN_CORR, 400);  in ar9003_paprd_calib()
2505 	reg = RW(reg, AR_PHY_PAPRD_TRAINER_CNTL4_NUM_TRAIN_SAMPLES, 100);  in ar9003_paprd_calib()
2510 		reg = RW(reg, AR_PHY_PAPRD_PRE_POST_SCALING, scaling[i]);  in ar9003_paprd_calib()
2579 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_TXBB1DBGAIN,  in ar9003_force_txgain()
2581 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_TXBB6DBGAIN,  in ar9003_force_txgain()
2583 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_TXMXRGAIN,  in ar9003_force_txgain()
2585 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_PADRVGNA,  in ar9003_force_txgain()
2587 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_PADRVGNB,  in ar9003_force_txgain()
2589 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_PADRVGNC,  in ar9003_force_txgain()
2591 	reg = RW(reg, AR_PHY_TX_FORCED_GAIN_PADRVGND,  in ar9003_force_txgain()
2598 	reg = RW(reg, AR_PHY_TPC_1_FORCED_DAC_GAIN, 0);  in ar9003_force_txgain()
2935 	reg = RW(reg, AR_PHY_PA_GAIN123_PA_GAIN1, sc->gain1[chain]);  in ar9003_enable_predistorter()
2940 	reg = RW(reg, AR_PHY_PAPRD_CTRL1_POWER_AT_AM2AM_CAL, sc->trainpow);  in ar9003_enable_predistorter()
3268 	reg = RW(reg, AR_PHY_DESIRED_SZ_TOT_DES, high ? -62 : -55);  in ar9003_set_noise_immunity_level()
3272 	reg = RW(reg, AR_PHY_AGC_COARSE_LOW, high ? -70 : -64);  in ar9003_set_noise_immunity_level()
3273 	reg = RW(reg, AR_PHY_AGC_COARSE_HIGH, high ? -12 : -14);  in ar9003_set_noise_immunity_level()
3277 	reg = RW(reg, AR_PHY_FIND_SIG_FIRPWR, high ? -80 : -78);  in ar9003_set_noise_immunity_level()
3288 	reg = RW(reg, AR_PHY_SFCORR_LOW_M1_THRESH_LOW, 50);  in ar9003_enable_ofdm_weak_signal()
3289 	reg = RW(reg, AR_PHY_SFCORR_LOW_M2_THRESH_LOW, 40);  in ar9003_enable_ofdm_weak_signal()
3290 	reg = RW(reg, AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, 48);  in ar9003_enable_ofdm_weak_signal()
3294 	reg = RW(reg, AR_PHY_SFCORR_M1_THRESH, 77);  in ar9003_enable_ofdm_weak_signal()
3295 	reg = RW(reg, AR_PHY_SFCORR_M2_THRESH, 64);  in ar9003_enable_ofdm_weak_signal()
3296 	reg = RW(reg, AR_PHY_SFCORR_M2COUNT_THR, 16);  in ar9003_enable_ofdm_weak_signal()
3300 	reg = RW(reg, AR_PHY_SFCORR_EXT_M1_THRESH_LOW, 50);  in ar9003_enable_ofdm_weak_signal()
3301 	reg = RW(reg, AR_PHY_SFCORR_EXT_M2_THRESH_LOW, 40);  in ar9003_enable_ofdm_weak_signal()
3302 	reg = RW(reg, AR_PHY_SFCORR_EXT_M1_THRESH, 77);  in ar9003_enable_ofdm_weak_signal()
3303 	reg = RW(reg, AR_PHY_SFCORR_EXT_M2_THRESH, 64);  in ar9003_enable_ofdm_weak_signal()
3317 	reg = RW(reg, AR_PHY_SFCORR_LOW_M1_THRESH_LOW, 127);  in ar9003_disable_ofdm_weak_signal()
3318 	reg = RW(reg, AR_PHY_SFCORR_LOW_M2_THRESH_LOW, 127);  in ar9003_disable_ofdm_weak_signal()
3319 	reg = RW(reg, AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, 63);  in ar9003_disable_ofdm_weak_signal()
3323 	reg = RW(reg, AR_PHY_SFCORR_M1_THRESH, 127);  in ar9003_disable_ofdm_weak_signal()
3324 	reg = RW(reg, AR_PHY_SFCORR_M2_THRESH, 127);  in ar9003_disable_ofdm_weak_signal()
3325 	reg = RW(reg, AR_PHY_SFCORR_M2COUNT_THR, 31);  in ar9003_disable_ofdm_weak_signal()
3329 	reg = RW(reg, AR_PHY_SFCORR_EXT_M1_THRESH_LOW, 127);  in ar9003_disable_ofdm_weak_signal()
3330 	reg = RW(reg, AR_PHY_SFCORR_EXT_M2_THRESH_LOW, 127);  in ar9003_disable_ofdm_weak_signal()
3331 	reg = RW(reg, AR_PHY_SFCORR_EXT_M1_THRESH, 127);  in ar9003_disable_ofdm_weak_signal()
3332 	reg = RW(reg, AR_PHY_SFCORR_EXT_M2_THRESH, 127);  in ar9003_disable_ofdm_weak_signal()
3346 	reg = RW(reg, AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, high ? 6 : 8);  in ar9003_set_cck_weak_signal()
3357 	reg = RW(reg, AR_PHY_FIND_SIG_FIRSTEP, level * 4);  in ar9003_set_firstep_level()
3368 	reg = RW(reg, AR_PHY_TIMING5_CYCPWR_THR1, (level + 1) * 2);  in ar9003_set_spur_immunity_level()