xref: /linux/include/acpi/actbl1.h (revision 6143f961)
1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /******************************************************************************
3  *
4  * Name: actbl1.h - Additional ACPI table definitions
5  *
6  * Copyright (C) 2000 - 2023, Intel Corp.
7  *
8  *****************************************************************************/
9 
10 #ifndef __ACTBL1_H__
11 #define __ACTBL1_H__
12 
13 /*******************************************************************************
14  *
15  * Additional ACPI Tables
16  *
17  * These tables are not consumed directly by the ACPICA subsystem, but are
18  * included here to support device drivers and the AML disassembler.
19  *
20  ******************************************************************************/
21 
22 /*
23  * Values for description table header signatures for tables defined in this
24  * file. Useful because they make it more difficult to inadvertently type in
25  * the wrong signature.
26  */
27 #define ACPI_SIG_AEST           "AEST"	/* Arm Error Source Table */
28 #define ACPI_SIG_ASF            "ASF!"	/* Alert Standard Format table */
29 #define ACPI_SIG_ASPT           "ASPT"	/* AMD Secure Processor Table */
30 #define ACPI_SIG_BERT           "BERT"	/* Boot Error Record Table */
31 #define ACPI_SIG_BGRT           "BGRT"	/* Boot Graphics Resource Table */
32 #define ACPI_SIG_BOOT           "BOOT"	/* Simple Boot Flag Table */
33 #define ACPI_SIG_CEDT           "CEDT"	/* CXL Early Discovery Table */
34 #define ACPI_SIG_CPEP           "CPEP"	/* Corrected Platform Error Polling table */
35 #define ACPI_SIG_CSRT           "CSRT"	/* Core System Resource Table */
36 #define ACPI_SIG_DBG2           "DBG2"	/* Debug Port table type 2 */
37 #define ACPI_SIG_DBGP           "DBGP"	/* Debug Port table */
38 #define ACPI_SIG_DMAR           "DMAR"	/* DMA Remapping table */
39 #define ACPI_SIG_DRTM           "DRTM"	/* Dynamic Root of Trust for Measurement table */
40 #define ACPI_SIG_ECDT           "ECDT"	/* Embedded Controller Boot Resources Table */
41 #define ACPI_SIG_EINJ           "EINJ"	/* Error Injection table */
42 #define ACPI_SIG_ERST           "ERST"	/* Error Record Serialization Table */
43 #define ACPI_SIG_FPDT           "FPDT"	/* Firmware Performance Data Table */
44 #define ACPI_SIG_GTDT           "GTDT"	/* Generic Timer Description Table */
45 #define ACPI_SIG_HEST           "HEST"	/* Hardware Error Source Table */
46 #define ACPI_SIG_HMAT           "HMAT"	/* Heterogeneous Memory Attributes Table */
47 #define ACPI_SIG_HPET           "HPET"	/* High Precision Event Timer table */
48 #define ACPI_SIG_IBFT           "IBFT"	/* iSCSI Boot Firmware Table */
49 #define ACPI_SIG_MSCT           "MSCT"	/* Maximum System Characteristics Table */
50 
51 #define ACPI_SIG_S3PT           "S3PT"	/* S3 Performance (sub)Table */
52 #define ACPI_SIG_PCCS           "PCC"	/* PCC Shared Memory Region */
53 
54 #define ACPI_SIG_NBFT		"NBFT"	/* NVMe Boot Firmware Table */
55 
56 /* Reserved table signatures */
57 
58 #define ACPI_SIG_MATR           "MATR"	/* Memory Address Translation Table */
59 #define ACPI_SIG_MSDM           "MSDM"	/* Microsoft Data Management Table */
60 
61 /*
62  * These tables have been seen in the field, but no definition has been found
63  */
64 #ifdef ACPI_UNDEFINED_TABLES
65 #define ACPI_SIG_ATKG           "ATKG"
66 #define ACPI_SIG_GSCI           "GSCI"	/* GMCH SCI table */
67 #define ACPI_SIG_IEIT           "IEIT"
68 #endif
69 
70 /*
71  * All tables must be byte-packed to match the ACPI specification, since
72  * the tables are provided by the system BIOS.
73  */
74 #pragma pack(1)
75 
76 /*
77  * Note: C bitfields are not used for this reason:
78  *
79  * "Bitfields are great and easy to read, but unfortunately the C language
80  * does not specify the layout of bitfields in memory, which means they are
81  * essentially useless for dealing with packed data in on-disk formats or
82  * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
83  * this decision was a design error in C. Ritchie could have picked an order
84  * and stuck with it." Norman Ramsey.
85  * See http://stackoverflow.com/a/1053662/41661
86  */
87 
88 /*******************************************************************************
89  *
90  * Common subtable headers
91  *
92  ******************************************************************************/
93 
94 /* Generic subtable header (used in MADT, SRAT, etc.) */
95 
96 struct acpi_subtable_header {
97 	u8 type;
98 	u8 length;
99 };
100 
101 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
102 
103 struct acpi_whea_header {
104 	u8 action;
105 	u8 instruction;
106 	u8 flags;
107 	u8 reserved;
108 	struct acpi_generic_address register_region;
109 	u64 value;		/* Value used with Read/Write register */
110 	u64 mask;		/* Bitmask required for this register instruction */
111 };
112 
113 /* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */
114 #define ASPT_REVISION_ID 0x01
115 struct acpi_table_aspt {
116 	struct acpi_table_header header;
117 	u32 num_entries;
118 };
119 
120 struct acpi_aspt_header {
121 	u16 type;
122 	u16 length;
123 };
124 
125 enum acpi_aspt_type {
126 	ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
127 	ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
128 	ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
129 };
130 
131 /* 0: ASPT Global Registers */
132 struct acpi_aspt_global_regs {
133 	struct acpi_aspt_header header;
134 	u32 reserved;
135 	u64 feature_reg_addr;
136 	u64 irq_en_reg_addr;
137 	u64 irq_st_reg_addr;
138 };
139 
140 /* 1: ASPT SEV Mailbox Registers */
141 struct acpi_aspt_sev_mbox_regs {
142 	struct acpi_aspt_header header;
143 	u8 mbox_irq_id;
144 	u8 reserved[3];
145 	u64 cmd_resp_reg_addr;
146 	u64 cmd_buf_lo_reg_addr;
147 	u64 cmd_buf_hi_reg_addr;
148 };
149 
150 /* 2: ASPT ACPI Mailbox Registers */
151 struct acpi_aspt_acpi_mbox_regs {
152 	struct acpi_aspt_header header;
153 	u32 reserved1;
154 	u64 cmd_resp_reg_addr;
155 	u64 reserved2[2];
156 };
157 
158 /*******************************************************************************
159  *
160  * ASF - Alert Standard Format table (Signature "ASF!")
161  *       Revision 0x10
162  *
163  * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
164  *
165  ******************************************************************************/
166 
167 struct acpi_table_asf {
168 	struct acpi_table_header header;	/* Common ACPI table header */
169 };
170 
171 /* ASF subtable header */
172 
173 struct acpi_asf_header {
174 	u8 type;
175 	u8 reserved;
176 	u16 length;
177 };
178 
179 /* Values for Type field above */
180 
181 enum acpi_asf_type {
182 	ACPI_ASF_TYPE_INFO = 0,
183 	ACPI_ASF_TYPE_ALERT = 1,
184 	ACPI_ASF_TYPE_CONTROL = 2,
185 	ACPI_ASF_TYPE_BOOT = 3,
186 	ACPI_ASF_TYPE_ADDRESS = 4,
187 	ACPI_ASF_TYPE_RESERVED = 5
188 };
189 
190 /*
191  * ASF subtables
192  */
193 
194 /* 0: ASF Information */
195 
196 struct acpi_asf_info {
197 	struct acpi_asf_header header;
198 	u8 min_reset_value;
199 	u8 min_poll_interval;
200 	u16 system_id;
201 	u32 mfg_id;
202 	u8 flags;
203 	u8 reserved2[3];
204 };
205 
206 /* Masks for Flags field above */
207 
208 #define ACPI_ASF_SMBUS_PROTOCOLS    (1)
209 
210 /* 1: ASF Alerts */
211 
212 struct acpi_asf_alert {
213 	struct acpi_asf_header header;
214 	u8 assert_mask;
215 	u8 deassert_mask;
216 	u8 alerts;
217 	u8 data_length;
218 };
219 
220 struct acpi_asf_alert_data {
221 	u8 address;
222 	u8 command;
223 	u8 mask;
224 	u8 value;
225 	u8 sensor_type;
226 	u8 type;
227 	u8 offset;
228 	u8 source_type;
229 	u8 severity;
230 	u8 sensor_number;
231 	u8 entity;
232 	u8 instance;
233 };
234 
235 /* 2: ASF Remote Control */
236 
237 struct acpi_asf_remote {
238 	struct acpi_asf_header header;
239 	u8 controls;
240 	u8 data_length;
241 	u16 reserved2;
242 };
243 
244 struct acpi_asf_control_data {
245 	u8 function;
246 	u8 address;
247 	u8 command;
248 	u8 value;
249 };
250 
251 /* 3: ASF RMCP Boot Options */
252 
253 struct acpi_asf_rmcp {
254 	struct acpi_asf_header header;
255 	u8 capabilities[7];
256 	u8 completion_code;
257 	u32 enterprise_id;
258 	u8 command;
259 	u16 parameter;
260 	u16 boot_options;
261 	u16 oem_parameters;
262 };
263 
264 /* 4: ASF Address */
265 
266 struct acpi_asf_address {
267 	struct acpi_asf_header header;
268 	u8 eprom_address;
269 	u8 devices;
270 };
271 
272 /*******************************************************************************
273  *
274  * BERT - Boot Error Record Table (ACPI 4.0)
275  *        Version 1
276  *
277  ******************************************************************************/
278 
279 struct acpi_table_bert {
280 	struct acpi_table_header header;	/* Common ACPI table header */
281 	u32 region_length;	/* Length of the boot error region */
282 	u64 address;		/* Physical address of the error region */
283 };
284 
285 /* Boot Error Region (not a subtable, pointed to by Address field above) */
286 
287 struct acpi_bert_region {
288 	u32 block_status;	/* Type of error information */
289 	u32 raw_data_offset;	/* Offset to raw error data */
290 	u32 raw_data_length;	/* Length of raw error data */
291 	u32 data_length;	/* Length of generic error data */
292 	u32 error_severity;	/* Severity code */
293 };
294 
295 /* Values for block_status flags above */
296 
297 #define ACPI_BERT_UNCORRECTABLE             (1)
298 #define ACPI_BERT_CORRECTABLE               (1<<1)
299 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE    (1<<2)
300 #define ACPI_BERT_MULTIPLE_CORRECTABLE      (1<<3)
301 #define ACPI_BERT_ERROR_ENTRY_COUNT         (0xFF<<4)	/* 8 bits, error count */
302 
303 /* Values for error_severity above */
304 
305 enum acpi_bert_error_severity {
306 	ACPI_BERT_ERROR_CORRECTABLE = 0,
307 	ACPI_BERT_ERROR_FATAL = 1,
308 	ACPI_BERT_ERROR_CORRECTED = 2,
309 	ACPI_BERT_ERROR_NONE = 3,
310 	ACPI_BERT_ERROR_RESERVED = 4	/* 4 and greater are reserved */
311 };
312 
313 /*
314  * Note: The generic error data that follows the error_severity field above
315  * uses the struct acpi_hest_generic_data defined under the HEST table below
316  */
317 
318 /*******************************************************************************
319  *
320  * BGRT - Boot Graphics Resource Table (ACPI 5.0)
321  *        Version 1
322  *
323  ******************************************************************************/
324 
325 struct acpi_table_bgrt {
326 	struct acpi_table_header header;	/* Common ACPI table header */
327 	u16 version;
328 	u8 status;
329 	u8 image_type;
330 	u64 image_address;
331 	u32 image_offset_x;
332 	u32 image_offset_y;
333 };
334 
335 /* Flags for Status field above */
336 
337 #define ACPI_BGRT_DISPLAYED                 (1)
338 #define ACPI_BGRT_ORIENTATION_OFFSET        (3 << 1)
339 
340 /*******************************************************************************
341  *
342  * BOOT - Simple Boot Flag Table
343  *        Version 1
344  *
345  * Conforms to the "Simple Boot Flag Specification", Version 2.1
346  *
347  ******************************************************************************/
348 
349 struct acpi_table_boot {
350 	struct acpi_table_header header;	/* Common ACPI table header */
351 	u8 cmos_index;		/* Index in CMOS RAM for the boot register */
352 	u8 reserved[3];
353 };
354 
355 /*******************************************************************************
356  *
357  * CDAT - Coherent Device Attribute Table
358  *        Version 1
359  *
360  * Conforms to the "Coherent Device Attribute Table (CDAT) Specification
361  " (Revision 1.01, October 2020.)
362  *
363  ******************************************************************************/
364 
365 struct acpi_table_cdat {
366 	u32 length;		/* Length of table in bytes, including this header */
367 	u8 revision;		/* ACPI Specification minor version number */
368 	u8 checksum;		/* To make sum of entire table == 0 */
369 	u8 reserved[6];
370 	u32 sequence;		/* Used to detect runtime CDAT table changes */
371 };
372 
373 /* CDAT common subtable header */
374 
375 struct acpi_cdat_header {
376 	u8 type;
377 	u8 reserved;
378 	u16 length;
379 };
380 
381 /* Values for Type field above */
382 
383 enum acpi_cdat_type {
384 	ACPI_CDAT_TYPE_DSMAS = 0,
385 	ACPI_CDAT_TYPE_DSLBIS = 1,
386 	ACPI_CDAT_TYPE_DSMSCIS = 2,
387 	ACPI_CDAT_TYPE_DSIS = 3,
388 	ACPI_CDAT_TYPE_DSEMTS = 4,
389 	ACPI_CDAT_TYPE_SSLBIS = 5,
390 	ACPI_CDAT_TYPE_RESERVED = 6	/* 6 through 0xFF are reserved */
391 };
392 
393 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */
394 
395 struct acpi_cdat_dsmas {
396 	u8 dsmad_handle;
397 	u8 flags;
398 	u16 reserved;
399 	u64 dpa_base_address;
400 	u64 dpa_length;
401 };
402 
403 /* Flags for subtable above */
404 
405 #define ACPI_CDAT_DSMAS_NON_VOLATILE        (1 << 2)
406 
407 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */
408 
409 struct acpi_cdat_dslbis {
410 	u8 handle;
411 	u8 flags;		/* If Handle matches a DSMAS handle, the definition of this field matches
412 				 * Flags field in HMAT System Locality Latency */
413 	u8 data_type;
414 	u8 reserved;
415 	u64 entry_base_unit;
416 	u16 entry[3];
417 	u16 reserved2;
418 };
419 
420 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */
421 
422 struct acpi_cdat_dsmscis {
423 	u8 dsmas_handle;
424 	u8 reserved[3];
425 	u64 side_cache_size;
426 	u32 cache_attributes;
427 };
428 
429 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */
430 
431 struct acpi_cdat_dsis {
432 	u8 flags;
433 	u8 handle;
434 	u16 reserved;
435 };
436 
437 /* Flags for above subtable */
438 
439 #define ACPI_CDAT_DSIS_MEM_ATTACHED         (1 << 0)
440 
441 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */
442 
443 struct acpi_cdat_dsemts {
444 	u8 dsmas_handle;
445 	u8 memory_type;
446 	u16 reserved;
447 	u64 dpa_offset;
448 	u64 range_length;
449 };
450 
451 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */
452 
453 struct acpi_cdat_sslbis {
454 	u8 data_type;
455 	u8 reserved[3];
456 	u64 entry_base_unit;
457 };
458 
459 /* Sub-subtable for above, sslbe_entries field */
460 
461 struct acpi_cdat_sslbe {
462 	u16 portx_id;
463 	u16 porty_id;
464 	u16 latency_or_bandwidth;
465 	u16 reserved;
466 };
467 
468 #define ACPI_CDAT_SSLBIS_US_PORT	0x0100
469 #define ACPI_CDAT_SSLBIS_ANY_PORT	0xffff
470 
471 /*******************************************************************************
472  *
473  * CEDT - CXL Early Discovery Table
474  *        Version 1
475  *
476  * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020)
477  *
478  ******************************************************************************/
479 
480 struct acpi_table_cedt {
481 	struct acpi_table_header header;	/* Common ACPI table header */
482 };
483 
484 /* CEDT subtable header (Performance Record Structure) */
485 
486 struct acpi_cedt_header {
487 	u8 type;
488 	u8 reserved;
489 	u16 length;
490 };
491 
492 /* Values for Type field above */
493 
494 enum acpi_cedt_type {
495 	ACPI_CEDT_TYPE_CHBS = 0,
496 	ACPI_CEDT_TYPE_CFMWS = 1,
497 	ACPI_CEDT_TYPE_CXIMS = 2,
498 	ACPI_CEDT_TYPE_RDPAS = 3,
499 	ACPI_CEDT_TYPE_RESERVED = 4,
500 };
501 
502 /* Values for version field above */
503 
504 #define ACPI_CEDT_CHBS_VERSION_CXL11    (0)
505 #define ACPI_CEDT_CHBS_VERSION_CXL20    (1)
506 
507 /* Values for length field above */
508 
509 #define ACPI_CEDT_CHBS_LENGTH_CXL11     (0x2000)
510 #define ACPI_CEDT_CHBS_LENGTH_CXL20     (0x10000)
511 
512 /*
513  * CEDT subtables
514  */
515 
516 /* 0: CXL Host Bridge Structure */
517 
518 struct acpi_cedt_chbs {
519 	struct acpi_cedt_header header;
520 	u32 uid;
521 	u32 cxl_version;
522 	u32 reserved;
523 	u64 base;
524 	u64 length;
525 };
526 
527 /* 1: CXL Fixed Memory Window Structure */
528 
529 struct acpi_cedt_cfmws {
530 	struct acpi_cedt_header header;
531 	u32 reserved1;
532 	u64 base_hpa;
533 	u64 window_size;
534 	u8 interleave_ways;
535 	u8 interleave_arithmetic;
536 	u16 reserved2;
537 	u32 granularity;
538 	u16 restrictions;
539 	u16 qtg_id;
540 	u32 interleave_targets[];
541 };
542 
543 struct acpi_cedt_cfmws_target_element {
544 	u32 interleave_target;
545 };
546 
547 /* Values for Interleave Arithmetic field above */
548 
549 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO   (0)
550 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR      (1)
551 
552 /* Values for Restrictions field above */
553 
554 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2      (1)
555 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3      (1<<1)
556 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE   (1<<2)
557 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM       (1<<3)
558 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED      (1<<4)
559 
560 /* 2: CXL XOR Interleave Math Structure */
561 
562 struct acpi_cedt_cxims {
563 	struct acpi_cedt_header header;
564 	u16 reserved1;
565 	u8 hbig;
566 	u8 nr_xormaps;
567 	u64 xormap_list[];
568 };
569 
570 struct acpi_cedt_cxims_target_element {
571 	u64 xormap;
572 };
573 
574 /* 3: CXL RCEC Downstream Port Association Structure */
575 
576 struct acpi_cedt_rdpas {
577 	struct acpi_cedt_header header;
578 	u16 segment;
579 	u16 bdf;
580 	u8 protocol;
581 	u64 address;
582 };
583 
584 /* Masks for bdf field above */
585 #define ACPI_CEDT_RDPAS_BUS_MASK            0xff00
586 #define ACPI_CEDT_RDPAS_DEVICE_MASK         0x00f8
587 #define ACPI_CEDT_RDPAS_FUNCTION_MASK       0x0007
588 
589 #define ACPI_CEDT_RDPAS_PROTOCOL_IO        (0)
590 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM  (1)
591 
592 /*******************************************************************************
593  *
594  * CPEP - Corrected Platform Error Polling table (ACPI 4.0)
595  *        Version 1
596  *
597  ******************************************************************************/
598 
599 struct acpi_table_cpep {
600 	struct acpi_table_header header;	/* Common ACPI table header */
601 	u64 reserved;
602 };
603 
604 /* Subtable */
605 
606 struct acpi_cpep_polling {
607 	struct acpi_subtable_header header;
608 	u8 id;			/* Processor ID */
609 	u8 eid;			/* Processor EID */
610 	u32 interval;		/* Polling interval (msec) */
611 };
612 
613 /*******************************************************************************
614  *
615  * CSRT - Core System Resource Table
616  *        Version 0
617  *
618  * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
619  *
620  ******************************************************************************/
621 
622 struct acpi_table_csrt {
623 	struct acpi_table_header header;	/* Common ACPI table header */
624 };
625 
626 /* Resource Group subtable */
627 
628 struct acpi_csrt_group {
629 	u32 length;
630 	u32 vendor_id;
631 	u32 subvendor_id;
632 	u16 device_id;
633 	u16 subdevice_id;
634 	u16 revision;
635 	u16 reserved;
636 	u32 shared_info_length;
637 
638 	/* Shared data immediately follows (Length = shared_info_length) */
639 };
640 
641 /* Shared Info subtable */
642 
643 struct acpi_csrt_shared_info {
644 	u16 major_version;
645 	u16 minor_version;
646 	u32 mmio_base_low;
647 	u32 mmio_base_high;
648 	u32 gsi_interrupt;
649 	u8 interrupt_polarity;
650 	u8 interrupt_mode;
651 	u8 num_channels;
652 	u8 dma_address_width;
653 	u16 base_request_line;
654 	u16 num_handshake_signals;
655 	u32 max_block_size;
656 
657 	/* Resource descriptors immediately follow (Length = Group length - shared_info_length) */
658 };
659 
660 /* Resource Descriptor subtable */
661 
662 struct acpi_csrt_descriptor {
663 	u32 length;
664 	u16 type;
665 	u16 subtype;
666 	u32 uid;
667 
668 	/* Resource-specific information immediately follows */
669 };
670 
671 /* Resource Types */
672 
673 #define ACPI_CSRT_TYPE_INTERRUPT    0x0001
674 #define ACPI_CSRT_TYPE_TIMER        0x0002
675 #define ACPI_CSRT_TYPE_DMA          0x0003
676 
677 /* Resource Subtypes */
678 
679 #define ACPI_CSRT_XRUPT_LINE        0x0000
680 #define ACPI_CSRT_XRUPT_CONTROLLER  0x0001
681 #define ACPI_CSRT_TIMER             0x0000
682 #define ACPI_CSRT_DMA_CHANNEL       0x0000
683 #define ACPI_CSRT_DMA_CONTROLLER    0x0001
684 
685 /*******************************************************************************
686  *
687  * DBG2 - Debug Port Table 2
688  *        Version 0 (Both main table and subtables)
689  *
690  * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020
691  *
692  ******************************************************************************/
693 
694 struct acpi_table_dbg2 {
695 	struct acpi_table_header header;	/* Common ACPI table header */
696 	u32 info_offset;
697 	u32 info_count;
698 };
699 
700 struct acpi_dbg2_header {
701 	u32 info_offset;
702 	u32 info_count;
703 };
704 
705 /* Debug Device Information Subtable */
706 
707 struct acpi_dbg2_device {
708 	u8 revision;
709 	u16 length;
710 	u8 register_count;	/* Number of base_address registers */
711 	u16 namepath_length;
712 	u16 namepath_offset;
713 	u16 oem_data_length;
714 	u16 oem_data_offset;
715 	u16 port_type;
716 	u16 port_subtype;
717 	u16 reserved;
718 	u16 base_address_offset;
719 	u16 address_size_offset;
720 	/*
721 	 * Data that follows:
722 	 *    base_address (required) - Each in 12-byte Generic Address Structure format.
723 	 *    address_size (required) - Array of u32 sizes corresponding to each base_address register.
724 	 *    Namepath    (required) - Null terminated string. Single dot if not supported.
725 	 *    oem_data    (optional) - Length is oem_data_length.
726 	 */
727 };
728 
729 /* Types for port_type field above */
730 
731 #define ACPI_DBG2_SERIAL_PORT       0x8000
732 #define ACPI_DBG2_1394_PORT         0x8001
733 #define ACPI_DBG2_USB_PORT          0x8002
734 #define ACPI_DBG2_NET_PORT          0x8003
735 
736 /* Subtypes for port_subtype field above */
737 
738 #define ACPI_DBG2_16550_COMPATIBLE  0x0000
739 #define ACPI_DBG2_16550_SUBSET      0x0001
740 #define ACPI_DBG2_MAX311XE_SPI      0x0002
741 #define ACPI_DBG2_ARM_PL011         0x0003
742 #define ACPI_DBG2_MSM8X60           0x0004
743 #define ACPI_DBG2_16550_NVIDIA      0x0005
744 #define ACPI_DBG2_TI_OMAP           0x0006
745 #define ACPI_DBG2_APM88XXXX         0x0008
746 #define ACPI_DBG2_MSM8974           0x0009
747 #define ACPI_DBG2_SAM5250           0x000A
748 #define ACPI_DBG2_INTEL_USIF        0x000B
749 #define ACPI_DBG2_IMX6              0x000C
750 #define ACPI_DBG2_ARM_SBSA_32BIT    0x000D
751 #define ACPI_DBG2_ARM_SBSA_GENERIC  0x000E
752 #define ACPI_DBG2_ARM_DCC           0x000F
753 #define ACPI_DBG2_BCM2835           0x0010
754 #define ACPI_DBG2_SDM845_1_8432MHZ  0x0011
755 #define ACPI_DBG2_16550_WITH_GAS    0x0012
756 #define ACPI_DBG2_SDM845_7_372MHZ   0x0013
757 #define ACPI_DBG2_INTEL_LPSS        0x0014
758 #define ACPI_DBG2_RISCV_SBI_CON     0x0015
759 
760 #define ACPI_DBG2_1394_STANDARD     0x0000
761 
762 #define ACPI_DBG2_USB_XHCI          0x0000
763 #define ACPI_DBG2_USB_EHCI          0x0001
764 
765 /*******************************************************************************
766  *
767  * DBGP - Debug Port table
768  *        Version 1
769  *
770  * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
771  *
772  ******************************************************************************/
773 
774 struct acpi_table_dbgp {
775 	struct acpi_table_header header;	/* Common ACPI table header */
776 	u8 type;		/* 0=full 16550, 1=subset of 16550 */
777 	u8 reserved[3];
778 	struct acpi_generic_address debug_port;
779 };
780 
781 /*******************************************************************************
782  *
783  * DMAR - DMA Remapping table
784  *        Version 1
785  *
786  * Conforms to "Intel Virtualization Technology for Directed I/O",
787  * Version 2.3, October 2014
788  *
789  ******************************************************************************/
790 
791 struct acpi_table_dmar {
792 	struct acpi_table_header header;	/* Common ACPI table header */
793 	u8 width;		/* Host Address Width */
794 	u8 flags;
795 	u8 reserved[10];
796 };
797 
798 /* Masks for Flags field above */
799 
800 #define ACPI_DMAR_INTR_REMAP        (1)
801 #define ACPI_DMAR_X2APIC_OPT_OUT    (1<<1)
802 #define ACPI_DMAR_X2APIC_MODE       (1<<2)
803 
804 /* DMAR subtable header */
805 
806 struct acpi_dmar_header {
807 	u16 type;
808 	u16 length;
809 };
810 
811 /* Values for subtable type in struct acpi_dmar_header */
812 
813 enum acpi_dmar_type {
814 	ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
815 	ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
816 	ACPI_DMAR_TYPE_ROOT_ATS = 2,
817 	ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
818 	ACPI_DMAR_TYPE_NAMESPACE = 4,
819 	ACPI_DMAR_TYPE_SATC = 5,
820 	ACPI_DMAR_TYPE_RESERVED = 6	/* 6 and greater are reserved */
821 };
822 
823 /* DMAR Device Scope structure */
824 
825 struct acpi_dmar_device_scope {
826 	u8 entry_type;
827 	u8 length;
828 	u16 reserved;
829 	u8 enumeration_id;
830 	u8 bus;
831 };
832 
833 /* Values for entry_type in struct acpi_dmar_device_scope - device types */
834 
835 enum acpi_dmar_scope_type {
836 	ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
837 	ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
838 	ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
839 	ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
840 	ACPI_DMAR_SCOPE_TYPE_HPET = 4,
841 	ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
842 	ACPI_DMAR_SCOPE_TYPE_RESERVED = 6	/* 6 and greater are reserved */
843 };
844 
845 struct acpi_dmar_pci_path {
846 	u8 device;
847 	u8 function;
848 };
849 
850 /*
851  * DMAR Subtables, correspond to Type in struct acpi_dmar_header
852  */
853 
854 /* 0: Hardware Unit Definition */
855 
856 struct acpi_dmar_hardware_unit {
857 	struct acpi_dmar_header header;
858 	u8 flags;
859 	u8 size;		/* Size of the register set */
860 	u16 segment;
861 	u64 address;		/* Register Base Address */
862 };
863 
864 /* Masks for Flags field above */
865 
866 #define ACPI_DMAR_INCLUDE_ALL       (1)
867 
868 /* 1: Reserved Memory Definition */
869 
870 struct acpi_dmar_reserved_memory {
871 	struct acpi_dmar_header header;
872 	u16 reserved;
873 	u16 segment;
874 	u64 base_address;	/* 4K aligned base address */
875 	u64 end_address;	/* 4K aligned limit address */
876 };
877 
878 /* Masks for Flags field above */
879 
880 #define ACPI_DMAR_ALLOW_ALL         (1)
881 
882 /* 2: Root Port ATS Capability Reporting Structure */
883 
884 struct acpi_dmar_atsr {
885 	struct acpi_dmar_header header;
886 	u8 flags;
887 	u8 reserved;
888 	u16 segment;
889 };
890 
891 /* Masks for Flags field above */
892 
893 #define ACPI_DMAR_ALL_PORTS         (1)
894 
895 /* 3: Remapping Hardware Static Affinity Structure */
896 
897 struct acpi_dmar_rhsa {
898 	struct acpi_dmar_header header;
899 	u32 reserved;
900 	u64 base_address;
901 	u32 proximity_domain;
902 };
903 
904 /* 4: ACPI Namespace Device Declaration Structure */
905 
906 struct acpi_dmar_andd {
907 	struct acpi_dmar_header header;
908 	u8 reserved[3];
909 	u8 device_number;
910 	union {
911 		char __pad;
912 		 ACPI_FLEX_ARRAY(char, device_name);
913 	};
914 };
915 
916 /* 5: SOC Integrated Address Translation Cache Reporting Structure */
917 
918 struct acpi_dmar_satc {
919 	struct acpi_dmar_header header;
920 	u8 flags;
921 	u8 reserved;
922 	u16 segment;
923 };
924 /*******************************************************************************
925  *
926  * DRTM - Dynamic Root of Trust for Measurement table
927  * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0
928  * Table version 1
929  *
930  ******************************************************************************/
931 
932 struct acpi_table_drtm {
933 	struct acpi_table_header header;	/* Common ACPI table header */
934 	u64 entry_base_address;
935 	u64 entry_length;
936 	u32 entry_address32;
937 	u64 entry_address64;
938 	u64 exit_address;
939 	u64 log_area_address;
940 	u32 log_area_length;
941 	u64 arch_dependent_address;
942 	u32 flags;
943 };
944 
945 /* Flag Definitions for above */
946 
947 #define ACPI_DRTM_ACCESS_ALLOWED            (1)
948 #define ACPI_DRTM_ENABLE_GAP_CODE           (1<<1)
949 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS   (1<<2)
950 #define ACPI_DRTM_AUTHORITY_ORDER           (1<<3)
951 
952 /* 1) Validated Tables List (64-bit addresses) */
953 
954 struct acpi_drtm_vtable_list {
955 	u32 validated_table_count;
956 	u64 validated_tables[];
957 };
958 
959 /* 2) Resources List (of Resource Descriptors) */
960 
961 /* Resource Descriptor */
962 
963 struct acpi_drtm_resource {
964 	u8 size[7];
965 	u8 type;
966 	u64 address;
967 };
968 
969 struct acpi_drtm_resource_list {
970 	u32 resource_count;
971 	struct acpi_drtm_resource resources[];
972 };
973 
974 /* 3) Platform-specific Identifiers List */
975 
976 struct acpi_drtm_dps_id {
977 	u32 dps_id_length;
978 	u8 dps_id[16];
979 };
980 
981 /*******************************************************************************
982  *
983  * ECDT - Embedded Controller Boot Resources Table
984  *        Version 1
985  *
986  ******************************************************************************/
987 
988 struct acpi_table_ecdt {
989 	struct acpi_table_header header;	/* Common ACPI table header */
990 	struct acpi_generic_address control;	/* Address of EC command/status register */
991 	struct acpi_generic_address data;	/* Address of EC data register */
992 	u32 uid;		/* Unique ID - must be same as the EC _UID method */
993 	u8 gpe;			/* The GPE for the EC */
994 	u8 id[];		/* Full namepath of the EC in the ACPI namespace */
995 };
996 
997 /*******************************************************************************
998  *
999  * EINJ - Error Injection Table (ACPI 4.0)
1000  *        Version 1
1001  *
1002  ******************************************************************************/
1003 
1004 struct acpi_table_einj {
1005 	struct acpi_table_header header;	/* Common ACPI table header */
1006 	u32 header_length;
1007 	u8 flags;
1008 	u8 reserved[3];
1009 	u32 entries;
1010 };
1011 
1012 /* EINJ Injection Instruction Entries (actions) */
1013 
1014 struct acpi_einj_entry {
1015 	struct acpi_whea_header whea_header;	/* Common header for WHEA tables */
1016 };
1017 
1018 /* Masks for Flags field above */
1019 
1020 #define ACPI_EINJ_PRESERVE          (1)
1021 
1022 /* Values for Action field above */
1023 
1024 enum acpi_einj_actions {
1025 	ACPI_EINJ_BEGIN_OPERATION = 0,
1026 	ACPI_EINJ_GET_TRIGGER_TABLE = 1,
1027 	ACPI_EINJ_SET_ERROR_TYPE = 2,
1028 	ACPI_EINJ_GET_ERROR_TYPE = 3,
1029 	ACPI_EINJ_END_OPERATION = 4,
1030 	ACPI_EINJ_EXECUTE_OPERATION = 5,
1031 	ACPI_EINJ_CHECK_BUSY_STATUS = 6,
1032 	ACPI_EINJ_GET_COMMAND_STATUS = 7,
1033 	ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
1034 	ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
1035 	ACPI_EINJ_ACTION_RESERVED = 10,	/* 10 and greater are reserved */
1036 	ACPI_EINJ_TRIGGER_ERROR = 0xFF	/* Except for this value */
1037 };
1038 
1039 /* Values for Instruction field above */
1040 
1041 enum acpi_einj_instructions {
1042 	ACPI_EINJ_READ_REGISTER = 0,
1043 	ACPI_EINJ_READ_REGISTER_VALUE = 1,
1044 	ACPI_EINJ_WRITE_REGISTER = 2,
1045 	ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
1046 	ACPI_EINJ_NOOP = 4,
1047 	ACPI_EINJ_FLUSH_CACHELINE = 5,
1048 	ACPI_EINJ_INSTRUCTION_RESERVED = 6	/* 6 and greater are reserved */
1049 };
1050 
1051 struct acpi_einj_error_type_with_addr {
1052 	u32 error_type;
1053 	u32 vendor_struct_offset;
1054 	u32 flags;
1055 	u32 apic_id;
1056 	u64 address;
1057 	u64 range;
1058 	u32 pcie_id;
1059 };
1060 
1061 struct acpi_einj_vendor {
1062 	u32 length;
1063 	u32 pcie_id;
1064 	u16 vendor_id;
1065 	u16 device_id;
1066 	u8 revision_id;
1067 	u8 reserved[3];
1068 };
1069 
1070 /* EINJ Trigger Error Action Table */
1071 
1072 struct acpi_einj_trigger {
1073 	u32 header_size;
1074 	u32 revision;
1075 	u32 table_size;
1076 	u32 entry_count;
1077 };
1078 
1079 /* Command status return values */
1080 
1081 enum acpi_einj_command_status {
1082 	ACPI_EINJ_SUCCESS = 0,
1083 	ACPI_EINJ_FAILURE = 1,
1084 	ACPI_EINJ_INVALID_ACCESS = 2,
1085 	ACPI_EINJ_STATUS_RESERVED = 3	/* 3 and greater are reserved */
1086 };
1087 
1088 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */
1089 
1090 #define ACPI_EINJ_PROCESSOR_CORRECTABLE     (1)
1091 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE   (1<<1)
1092 #define ACPI_EINJ_PROCESSOR_FATAL           (1<<2)
1093 #define ACPI_EINJ_MEMORY_CORRECTABLE        (1<<3)
1094 #define ACPI_EINJ_MEMORY_UNCORRECTABLE      (1<<4)
1095 #define ACPI_EINJ_MEMORY_FATAL              (1<<5)
1096 #define ACPI_EINJ_PCIX_CORRECTABLE          (1<<6)
1097 #define ACPI_EINJ_PCIX_UNCORRECTABLE        (1<<7)
1098 #define ACPI_EINJ_PCIX_FATAL                (1<<8)
1099 #define ACPI_EINJ_PLATFORM_CORRECTABLE      (1<<9)
1100 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE    (1<<10)
1101 #define ACPI_EINJ_PLATFORM_FATAL            (1<<11)
1102 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE     (1<<12)
1103 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE   (1<<13)
1104 #define ACPI_EINJ_CXL_CACHE_FATAL           (1<<14)
1105 #define ACPI_EINJ_CXL_MEM_CORRECTABLE       (1<<15)
1106 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE     (1<<16)
1107 #define ACPI_EINJ_CXL_MEM_FATAL             (1<<17)
1108 #define ACPI_EINJ_VENDOR_DEFINED            (1<<31)
1109 
1110 /*******************************************************************************
1111  *
1112  * ERST - Error Record Serialization Table (ACPI 4.0)
1113  *        Version 1
1114  *
1115  ******************************************************************************/
1116 
1117 struct acpi_table_erst {
1118 	struct acpi_table_header header;	/* Common ACPI table header */
1119 	u32 header_length;
1120 	u32 reserved;
1121 	u32 entries;
1122 };
1123 
1124 /* ERST Serialization Entries (actions) */
1125 
1126 struct acpi_erst_entry {
1127 	struct acpi_whea_header whea_header;	/* Common header for WHEA tables */
1128 };
1129 
1130 /* Masks for Flags field above */
1131 
1132 #define ACPI_ERST_PRESERVE          (1)
1133 
1134 /* Values for Action field above */
1135 
1136 enum acpi_erst_actions {
1137 	ACPI_ERST_BEGIN_WRITE = 0,
1138 	ACPI_ERST_BEGIN_READ = 1,
1139 	ACPI_ERST_BEGIN_CLEAR = 2,
1140 	ACPI_ERST_END = 3,
1141 	ACPI_ERST_SET_RECORD_OFFSET = 4,
1142 	ACPI_ERST_EXECUTE_OPERATION = 5,
1143 	ACPI_ERST_CHECK_BUSY_STATUS = 6,
1144 	ACPI_ERST_GET_COMMAND_STATUS = 7,
1145 	ACPI_ERST_GET_RECORD_ID = 8,
1146 	ACPI_ERST_SET_RECORD_ID = 9,
1147 	ACPI_ERST_GET_RECORD_COUNT = 10,
1148 	ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1149 	ACPI_ERST_NOT_USED = 12,
1150 	ACPI_ERST_GET_ERROR_RANGE = 13,
1151 	ACPI_ERST_GET_ERROR_LENGTH = 14,
1152 	ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1153 	ACPI_ERST_EXECUTE_TIMINGS = 16,
1154 	ACPI_ERST_ACTION_RESERVED = 17	/* 17 and greater are reserved */
1155 };
1156 
1157 /* Values for Instruction field above */
1158 
1159 enum acpi_erst_instructions {
1160 	ACPI_ERST_READ_REGISTER = 0,
1161 	ACPI_ERST_READ_REGISTER_VALUE = 1,
1162 	ACPI_ERST_WRITE_REGISTER = 2,
1163 	ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1164 	ACPI_ERST_NOOP = 4,
1165 	ACPI_ERST_LOAD_VAR1 = 5,
1166 	ACPI_ERST_LOAD_VAR2 = 6,
1167 	ACPI_ERST_STORE_VAR1 = 7,
1168 	ACPI_ERST_ADD = 8,
1169 	ACPI_ERST_SUBTRACT = 9,
1170 	ACPI_ERST_ADD_VALUE = 10,
1171 	ACPI_ERST_SUBTRACT_VALUE = 11,
1172 	ACPI_ERST_STALL = 12,
1173 	ACPI_ERST_STALL_WHILE_TRUE = 13,
1174 	ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1175 	ACPI_ERST_GOTO = 15,
1176 	ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1177 	ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1178 	ACPI_ERST_MOVE_DATA = 18,
1179 	ACPI_ERST_INSTRUCTION_RESERVED = 19	/* 19 and greater are reserved */
1180 };
1181 
1182 /* Command status return values */
1183 
1184 enum acpi_erst_command_status {
1185 	ACPI_ERST_SUCCESS = 0,
1186 	ACPI_ERST_NO_SPACE = 1,
1187 	ACPI_ERST_NOT_AVAILABLE = 2,
1188 	ACPI_ERST_FAILURE = 3,
1189 	ACPI_ERST_RECORD_EMPTY = 4,
1190 	ACPI_ERST_NOT_FOUND = 5,
1191 	ACPI_ERST_STATUS_RESERVED = 6	/* 6 and greater are reserved */
1192 };
1193 
1194 /* Error Record Serialization Information */
1195 
1196 struct acpi_erst_info {
1197 	u16 signature;		/* Should be "ER" */
1198 	u8 data[48];
1199 };
1200 
1201 /*******************************************************************************
1202  *
1203  * FPDT - Firmware Performance Data Table (ACPI 5.0)
1204  *        Version 1
1205  *
1206  ******************************************************************************/
1207 
1208 struct acpi_table_fpdt {
1209 	struct acpi_table_header header;	/* Common ACPI table header */
1210 };
1211 
1212 /* FPDT subtable header (Performance Record Structure) */
1213 
1214 struct acpi_fpdt_header {
1215 	u16 type;
1216 	u8 length;
1217 	u8 revision;
1218 };
1219 
1220 /* Values for Type field above */
1221 
1222 enum acpi_fpdt_type {
1223 	ACPI_FPDT_TYPE_BOOT = 0,
1224 	ACPI_FPDT_TYPE_S3PERF = 1
1225 };
1226 
1227 /*
1228  * FPDT subtables
1229  */
1230 
1231 /* 0: Firmware Basic Boot Performance Record */
1232 
1233 struct acpi_fpdt_boot_pointer {
1234 	struct acpi_fpdt_header header;
1235 	u8 reserved[4];
1236 	u64 address;
1237 };
1238 
1239 /* 1: S3 Performance Table Pointer Record */
1240 
1241 struct acpi_fpdt_s3pt_pointer {
1242 	struct acpi_fpdt_header header;
1243 	u8 reserved[4];
1244 	u64 address;
1245 };
1246 
1247 /*
1248  * S3PT - S3 Performance Table. This table is pointed to by the
1249  * S3 Pointer Record above.
1250  */
1251 struct acpi_table_s3pt {
1252 	u8 signature[4];	/* "S3PT" */
1253 	u32 length;
1254 };
1255 
1256 /*
1257  * S3PT Subtables (Not part of the actual FPDT)
1258  */
1259 
1260 /* Values for Type field in S3PT header */
1261 
1262 enum acpi_s3pt_type {
1263 	ACPI_S3PT_TYPE_RESUME = 0,
1264 	ACPI_S3PT_TYPE_SUSPEND = 1,
1265 	ACPI_FPDT_BOOT_PERFORMANCE = 2
1266 };
1267 
1268 struct acpi_s3pt_resume {
1269 	struct acpi_fpdt_header header;
1270 	u32 resume_count;
1271 	u64 full_resume;
1272 	u64 average_resume;
1273 };
1274 
1275 struct acpi_s3pt_suspend {
1276 	struct acpi_fpdt_header header;
1277 	u64 suspend_start;
1278 	u64 suspend_end;
1279 };
1280 
1281 /*
1282  * FPDT Boot Performance Record (Not part of the actual FPDT)
1283  */
1284 struct acpi_fpdt_boot {
1285 	struct acpi_fpdt_header header;
1286 	u8 reserved[4];
1287 	u64 reset_end;
1288 	u64 load_start;
1289 	u64 startup_start;
1290 	u64 exit_services_entry;
1291 	u64 exit_services_exit;
1292 };
1293 
1294 /*******************************************************************************
1295  *
1296  * GTDT - Generic Timer Description Table (ACPI 5.1)
1297  *        Version 2
1298  *
1299  ******************************************************************************/
1300 
1301 struct acpi_table_gtdt {
1302 	struct acpi_table_header header;	/* Common ACPI table header */
1303 	u64 counter_block_addresss;
1304 	u32 reserved;
1305 	u32 secure_el1_interrupt;
1306 	u32 secure_el1_flags;
1307 	u32 non_secure_el1_interrupt;
1308 	u32 non_secure_el1_flags;
1309 	u32 virtual_timer_interrupt;
1310 	u32 virtual_timer_flags;
1311 	u32 non_secure_el2_interrupt;
1312 	u32 non_secure_el2_flags;
1313 	u64 counter_read_block_address;
1314 	u32 platform_timer_count;
1315 	u32 platform_timer_offset;
1316 };
1317 
1318 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */
1319 
1320 #define ACPI_GTDT_INTERRUPT_MODE        (1)
1321 #define ACPI_GTDT_INTERRUPT_POLARITY    (1<<1)
1322 #define ACPI_GTDT_ALWAYS_ON             (1<<2)
1323 
1324 struct acpi_gtdt_el2 {
1325 	u32 virtual_el2_timer_gsiv;
1326 	u32 virtual_el2_timer_flags;
1327 };
1328 
1329 /* Common GTDT subtable header */
1330 
1331 struct acpi_gtdt_header {
1332 	u8 type;
1333 	u16 length;
1334 };
1335 
1336 /* Values for GTDT subtable type above */
1337 
1338 enum acpi_gtdt_type {
1339 	ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1340 	ACPI_GTDT_TYPE_WATCHDOG = 1,
1341 	ACPI_GTDT_TYPE_RESERVED = 2	/* 2 and greater are reserved */
1342 };
1343 
1344 /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */
1345 
1346 /* 0: Generic Timer Block */
1347 
1348 struct acpi_gtdt_timer_block {
1349 	struct acpi_gtdt_header header;
1350 	u8 reserved;
1351 	u64 block_address;
1352 	u32 timer_count;
1353 	u32 timer_offset;
1354 };
1355 
1356 /* Timer Sub-Structure, one per timer */
1357 
1358 struct acpi_gtdt_timer_entry {
1359 	u8 frame_number;
1360 	u8 reserved[3];
1361 	u64 base_address;
1362 	u64 el0_base_address;
1363 	u32 timer_interrupt;
1364 	u32 timer_flags;
1365 	u32 virtual_timer_interrupt;
1366 	u32 virtual_timer_flags;
1367 	u32 common_flags;
1368 };
1369 
1370 /* Flag Definitions: timer_flags and virtual_timer_flags above */
1371 
1372 #define ACPI_GTDT_GT_IRQ_MODE               (1)
1373 #define ACPI_GTDT_GT_IRQ_POLARITY           (1<<1)
1374 
1375 /* Flag Definitions: common_flags above */
1376 
1377 #define ACPI_GTDT_GT_IS_SECURE_TIMER        (1)
1378 #define ACPI_GTDT_GT_ALWAYS_ON              (1<<1)
1379 
1380 /* 1: SBSA Generic Watchdog Structure */
1381 
1382 struct acpi_gtdt_watchdog {
1383 	struct acpi_gtdt_header header;
1384 	u8 reserved;
1385 	u64 refresh_frame_address;
1386 	u64 control_frame_address;
1387 	u32 timer_interrupt;
1388 	u32 timer_flags;
1389 };
1390 
1391 /* Flag Definitions: timer_flags above */
1392 
1393 #define ACPI_GTDT_WATCHDOG_IRQ_MODE         (1)
1394 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY     (1<<1)
1395 #define ACPI_GTDT_WATCHDOG_SECURE           (1<<2)
1396 
1397 /*******************************************************************************
1398  *
1399  * HEST - Hardware Error Source Table (ACPI 4.0)
1400  *        Version 1
1401  *
1402  ******************************************************************************/
1403 
1404 struct acpi_table_hest {
1405 	struct acpi_table_header header;	/* Common ACPI table header */
1406 	u32 error_source_count;
1407 };
1408 
1409 /* HEST subtable header */
1410 
1411 struct acpi_hest_header {
1412 	u16 type;
1413 	u16 source_id;
1414 };
1415 
1416 /* Values for Type field above for subtables */
1417 
1418 enum acpi_hest_types {
1419 	ACPI_HEST_TYPE_IA32_CHECK = 0,
1420 	ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1421 	ACPI_HEST_TYPE_IA32_NMI = 2,
1422 	ACPI_HEST_TYPE_NOT_USED3 = 3,
1423 	ACPI_HEST_TYPE_NOT_USED4 = 4,
1424 	ACPI_HEST_TYPE_NOT_USED5 = 5,
1425 	ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1426 	ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1427 	ACPI_HEST_TYPE_AER_BRIDGE = 8,
1428 	ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1429 	ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1430 	ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1431 	ACPI_HEST_TYPE_RESERVED = 12	/* 12 and greater are reserved */
1432 };
1433 
1434 /*
1435  * HEST substructures contained in subtables
1436  */
1437 
1438 /*
1439  * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and
1440  * struct acpi_hest_ia_corrected structures.
1441  */
1442 struct acpi_hest_ia_error_bank {
1443 	u8 bank_number;
1444 	u8 clear_status_on_init;
1445 	u8 status_format;
1446 	u8 reserved;
1447 	u32 control_register;
1448 	u64 control_data;
1449 	u32 status_register;
1450 	u32 address_register;
1451 	u32 misc_register;
1452 };
1453 
1454 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */
1455 
1456 struct acpi_hest_aer_common {
1457 	u16 reserved1;
1458 	u8 flags;
1459 	u8 enabled;
1460 	u32 records_to_preallocate;
1461 	u32 max_sections_per_record;
1462 	u32 bus;		/* Bus and Segment numbers */
1463 	u16 device;
1464 	u16 function;
1465 	u16 device_control;
1466 	u16 reserved2;
1467 	u32 uncorrectable_mask;
1468 	u32 uncorrectable_severity;
1469 	u32 correctable_mask;
1470 	u32 advanced_capabilities;
1471 };
1472 
1473 /* Masks for HEST Flags fields */
1474 
1475 #define ACPI_HEST_FIRMWARE_FIRST        (1)
1476 #define ACPI_HEST_GLOBAL                (1<<1)
1477 #define ACPI_HEST_GHES_ASSIST           (1<<2)
1478 
1479 /*
1480  * Macros to access the bus/segment numbers in Bus field above:
1481  *  Bus number is encoded in bits 7:0
1482  *  Segment number is encoded in bits 23:8
1483  */
1484 #define ACPI_HEST_BUS(bus)              ((bus) & 0xFF)
1485 #define ACPI_HEST_SEGMENT(bus)          (((bus) >> 8) & 0xFFFF)
1486 
1487 /* Hardware Error Notification */
1488 
1489 struct acpi_hest_notify {
1490 	u8 type;
1491 	u8 length;
1492 	u16 config_write_enable;
1493 	u32 poll_interval;
1494 	u32 vector;
1495 	u32 polling_threshold_value;
1496 	u32 polling_threshold_window;
1497 	u32 error_threshold_value;
1498 	u32 error_threshold_window;
1499 };
1500 
1501 /* Values for Notify Type field above */
1502 
1503 enum acpi_hest_notify_types {
1504 	ACPI_HEST_NOTIFY_POLLED = 0,
1505 	ACPI_HEST_NOTIFY_EXTERNAL = 1,
1506 	ACPI_HEST_NOTIFY_LOCAL = 2,
1507 	ACPI_HEST_NOTIFY_SCI = 3,
1508 	ACPI_HEST_NOTIFY_NMI = 4,
1509 	ACPI_HEST_NOTIFY_CMCI = 5,	/* ACPI 5.0 */
1510 	ACPI_HEST_NOTIFY_MCE = 6,	/* ACPI 5.0 */
1511 	ACPI_HEST_NOTIFY_GPIO = 7,	/* ACPI 6.0 */
1512 	ACPI_HEST_NOTIFY_SEA = 8,	/* ACPI 6.1 */
1513 	ACPI_HEST_NOTIFY_SEI = 9,	/* ACPI 6.1 */
1514 	ACPI_HEST_NOTIFY_GSIV = 10,	/* ACPI 6.1 */
1515 	ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11,	/* ACPI 6.2 */
1516 	ACPI_HEST_NOTIFY_RESERVED = 12	/* 12 and greater are reserved */
1517 };
1518 
1519 /* Values for config_write_enable bitfield above */
1520 
1521 #define ACPI_HEST_TYPE                  (1)
1522 #define ACPI_HEST_POLL_INTERVAL         (1<<1)
1523 #define ACPI_HEST_POLL_THRESHOLD_VALUE  (1<<2)
1524 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1525 #define ACPI_HEST_ERR_THRESHOLD_VALUE   (1<<4)
1526 #define ACPI_HEST_ERR_THRESHOLD_WINDOW  (1<<5)
1527 
1528 /*
1529  * HEST subtables
1530  */
1531 
1532 /* 0: IA32 Machine Check Exception */
1533 
1534 struct acpi_hest_ia_machine_check {
1535 	struct acpi_hest_header header;
1536 	u16 reserved1;
1537 	u8 flags;		/* See flags ACPI_HEST_GLOBAL, etc. above */
1538 	u8 enabled;
1539 	u32 records_to_preallocate;
1540 	u32 max_sections_per_record;
1541 	u64 global_capability_data;
1542 	u64 global_control_data;
1543 	u8 num_hardware_banks;
1544 	u8 reserved3[7];
1545 };
1546 
1547 /* 1: IA32 Corrected Machine Check */
1548 
1549 struct acpi_hest_ia_corrected {
1550 	struct acpi_hest_header header;
1551 	u16 reserved1;
1552 	u8 flags;		/* See flags ACPI_HEST_GLOBAL, etc. above */
1553 	u8 enabled;
1554 	u32 records_to_preallocate;
1555 	u32 max_sections_per_record;
1556 	struct acpi_hest_notify notify;
1557 	u8 num_hardware_banks;
1558 	u8 reserved2[3];
1559 };
1560 
1561 /* 2: IA32 Non-Maskable Interrupt */
1562 
1563 struct acpi_hest_ia_nmi {
1564 	struct acpi_hest_header header;
1565 	u32 reserved;
1566 	u32 records_to_preallocate;
1567 	u32 max_sections_per_record;
1568 	u32 max_raw_data_length;
1569 };
1570 
1571 /* 3,4,5: Not used */
1572 
1573 /* 6: PCI Express Root Port AER */
1574 
1575 struct acpi_hest_aer_root {
1576 	struct acpi_hest_header header;
1577 	struct acpi_hest_aer_common aer;
1578 	u32 root_error_command;
1579 };
1580 
1581 /* 7: PCI Express AER (AER Endpoint) */
1582 
1583 struct acpi_hest_aer {
1584 	struct acpi_hest_header header;
1585 	struct acpi_hest_aer_common aer;
1586 };
1587 
1588 /* 8: PCI Express/PCI-X Bridge AER */
1589 
1590 struct acpi_hest_aer_bridge {
1591 	struct acpi_hest_header header;
1592 	struct acpi_hest_aer_common aer;
1593 	u32 uncorrectable_mask2;
1594 	u32 uncorrectable_severity2;
1595 	u32 advanced_capabilities2;
1596 };
1597 
1598 /* 9: Generic Hardware Error Source */
1599 
1600 struct acpi_hest_generic {
1601 	struct acpi_hest_header header;
1602 	u16 related_source_id;
1603 	u8 reserved;
1604 	u8 enabled;
1605 	u32 records_to_preallocate;
1606 	u32 max_sections_per_record;
1607 	u32 max_raw_data_length;
1608 	struct acpi_generic_address error_status_address;
1609 	struct acpi_hest_notify notify;
1610 	u32 error_block_length;
1611 };
1612 
1613 /* 10: Generic Hardware Error Source, version 2 */
1614 
1615 struct acpi_hest_generic_v2 {
1616 	struct acpi_hest_header header;
1617 	u16 related_source_id;
1618 	u8 reserved;
1619 	u8 enabled;
1620 	u32 records_to_preallocate;
1621 	u32 max_sections_per_record;
1622 	u32 max_raw_data_length;
1623 	struct acpi_generic_address error_status_address;
1624 	struct acpi_hest_notify notify;
1625 	u32 error_block_length;
1626 	struct acpi_generic_address read_ack_register;
1627 	u64 read_ack_preserve;
1628 	u64 read_ack_write;
1629 };
1630 
1631 /* Generic Error Status block */
1632 
1633 struct acpi_hest_generic_status {
1634 	u32 block_status;
1635 	u32 raw_data_offset;
1636 	u32 raw_data_length;
1637 	u32 data_length;
1638 	u32 error_severity;
1639 };
1640 
1641 /* Values for block_status flags above */
1642 
1643 #define ACPI_HEST_UNCORRECTABLE             (1)
1644 #define ACPI_HEST_CORRECTABLE               (1<<1)
1645 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE    (1<<2)
1646 #define ACPI_HEST_MULTIPLE_CORRECTABLE      (1<<3)
1647 #define ACPI_HEST_ERROR_ENTRY_COUNT         (0xFF<<4)	/* 8 bits, error count */
1648 
1649 /* Generic Error Data entry */
1650 
1651 struct acpi_hest_generic_data {
1652 	u8 section_type[16];
1653 	u32 error_severity;
1654 	u16 revision;
1655 	u8 validation_bits;
1656 	u8 flags;
1657 	u32 error_data_length;
1658 	u8 fru_id[16];
1659 	u8 fru_text[20];
1660 };
1661 
1662 /* Extension for revision 0x0300 */
1663 
1664 struct acpi_hest_generic_data_v300 {
1665 	u8 section_type[16];
1666 	u32 error_severity;
1667 	u16 revision;
1668 	u8 validation_bits;
1669 	u8 flags;
1670 	u32 error_data_length;
1671 	u8 fru_id[16];
1672 	u8 fru_text[20];
1673 	u64 time_stamp;
1674 };
1675 
1676 /* Values for error_severity above */
1677 
1678 #define ACPI_HEST_GEN_ERROR_RECOVERABLE     0
1679 #define ACPI_HEST_GEN_ERROR_FATAL           1
1680 #define ACPI_HEST_GEN_ERROR_CORRECTED       2
1681 #define ACPI_HEST_GEN_ERROR_NONE            3
1682 
1683 /* Flags for validation_bits above */
1684 
1685 #define ACPI_HEST_GEN_VALID_FRU_ID          (1)
1686 #define ACPI_HEST_GEN_VALID_FRU_STRING      (1<<1)
1687 #define ACPI_HEST_GEN_VALID_TIMESTAMP       (1<<2)
1688 
1689 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */
1690 
1691 struct acpi_hest_ia_deferred_check {
1692 	struct acpi_hest_header header;
1693 	u16 reserved1;
1694 	u8 flags;		/* See flags ACPI_HEST_GLOBAL, etc. above */
1695 	u8 enabled;
1696 	u32 records_to_preallocate;
1697 	u32 max_sections_per_record;
1698 	struct acpi_hest_notify notify;
1699 	u8 num_hardware_banks;
1700 	u8 reserved2[3];
1701 };
1702 
1703 /*******************************************************************************
1704  *
1705  * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2)
1706  *        Version 1
1707  *
1708  ******************************************************************************/
1709 
1710 struct acpi_table_hmat {
1711 	struct acpi_table_header header;	/* Common ACPI table header */
1712 	u32 reserved;
1713 };
1714 
1715 /* Values for HMAT structure types */
1716 
1717 enum acpi_hmat_type {
1718 	ACPI_HMAT_TYPE_PROXIMITY = 0,	/* Memory proximity domain attributes */
1719 	ACPI_HMAT_TYPE_LOCALITY = 1,	/* System locality latency and bandwidth information */
1720 	ACPI_HMAT_TYPE_CACHE = 2,	/* Memory side cache information */
1721 	ACPI_HMAT_TYPE_RESERVED = 3	/* 3 and greater are reserved */
1722 };
1723 
1724 struct acpi_hmat_structure {
1725 	u16 type;
1726 	u16 reserved;
1727 	u32 length;
1728 };
1729 
1730 /*
1731  * HMAT Structures, correspond to Type in struct acpi_hmat_structure
1732  */
1733 
1734 /* 0: Memory proximity domain attributes */
1735 
1736 struct acpi_hmat_proximity_domain {
1737 	struct acpi_hmat_structure header;
1738 	u16 flags;
1739 	u16 reserved1;
1740 	u32 processor_PD;	/* Processor proximity domain */
1741 	u32 memory_PD;		/* Memory proximity domain */
1742 	u32 reserved2;
1743 	u64 reserved3;
1744 	u64 reserved4;
1745 };
1746 
1747 /* Masks for Flags field above */
1748 
1749 #define ACPI_HMAT_PROCESSOR_PD_VALID    (1)	/* 1: processor_PD field is valid */
1750 #define ACPI_HMAT_MEMORY_PD_VALID       (1<<1)	/* 1: memory_PD field is valid */
1751 #define ACPI_HMAT_RESERVATION_HINT      (1<<2)	/* 1: Reservation hint */
1752 
1753 /* 1: System locality latency and bandwidth information */
1754 
1755 struct acpi_hmat_locality {
1756 	struct acpi_hmat_structure header;
1757 	u8 flags;
1758 	u8 data_type;
1759 	u8 min_transfer_size;
1760 	u8 reserved1;
1761 	u32 number_of_initiator_Pds;
1762 	u32 number_of_target_Pds;
1763 	u32 reserved2;
1764 	u64 entry_base_unit;
1765 };
1766 
1767 /* Masks for Flags field above */
1768 
1769 #define ACPI_HMAT_MEMORY_HIERARCHY  (0x0F)     /* Bits 0-3 */
1770 
1771 /* Values for Memory Hierarchy flags */
1772 
1773 #define ACPI_HMAT_MEMORY            0
1774 #define ACPI_HMAT_LAST_LEVEL_CACHE  1
1775 #define ACPI_HMAT_1ST_LEVEL_CACHE   2
1776 #define ACPI_HMAT_2ND_LEVEL_CACHE   3
1777 #define ACPI_HMAT_3RD_LEVEL_CACHE   4
1778 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10       /* Bit 4: ACPI 6.4 */
1779 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20    /* Bit 5: ACPI 6.4 */
1780 
1781 
1782 /* Values for data_type field above */
1783 
1784 #define ACPI_HMAT_ACCESS_LATENCY    0
1785 #define ACPI_HMAT_READ_LATENCY      1
1786 #define ACPI_HMAT_WRITE_LATENCY     2
1787 #define ACPI_HMAT_ACCESS_BANDWIDTH  3
1788 #define ACPI_HMAT_READ_BANDWIDTH    4
1789 #define ACPI_HMAT_WRITE_BANDWIDTH   5
1790 
1791 /* 2: Memory side cache information */
1792 
1793 struct acpi_hmat_cache {
1794 	struct acpi_hmat_structure header;
1795 	u32 memory_PD;
1796 	u32 reserved1;
1797 	u64 cache_size;
1798 	u32 cache_attributes;
1799 	u16 address_mode;
1800 	u16 number_of_SMBIOShandles;
1801 };
1802 
1803 /* Masks for cache_attributes field above */
1804 
1805 #define ACPI_HMAT_TOTAL_CACHE_LEVEL     (0x0000000F)
1806 #define ACPI_HMAT_CACHE_LEVEL           (0x000000F0)
1807 #define ACPI_HMAT_CACHE_ASSOCIATIVITY   (0x00000F00)
1808 #define ACPI_HMAT_WRITE_POLICY          (0x0000F000)
1809 #define ACPI_HMAT_CACHE_LINE_SIZE       (0xFFFF0000)
1810 
1811 #define ACPI_HMAT_CACHE_MODE_UNKNOWN            (0)
1812 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR    (1)
1813 
1814 /* Values for cache associativity flag */
1815 
1816 #define ACPI_HMAT_CA_NONE                     (0)
1817 #define ACPI_HMAT_CA_DIRECT_MAPPED            (1)
1818 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING   (2)
1819 
1820 /* Values for write policy flag */
1821 
1822 #define ACPI_HMAT_CP_NONE   (0)
1823 #define ACPI_HMAT_CP_WB     (1)
1824 #define ACPI_HMAT_CP_WT     (2)
1825 
1826 /*******************************************************************************
1827  *
1828  * HPET - High Precision Event Timer table
1829  *        Version 1
1830  *
1831  * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
1832  * Version 1.0a, October 2004
1833  *
1834  ******************************************************************************/
1835 
1836 struct acpi_table_hpet {
1837 	struct acpi_table_header header;	/* Common ACPI table header */
1838 	u32 id;			/* Hardware ID of event timer block */
1839 	struct acpi_generic_address address;	/* Address of event timer block */
1840 	u8 sequence;		/* HPET sequence number */
1841 	u16 minimum_tick;	/* Main counter min tick, periodic mode */
1842 	u8 flags;
1843 };
1844 
1845 /* Masks for Flags field above */
1846 
1847 #define ACPI_HPET_PAGE_PROTECT_MASK (3)
1848 
1849 /* Values for Page Protect flags */
1850 
1851 enum acpi_hpet_page_protect {
1852 	ACPI_HPET_NO_PAGE_PROTECT = 0,
1853 	ACPI_HPET_PAGE_PROTECT4 = 1,
1854 	ACPI_HPET_PAGE_PROTECT64 = 2
1855 };
1856 
1857 /*******************************************************************************
1858  *
1859  * IBFT - Boot Firmware Table
1860  *        Version 1
1861  *
1862  * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
1863  * Specification", Version 1.01, March 1, 2007
1864  *
1865  * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
1866  * Therefore, it is not currently supported by the disassembler.
1867  *
1868  ******************************************************************************/
1869 
1870 struct acpi_table_ibft {
1871 	struct acpi_table_header header;	/* Common ACPI table header */
1872 	u8 reserved[12];
1873 };
1874 
1875 /* IBFT common subtable header */
1876 
1877 struct acpi_ibft_header {
1878 	u8 type;
1879 	u8 version;
1880 	u16 length;
1881 	u8 index;
1882 	u8 flags;
1883 };
1884 
1885 /* Values for Type field above */
1886 
1887 enum acpi_ibft_type {
1888 	ACPI_IBFT_TYPE_NOT_USED = 0,
1889 	ACPI_IBFT_TYPE_CONTROL = 1,
1890 	ACPI_IBFT_TYPE_INITIATOR = 2,
1891 	ACPI_IBFT_TYPE_NIC = 3,
1892 	ACPI_IBFT_TYPE_TARGET = 4,
1893 	ACPI_IBFT_TYPE_EXTENSIONS = 5,
1894 	ACPI_IBFT_TYPE_RESERVED = 6	/* 6 and greater are reserved */
1895 };
1896 
1897 /* IBFT subtables */
1898 
1899 struct acpi_ibft_control {
1900 	struct acpi_ibft_header header;
1901 	u16 extensions;
1902 	u16 initiator_offset;
1903 	u16 nic0_offset;
1904 	u16 target0_offset;
1905 	u16 nic1_offset;
1906 	u16 target1_offset;
1907 };
1908 
1909 struct acpi_ibft_initiator {
1910 	struct acpi_ibft_header header;
1911 	u8 sns_server[16];
1912 	u8 slp_server[16];
1913 	u8 primary_server[16];
1914 	u8 secondary_server[16];
1915 	u16 name_length;
1916 	u16 name_offset;
1917 };
1918 
1919 struct acpi_ibft_nic {
1920 	struct acpi_ibft_header header;
1921 	u8 ip_address[16];
1922 	u8 subnet_mask_prefix;
1923 	u8 origin;
1924 	u8 gateway[16];
1925 	u8 primary_dns[16];
1926 	u8 secondary_dns[16];
1927 	u8 dhcp[16];
1928 	u16 vlan;
1929 	u8 mac_address[6];
1930 	u16 pci_address;
1931 	u16 name_length;
1932 	u16 name_offset;
1933 };
1934 
1935 struct acpi_ibft_target {
1936 	struct acpi_ibft_header header;
1937 	u8 target_ip_address[16];
1938 	u16 target_ip_socket;
1939 	u8 target_boot_lun[8];
1940 	u8 chap_type;
1941 	u8 nic_association;
1942 	u16 target_name_length;
1943 	u16 target_name_offset;
1944 	u16 chap_name_length;
1945 	u16 chap_name_offset;
1946 	u16 chap_secret_length;
1947 	u16 chap_secret_offset;
1948 	u16 reverse_chap_name_length;
1949 	u16 reverse_chap_name_offset;
1950 	u16 reverse_chap_secret_length;
1951 	u16 reverse_chap_secret_offset;
1952 };
1953 
1954 /* Reset to default packing */
1955 
1956 #pragma pack()
1957 
1958 #endif				/* __ACTBL1_H__ */
1959