| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/math/py-statsmodels/statsmodels-0.13.1/statsmodels/tsa/exponential_smoothing/ |
| H A D | ets.py | 283 Denote with :math:`\circ_b` the trend operation (addition or
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|
| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 282 #define AHB_RESET_OFFSET_DRC0 25 macro
|