1 /*	$NetBSD: amdgpu_gart.h,v 1.4 2021/12/19 12:21:29 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2017 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 
26 #ifndef __AMDGPU_GART_H__
27 #define __AMDGPU_GART_H__
28 
29 #include <linux/types.h>
30 
31 /*
32  * GART structures, functions & helpers
33  */
34 struct amdgpu_device;
35 struct amdgpu_bo;
36 
37 #define AMDGPU_GPU_PAGE_SIZE 4096
38 #define AMDGPU_GPU_PAGE_MASK (AMDGPU_GPU_PAGE_SIZE - 1)
39 #define AMDGPU_GPU_PAGE_SHIFT 12
40 #define AMDGPU_GPU_PAGE_ALIGN(a) (((a) + AMDGPU_GPU_PAGE_MASK) & ~AMDGPU_GPU_PAGE_MASK)
41 
42 #define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE)
43 
44 struct amdgpu_gart {
45 #ifdef __NetBSD__
46 	bus_dma_segment_t		ag_table_seg;
47 	bus_dmamap_t			ag_table_map;
48 #endif
49 	struct amdgpu_bo		*bo;
50 	/* CPU kmapped address of gart table */
51 	void				*ptr;
52 	unsigned			num_gpu_pages;
53 	unsigned			num_cpu_pages;
54 	unsigned			table_size;
55 #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
56 	struct page			**pages;
57 #endif
58 	bool				ready;
59 
60 	/* Asic default pte flags */
61 	uint64_t			gart_pte_flags;
62 };
63 
64 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
65 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
66 int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev);
67 void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev);
68 int amdgpu_gart_init(struct amdgpu_device *adev);
69 void amdgpu_gart_fini(struct amdgpu_device *adev);
70 #ifdef __NetBSD__
71 int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t gpu_start,
72     unsigned npages);
73 int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t gpu_start,
74     unsigned npages, bus_size_t map_start, bus_dmamap_t map, uint32_t flags,
75     void *dst);
76 int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t gpu_start,
77     unsigned npages, struct page **pagelist, bus_dmamap_t dmamap,
78     uint32_t flags);
79 #else
80 int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
81 		       int pages);
82 int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
83 		    int pages, dma_addr_t *dma_addr, uint64_t flags,
84 		    void *dst);
85 int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
86 		     int pages, struct page **pagelist,
87 		     dma_addr_t *dma_addr, uint64_t flags);
88 #endif
89 
90 #endif
91