1 /**CFile****************************************************************
2
3 FileName [abcXsim.c]
4
5 SystemName [ABC: Logic synthesis and verification system.]
6
7 PackageName [Network and node package.]
8
9 Synopsis [Using X-valued simulation.]
10
11 Author [Alan Mishchenko]
12
13 Affiliation [UC Berkeley]
14
15 Date [Ver. 1.0. Started - June 20, 2005.]
16
17 Revision [$Id: abcXsim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
18
19 ***********************************************************************/
20
21 #include "base/abc/abc.h"
22 #include "aig/gia/gia.h"
23
24 ABC_NAMESPACE_IMPL_START
25
26 ////////////////////////////////////////////////////////////////////////
27 /// DECLARATIONS ///
28 ////////////////////////////////////////////////////////////////////////
29
30 #define XVS0 ABC_INIT_ZERO
31 #define XVS1 ABC_INIT_ONE
32 #define XVSX ABC_INIT_DC
33
Abc_ObjSetXsim(Abc_Obj_t * pObj,int Value)34 static inline void Abc_ObjSetXsim( Abc_Obj_t * pObj, int Value ) { pObj->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)Value; }
Abc_ObjGetXsim(Abc_Obj_t * pObj)35 static inline int Abc_ObjGetXsim( Abc_Obj_t * pObj ) { return (int)(ABC_PTRINT_T)pObj->pCopy; }
Abc_XsimInv(int Value)36 static inline int Abc_XsimInv( int Value )
37 {
38 if ( Value == XVS0 )
39 return XVS1;
40 if ( Value == XVS1 )
41 return XVS0;
42 assert( Value == XVSX );
43 return XVSX;
44 }
Abc_XsimAnd(int Value0,int Value1)45 static inline int Abc_XsimAnd( int Value0, int Value1 )
46 {
47 if ( Value0 == XVS0 || Value1 == XVS0 )
48 return XVS0;
49 if ( Value0 == XVSX || Value1 == XVSX )
50 return XVSX;
51 assert( Value0 == XVS1 && Value1 == XVS1 );
52 return XVS1;
53 }
Abc_XsimRand2()54 static inline int Abc_XsimRand2()
55 {
56 // return (rand() & 1) ? XVS1 : XVS0;
57 return (Gia_ManRandom(0) & 1) ? XVS1 : XVS0;
58 }
Abc_XsimRand3()59 static inline int Abc_XsimRand3()
60 {
61 int RetValue;
62 do {
63 // RetValue = rand() & 3;
64 RetValue = Gia_ManRandom(0) & 3;
65 } while ( RetValue == 0 );
66 return RetValue;
67 }
Abc_ObjGetXsimFanin0(Abc_Obj_t * pObj)68 static inline int Abc_ObjGetXsimFanin0( Abc_Obj_t * pObj )
69 {
70 int RetValue;
71 RetValue = Abc_ObjGetXsim(Abc_ObjFanin0(pObj));
72 return Abc_ObjFaninC0(pObj)? Abc_XsimInv(RetValue) : RetValue;
73 }
Abc_ObjGetXsimFanin1(Abc_Obj_t * pObj)74 static inline int Abc_ObjGetXsimFanin1( Abc_Obj_t * pObj )
75 {
76 int RetValue;
77 RetValue = Abc_ObjGetXsim(Abc_ObjFanin1(pObj));
78 return Abc_ObjFaninC1(pObj)? Abc_XsimInv(RetValue) : RetValue;
79 }
Abc_XsimPrint(FILE * pFile,int Value)80 static inline void Abc_XsimPrint( FILE * pFile, int Value )
81 {
82 if ( Value == XVS0 )
83 {
84 fprintf( pFile, "0" );
85 return;
86 }
87 if ( Value == XVS1 )
88 {
89 fprintf( pFile, "1" );
90 return;
91 }
92 assert( Value == XVSX );
93 fprintf( pFile, "x" );
94 }
95
96 ////////////////////////////////////////////////////////////////////////
97 /// FUNCTION DEFINITIONS ///
98 ////////////////////////////////////////////////////////////////////////
99
100 /**Function*************************************************************
101
102 Synopsis [Performs X-valued simulation of the sequential network.]
103
104 Description []
105
106 SideEffects []
107
108 SeeAlso []
109
110 ***********************************************************************/
Abc_NtkXValueSimulate(Abc_Ntk_t * pNtk,int nFrames,int fXInputs,int fXState,int fVerbose)111 void Abc_NtkXValueSimulate( Abc_Ntk_t * pNtk, int nFrames, int fXInputs, int fXState, int fVerbose )
112 {
113 Abc_Obj_t * pObj;
114 int i, f;
115 assert( Abc_NtkIsStrash(pNtk) );
116 // srand( 0x12341234 );
117 Gia_ManRandom( 1 );
118 // start simulation
119 Abc_ObjSetXsim( Abc_AigConst1(pNtk), XVS1 );
120 if ( fXInputs )
121 {
122 Abc_NtkForEachPi( pNtk, pObj, i )
123 Abc_ObjSetXsim( pObj, XVSX );
124 }
125 else
126 {
127 Abc_NtkForEachPi( pNtk, pObj, i )
128 Abc_ObjSetXsim( pObj, Abc_XsimRand2() );
129 }
130 if ( fXState )
131 {
132 Abc_NtkForEachLatch( pNtk, pObj, i )
133 Abc_ObjSetXsim( Abc_ObjFanout0(pObj), XVSX );
134 }
135 else
136 {
137 Abc_NtkForEachLatch( pNtk, pObj, i )
138 Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_LatchInit(pObj) );
139 }
140 // simulate and print the result
141 fprintf( stdout, "Frame : Inputs : Latches : Outputs\n" );
142 for ( f = 0; f < nFrames; f++ )
143 {
144 Abc_AigForEachAnd( pNtk, pObj, i )
145 Abc_ObjSetXsim( pObj, Abc_XsimAnd(Abc_ObjGetXsimFanin0(pObj), Abc_ObjGetXsimFanin1(pObj)) );
146 Abc_NtkForEachCo( pNtk, pObj, i )
147 Abc_ObjSetXsim( pObj, Abc_ObjGetXsimFanin0(pObj) );
148 // print out
149 fprintf( stdout, "%2d : ", f );
150 Abc_NtkForEachPi( pNtk, pObj, i )
151 Abc_XsimPrint( stdout, Abc_ObjGetXsim(pObj) );
152 fprintf( stdout, " : " );
153 Abc_NtkForEachLatch( pNtk, pObj, i )
154 {
155 // if ( Abc_ObjGetXsim(Abc_ObjFanout0(pObj)) != XVSX )
156 // printf( " %s=", Abc_ObjName(pObj) );
157 Abc_XsimPrint( stdout, Abc_ObjGetXsim(Abc_ObjFanout0(pObj)) );
158 }
159 fprintf( stdout, " : " );
160 Abc_NtkForEachPo( pNtk, pObj, i )
161 Abc_XsimPrint( stdout, Abc_ObjGetXsim(pObj) );
162 fprintf( stdout, "\n" );
163 // assign input values
164 if ( fXInputs )
165 {
166 Abc_NtkForEachPi( pNtk, pObj, i )
167 Abc_ObjSetXsim( pObj, XVSX );
168 }
169 else
170 {
171 Abc_NtkForEachPi( pNtk, pObj, i )
172 Abc_ObjSetXsim( pObj, Abc_XsimRand2() );
173 }
174 // transfer the latch values
175 Abc_NtkForEachLatch( pNtk, pObj, i )
176 Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_ObjGetXsim(Abc_ObjFanin0(pObj)) );
177 }
178 }
179
180 /**Function*************************************************************
181
182 Synopsis [Cycles the circuit to create a new initial state.]
183
184 Description [Simulates the circuit with random (or ternary) input
185 for the given number of timeframes to get a better initial state.]
186
187 SideEffects []
188
189 SeeAlso []
190
191 ***********************************************************************/
Abc_NtkCycleInitState(Abc_Ntk_t * pNtk,int nFrames,int fUseXval,int fVerbose)192 void Abc_NtkCycleInitState( Abc_Ntk_t * pNtk, int nFrames, int fUseXval, int fVerbose )
193 {
194 Abc_Obj_t * pObj;
195 int i, f;
196 assert( Abc_NtkIsStrash(pNtk) );
197 // srand( 0x12341234 );
198 Gia_ManRandom( 1 );
199 // initialize the values
200 Abc_ObjSetXsim( Abc_AigConst1(pNtk), XVS1 );
201 Abc_NtkForEachLatch( pNtk, pObj, i )
202 Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_LatchInit(pObj) );
203 // simulate for the given number of timeframes
204 for ( f = 0; f < nFrames; f++ )
205 {
206 Abc_NtkForEachPi( pNtk, pObj, i )
207 Abc_ObjSetXsim( pObj, fUseXval? ABC_INIT_DC : Abc_XsimRand2() );
208 // Abc_ObjSetXsim( pObj, ABC_INIT_ONE );
209 Abc_AigForEachAnd( pNtk, pObj, i )
210 Abc_ObjSetXsim( pObj, Abc_XsimAnd(Abc_ObjGetXsimFanin0(pObj), Abc_ObjGetXsimFanin1(pObj)) );
211 Abc_NtkForEachCo( pNtk, pObj, i )
212 Abc_ObjSetXsim( pObj, Abc_ObjGetXsimFanin0(pObj) );
213 Abc_NtkForEachLatch( pNtk, pObj, i )
214 Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_ObjGetXsim(Abc_ObjFanin0(pObj)) );
215 }
216 // set the final values
217 Abc_NtkForEachLatch( pNtk, pObj, i )
218 {
219 pObj->pData = (void *)(ABC_PTRINT_T)Abc_ObjGetXsim(Abc_ObjFanout0(pObj));
220 // printf( "%d", Abc_LatchIsInit1(pObj) );
221 }
222 // printf( "\n" );
223 }
224
225 ///////////////////////////////////////////////////////////////////////
226 /// END OF FILE ///
227 ////////////////////////////////////////////////////////////////////////
228
229
230 ABC_NAMESPACE_IMPL_END
231
232