1 /*
2  * Cisco router simulation platform.
3  * Copyright (c) 2007 Christophe Fillot (cf@utc.fr)
4  *
5  * Generic Cisco C6k-SUP1 routines and definitions (EEPROM,...).
6  */
7 
8 #ifndef __DEV_C6SUP1_H__
9 #define __DEV_C6SUP1_H__
10 
11 #include <pthread.h>
12 
13 #include "utils.h"
14 #include "net.h"
15 #include "device.h"
16 #include "pci_dev.h"
17 #include "nmc93cX6.h"
18 #include "dev_ds1620.h"
19 #include "net_io.h"
20 #include "vm.h"
21 
22 /* Default MSFC1 parameters */
23 #define C6SUP1_DEFAULT_RAM_SIZE     128
24 #define C6SUP1_DEFAULT_ROM_SIZE     4
25 #define C6SUP1_DEFAULT_NVRAM_SIZE   512
26 #define C6SUP1_DEFAULT_CONF_REG     0x2102
27 #define C6SUP1_DEFAULT_CLOCK_DIV    4
28 #define C6SUP1_DEFAULT_RAM_MMAP     1
29 
30 /* EOBC + IBC */
31 #define C6SUP1_MAX_PA_BAYS  2
32 
33 /* Maximum slots on 6513 */
34 #define C6SUP1_MAX_SLOTS    13
35 
36 /* MSFC1 Timer IRQ (virtual) */
37 #define C6SUP1_VTIMER_IRQ 0
38 
39 /* MSFC1 DUART Interrupt */
40 #define C6SUP1_DUART_IRQ  5
41 
42 /* MSFC1 Network I/O Interrupt */
43 #define C6SUP1_NETIO_IRQ  2
44 
45 /* MSFC1 PA Management Interrupt handler */
46 #define C6SUP1_PA_MGMT_IRQ  3
47 
48 /* MSFC1 GT64k DMA/Timer Interrupt */
49 #define C6SUP1_GT64K_IRQ  4
50 
51 /* MSFC1 Error/OIR Interrupt */
52 #define C6SUP1_OIR_IRQ    6
53 
54 /* Network IRQ */
55 #define C6SUP1_NETIO_IRQ_BASE       32
56 #define C6SUP1_NETIO_IRQ_END        \
57    (C6SUP1_NETIO_IRQ_BASE + C6SUP1_MAX_PA_BAYS - 1)
58 
59 /* MSFC1 base ram limit (256 Mb) */
60 #define C6SUP1_BASE_RAM_LIMIT  256
61 
62 /* MSFC1 common device addresses */
63 #define C6SUP1_GT64K_ADDR         0x14000000ULL
64 #define C6SUP1_GT64K_SEC_ADDR     0x15000000ULL
65 #define C6SUP1_BOOTFLASH_ADDR     0x1a000000ULL
66 #define C6SUP1_NVRAM_ADDR         0x1e000000ULL
67 #define C6SUP1_IOFPGA_ADDR        0x1e840000ULL
68 #define C6SUP1_MPFPGA_ADDR        0x1e880000ULL
69 #define C6SUP1_BITBUCKET_ADDR     0x1f000000ULL
70 #define C6SUP1_ROM_ADDR           0x1fc00000ULL
71 #define C6SUP1_IOMEM_ADDR         0x20000000ULL
72 #define C6SUP1_SRAM_ADDR          0x4b000000ULL
73 #define C6SUP1_BSWAP_ADDR         0xc0000000ULL
74 #define C6SUP1_PCI_IO_ADDR        0x100000000ULL
75 
76 /* SRAM size */
77 #define C6SUP1_SRAM_SIZE  (4096*1024)
78 
79 /* Reserved space for ROM in NVRAM */
80 #define C6SUP1_NVRAM_ROM_RES_SIZE  2048
81 
82 /* MSFC1 physical address bus mask: keep only the lower 33 bits */
83 #define C6SUP1_ADDR_BUS_MASK   0x1ffffffffULL
84 
85 /* MSFC1 ELF Platform ID */
86 #define C6SUP1_ELF_MACHINE_ID  0x19
87 
88 /* 2 temperature sensors in a SUP1: chassis inlet and oulet */
89 #define C6SUP1_TEMP_SENSORS  2
90 
91 #define VM_C6SUP1(vm) ((c6sup1_t *)vm->hw_data)
92 
93 /* MSFC1 router */
94 typedef struct c6sup1_router c6sup1_t;
95 
96 /* MSFC1 router */
97 struct c6sup1_router {
98    /* Chassis MAC address */
99    n_eth_addr_t mac_addr;
100 
101    /* Associated VM instance */
102    vm_instance_t *vm;
103 
104    /* Midplane FPGA */
105    struct c6sup1_mpfpga_data *mpfpga_data;
106 
107    /* Backplane EEPROM data */
108    struct cisco_eeprom bp_eeprom[NMC93CX6_MAX_EEPROM_PER_GROUP];
109 
110    /* Supervisor EEPROM data */
111    struct cisco_eeprom sup_eeprom[NMC93CX6_MAX_EEPROM_PER_GROUP];
112 
113    /* Slots EEPROM data */
114    struct cisco_eeprom slot_eeprom[C6SUP1_MAX_SLOTS];
115 
116    /* Backplane, Supervisor and Slot EEPROM groups */
117    struct nmc93cX6_group bp_eeprom_group;
118    struct nmc93cX6_group sup_eeprom_group;
119    struct nmc93cX6_group slot_eeprom_group;
120 
121    /* Temperature sensors */
122    struct ds1620_data ds1620_sensors[C6SUP1_TEMP_SENSORS];
123 
124    /* Slot of this supervisor */
125    u_int sup_slot;
126 };
127 
128 /* Initialize EEPROM groups */
129 void c6sup1_init_eeprom_groups(c6sup1_t *router);
130 
131 /* Get network IRQ for specified slot/port */
132 u_int c6sup1_net_irq_for_slot_port(u_int slot,u_int port);
133 
134 /* Show the list of available PA drivers */
135 void c6sup1_pa_show_drivers(void);
136 
137 /* Set chassis MAC address */
138 int c6sup1_midplane_set_mac_addr(c6sup1_t *router,char *mac_addr);
139 
140 /* Show MSFC1 hardware info */
141 void c6sup1_show_hardware(c6sup1_t *router);
142 
143 /* dev_c6sup1_iofpga_init() */
144 int dev_c6sup1_iofpga_init(c6sup1_t *router,m_uint64_t paddr,m_uint32_t len);
145 
146 /* dev_mpfpga_init() */
147 int dev_c6sup1_mpfpga_init(c6sup1_t *router,m_uint64_t paddr,m_uint32_t len);
148 
149 /* Register the c6sup1 platform */
150 int c6sup1_platform_register(void);
151 
152 #endif
153