| /dports/devel/avr-gdb/gdb-7.3.1/sim/moxie/ |
| H A D | sim-main.h | 38 #define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA)) macro
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| /dports/devel/gdb761/gdb-7.6.1/sim/moxie/ |
| H A D | sim-main.h | 38 #define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA)) macro
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| /dports/devel/avr-gdb/gdb-7.3.1/sim/sh64/ |
| H A D | sim-main.h | 26 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu))) macro
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| /dports/devel/gdb761/gdb-7.6.1/sim/sh64/ |
| H A D | sim-main.h | 26 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu))) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/lm32/ |
| H A D | sim-main.h | 42 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
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| /dports/devel/gdb761/gdb-7.6.1/sim/lm32/ |
| H A D | sim-main.h | 42 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/i960/ |
| H A D | sim-main.h | 18 #define CIA_SET(cpu,val) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc = (val)) */ macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/iq2000/ |
| H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/gdb761/gdb-7.6.1/sim/iq2000/ |
| H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/i960/ |
| H A D | sim-main.h | 18 #define CIA_SET(cpu,val) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc = (val)) */ macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mn10300/ |
| H A D | sim-main.h | 76 #define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL)) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/mn10300/ |
| H A D | sim-main.h | 75 #define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL)) macro
|
| /dports/devel/gdb761/gdb-7.6.1/sim/mn10300/ |
| H A D | sim-main.h | 75 #define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL)) macro
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mn10300/ |
| H A D | sim-main.h | 76 #define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL)) macro
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
| H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/m32r/ |
| H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/gdb761/gdb-7.6.1/sim/m32r/ |
| H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
| H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/frv/ |
| H A D | sim-main.h | 48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/ |
| H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/gdb761/gdb-7.6.1/sim/frv/ |
| H A D | sim-main.h | 47 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/gdb761/gdb-7.6.1/sim/bfin/ |
| H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/frv/ |
| H A D | sim-main.h | 48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/frv/ |
| H A D | sim-main.h | 48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/h8300/ |
| H A D | sim-main.h | 156 #define CIA_SET(CPU, VAL) (cpu_set_pc ((CPU), (VAL))) macro
|