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Searched defs:CLK_BASE__INST6_SEG0 (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/
H A Ddimgrey_cavefish_ip_offset.h258 #define CLK_BASE__INST6_SEG0 0x0001B400 macro
H A Dnavi12_ip_offset.h273 #define CLK_BASE__INST6_SEG0 0 macro
H A Dnavi14_ip_offset.h273 #define CLK_BASE__INST6_SEG0 0 macro
H A Dsienna_cichlid_ip_offset.h280 #define CLK_BASE__INST6_SEG0 0x0001B400 macro
H A Dbeige_goby_ip_offset.h287 #define CLK_BASE__INST6_SEG0 0x00017E00 macro
H A Drenoir_ip_offset.h355 #define CLK_BASE__INST6_SEG0 0 macro
H A Dyellow_carp_offset.h329 #define CLK_BASE__INST6_SEG0 0x0001B400 macro
H A Dvangogh_ip_offset.h382 #define CLK_BASE__INST6_SEG0 0x0001B400 macro
H A Daldebaran_ip_offset.h359 #define CLK_BASE__INST6_SEG0 0x00017E00 macro
H A Darct_ip_offset.h344 #define CLK_BASE__INST6_SEG0 0x000125E0 macro