1 /* 2 * FetCom.h 3 * 4 * Base class for all memory classes. 5 * 6 * Copyright (C) 2007 - 2011 Texas Instruments Incorporated - http://www.ti.com/ 7 * 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the 19 * distribution. 20 * 21 * Neither the name of Texas Instruments Incorporated nor the names of 22 * its contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /*----- FetUart.h -----*/ 39 #ifndef FETCOM_H 40 #define FETCOM_H 41 42 #include "hil_Structs.h" 43 #include "FetDcdc.h" 44 #include "FetUsb.h" 45 46 #ifdef eZ_FET 47 48 // UART port direction 49 #define uart_CtsOut() {P2DIR |= BIT7;} // CTS output 50 #define uart_RtsIn() {P2DIR &=~ BIT6;} // RTS input 51 52 // UART port 53 #define uart_SetCtsBit() {P2OUT |= BIT7;} // Output 54 #define uart_ClearCtsBit() {P2OUT &=~ BIT7;} // Output clear 55 #define uart_RtsRen() {P2REN |= BIT6;} // RTS resistor 56 #define uart_CtsRen() {P2REN |= BIT7;} // CTS resistor 57 58 #define com_RtsIfgSet() {P2IFG |= BIT6;} // RTS Interrupt flag set (required for sending first byte) 59 #define com_RtsIfgClear() {P2IFG &=~ BIT6;} // RTS Interrupt flag clear 60 #define com_RtsIe() {P2IE |= BIT6;} // RTS Interrupt enable 61 #define com_RtsInterruptDisable() {P2IE &= ~BIT6;} // RTS Interrupt disable 62 #define com_RtsIes() {P2IES &=~ BIT6;} // RTS Interrupt edge select (is set when a low-high transition) 63 64 // UART status bits 65 #define uart_RtsStatus() ((P2IN & BIT6)==BIT6) 66 67 // UART port select 68 #define uart_TxdSel() {P3SEL |= BIT3;} // assign P3.3 to UCA0TXD 69 #define uart_RxdSel() {P3SEL |= BIT4;} // assign P3.4 to UCA0RXD 70 71 72 // UART Register and bit abstractions 73 #define TX_RX_PORT_SEL ( P3SEL ) 74 #define TX_RX_PORT_DIR ( P3DIR ) 75 #define TX_PORT_BIT ( BIT3 ) 76 #define RX_PORT_BIT ( BIT4 ) 77 #define UCA_CTRL_REGISTER ( UCA0CTL1 ) 78 #define UCA_CTRL0_REGISTER ( UCA0CTL0 ) 79 #define UCA_BAUD_CTRL_REGISTER ( UCA0BRW ) 80 #define UCA_MOD_CTRL_REGISTER ( UCA0MCTL ) 81 #define UCA_IE_REGISTER ( UCA0IE ) 82 #define UCA_STATUS_REGISTER ( UCA0STAT ) 83 #define UCA_INTERRUPT_FLAG_REGISTER ( UCA0IFG ) 84 #define UCA_TX_BUF ( UCA0TXBUF ) 85 #define UCA_RX_BUF ( UCA0RXBUF ) 86 87 #define UCA_BR0 ( UCA0BR0 ) 88 #define UCA_BR1 ( UCA0BR1 ) 89 90 #define RTS_PORT_OUT ( P2OUT ) 91 #define RTS_PORT_DIR ( P2DIR ) 92 #define RTS_PORT_BIT ( BIT7 ) 93 94 #define RTS_PULLDOWN_OUT ( P2OUT ) 95 #define RTS_PULLDOWN_REN ( P2REN ) 96 #define RTS_PULLDOWN_BIT ( BIT6 ) 97 #define rtsSetPullDownDir() (P2DIR &= ~BIT6) 98 // CHECKME: Bit is cleared in both cases 99 #define rtsClearPullDownDir() (P2DIR &= ~BIT6) 100 #define RTS_PULLUP_REN ( P2REN ) 101 #define RTS_PULLUP_OUT ( P2OUT ) 102 #define RTS_PULLUP_BIT ( BIT6 ) 103 #define rtsSetPullUpDir() (P2DIR &= ~BIT6) 104 105 #define CTS_PORT_OUT ( P2OUT ) 106 #define CTS_PORT_DIR ( P2DIR ) 107 #define CTS_PORT_REN ( P2REN ) 108 #define CTS_PORT_BIT ( BIT6 ) 109 #endif 110 111 #ifdef MSP_FET 112 113 // UART port direction 114 #define uart_CtsOut() {P9DIR |= BIT5;} // CTS output 115 #define uart_RtsIn() {P2DIR &=~ BIT1;} // "RTS" input (no RTS on MSPFET) 116 117 118 // UART port 119 #define uart_SetCtsBit() {P9OUT |= BIT5;} // Output 120 #define uart_ClearCtsBit() {P9OUT &=~ BIT5;} // Output clear 121 #define uart_RtsRen() {P2REN |= BIT1;} // RTS resistor 122 #define uart_CtsRen() {P9REN |= BIT5;} // CTS resistor 123 124 #define com_RtsIfgSet() {P2IFG = 0x00; P2IFG |= BIT1;} // RTS Interrupt flag set (required for sending first byte) 125 #define com_RtsIfgClear() {P2IFG = 0x00; /*P2IFG &=~ BIT1;*/} // RTS Interrupt flag clear 126 #define com_RtsIe() {P2IE = 0x00; P2IE |= BIT1;} // RTS Interrupt enable 127 #define com_RtsInterruptDisable() {P2IE &= ~BIT1;} // RTS Interrupt disable 128 #define com_RtsIes() {P2IES = 0x00; P2IES &=~ BIT1;} // RTS Interrupt edge select (is set when a low-high transition) 129 130 // UART status bits 131 #define uart_RtsStatus() ((P2IN & BIT1)==BIT1) 132 133 // UART port select 134 #define uart_TxdSel() {P8SEL |= BIT3;} // assign P3.3 to UCA0TXD 135 #define uart_RxdSel() {P8SEL |= BIT2;} // assign P3.4 to UCA0RXD 136 137 // UART Register and bit abstractions 138 #define TX_RX_PORT_SEL ( P8SEL ) 139 #define TX_RX_PORT_DIR ( P8DIR ) 140 #define TX_PORT_BIT ( BIT2 ) 141 #define RX_PORT_BIT ( BIT3 ) 142 #define UCA_CTRL_REGISTER ( UCA1CTL1 ) 143 #define UCA_CTRL0_REGISTER ( UCA1CTL0 ) 144 #define UCA_BAUD_CTRL_REGISTER ( UCA1BRW ) 145 #define UCA_MOD_CTRL_REGISTER ( UCA1MCTL ) 146 #define UCA_IE_REGISTER ( UCA1IE ) 147 #define UCA_STATUS_REGISTER ( UCA1STAT ) 148 #define UCA_INTERRUPT_FLAG_REGISTER ( UCA1IFG ) 149 #define UCA_TX_BUF ( UCA1TXBUF ) 150 #define UCA_RX_BUF ( UCA1RXBUF ) 151 152 #define UCA_BR0 ( UCA1BR0 ) 153 #define UCA_BR1 ( UCA1BR1 ) 154 155 #define RTS_PORT_OUT ( P2OUT ) 156 #define RTS_PORT_DIR ( P2DIR ) 157 #define RTS_PORT_BIT ( BIT1 ) 158 159 #define RTS_PULLDOWN_OUT ( P2OUT ) 160 #define RTS_PULLDOWN_REN ( P2REN ) 161 #define RTS_PULLDOWN_BIT ( BIT1 ) 162 #define rtsSetPullDownDir() (P2DIR |= BIT1) 163 // CHECKME: Bit is set in both cases 164 #define rtsClearPullDownDir() (P2DIR |= BIT1) 165 #define RTS_PULLUP_REN ( P2REN ) 166 #define RTS_PULLUP_OUT ( P2OUT ) 167 #define RTS_PULLUP_BIT ( BIT1 ) 168 #define rtsSetPullUpDir() (P2DIR |= BIT1) 169 170 #define CTS_PORT_OUT ( P9OUT ) 171 #define CTS_PORT_DIR ( P9DIR ) 172 #define CTS_PORT_REN ( P9REN ) 173 #define CTS_PORT_BIT ( BIT5 ) 174 #endif 175 176 #define IO_CONFIG_HIGH_Z_UART 0x0 177 #define IO_CONFIG_UART 0x1 178 #define IO_CONFIG_I2C 0x2 179 180 #define COM_SIGNATURE 0xACDCACDCul 181 182 #ifdef MSP_FET 183 #define COM_FIFOSIZE 256ul 184 #endif 185 186 #ifdef eZ_FET 187 #define COM_FIFOSIZE 64ul 188 #endif 189 190 //UART commands 191 #define COM_CLOSE 9620ul 192 #define UART_NO_HANDSHAKE 9621ul 193 #define UART_NO_HANDSHAKE_PARITY_EVEN 9625ul 194 #define UART_HANDSHAKE 9622ul 195 #define COM_POWER_UP 9623ul 196 #define COM_POWER_DOWN 9624ul 197 198 #define PARITY_EVEN 1 199 #define PARITY_NONE 0 200 201 // BSL Commands 202 #define BSL_UART_INVOKE_SEQUENCE 9601ul 203 #define BSL_UART_SEQUENCE 9602ul 204 #define BSL_DISABLE 8001ul 205 #define BSL_MAX_DATA_LENGTH (260*2) 206 #define BSL_I2C_INVOKE_SEQUENCE1 100000ul 207 #define BSL_I2C_INVOKE_SEQUENCE2 400000ul 208 #define BSL_I2C_INVOKE_SEQUENCE3 100001ul 209 #define BSL_I2C_INVOKE_SEQUENCE4 400001ul 210 #define BSL_I2C_SEQUENCE1 100002ul 211 #define BSL_I2C_SEQUENCE2 400002ul 212 213 struct COM_INFOS 214 { 215 short (*comGetLayerVersion)(void); 216 short (*comConfig)(unsigned long Baudrate, unsigned long MCLK_Frequency, unsigned short); 217 short (*comTransmit)(void); 218 short (*comReceive)(unsigned char character); 219 void (*comClose)(void); 220 void (*comSetHil)(edt_common_methods_t*); 221 void (*comSetDcdc)(DCDC_INFOS_t*); 222 void (*comSetUSB)(FET_USB_INFOS_t*); 223 void (*comLoop)(void); 224 short (*comConfigMode)(unsigned long Baudrate); 225 short (*comSetCts)(void); 226 short (*comClearCts)(void); 227 void (*comSetRts)(void); 228 short (*comGetLayerVersionCmp)(void); 229 }; 230 typedef struct COM_INFOS COM_INFOS_t; 231 232 short COM_BASE_GetLayerVersion(); 233 short COM_BASE_GetLayerVersionCmp(); 234 short COM_BASE_Config(unsigned long Baudrate, unsigned long MCLK_Frequency, 235 unsigned short fetType); 236 short COM_BASE_Receive(unsigned char character); 237 void COM_BASE_Init(COM_INFOS_t* uartInfos_Pointer); 238 void COM_BASE_SetHil(edt_common_methods_t* hil_Pointers); 239 void COM_BASE_SetDcdc(DCDC_INFOS_t* dcdc_Pointers); 240 void COM_BASE_SetUsb(FET_USB_INFOS_t* usb_Pointers); 241 void COM_BASE_Close(); 242 void COM_BASE_Loop(); 243 244 #endif 245