| /dports/math/qrupdate/qrupdate-1.1.2/test/ |
| H A D | tchshx.f | 51 do k = i,j+1,-1
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/include/configs/ |
| H A D | ls1021atsn.h | 131 #define CONFIG_PCIE2 /* PCIE controller 2 */ macro
|