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Searched defs:CPU_INTERRUPT_TIMER (Results 1 – 19 of 19) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/target/openrisc/
H A Dcpu.h418 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu5/qemu-5.2.0/target/openrisc/
H A Dcpu.h415 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/openrisc/
H A Dcpu.h418 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/openrisc/
H A Dcpu.h434 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu42/qemu-4.2.1/target/openrisc/
H A Dcpu.h418 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/openrisc/
H A Dcpu.h418 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/openrisc/
H A Dcpu.h413 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu/qemu-6.2.0/target/openrisc/
H A Dcpu.h414 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu60/qemu-6.0.0/target/openrisc/
H A Dcpu.h414 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 macro
/dports/emulators/qemu5/qemu-5.2.0/target/alpha/
H A Dcpu.h319 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/alpha/
H A Dcpu.h319 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/alpha/
H A Dcpu.h350 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu42/qemu-4.2.1/target/alpha/
H A Dcpu.h321 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu-utils/qemu-4.2.1/target/alpha/
H A Dcpu.h321 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/alpha/
H A Dcpu.h318 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu/qemu-6.2.0/target/alpha/
H A Dcpu.h315 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/alpha/
H A Dcpu.h319 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/qemu60/qemu-6.0.0/target/alpha/
H A Dcpu.h319 #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 macro
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dcpu-all.h768 #define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */ macro