1 /*
2 * Copyright (c) 2017-2019, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_mmc_g12.cpp
24 //! \brief Impelements the public interface for Gen12 CodecHal Media Memory Compression
25 //!
26
27 #include "codechal_hw.h"
28 #include "codechal_mmc_g12.h"
29 #include "mhw_mi_g12_X.h"
30
CodecHalMmcStateG12(CodechalHwInterface * hwInterface)31 CodecHalMmcStateG12::CodecHalMmcStateG12(CodechalHwInterface *hwInterface) :
32 CodecHalMmcState(hwInterface)
33 {
34 CODECHAL_HW_FUNCTION_ENTER;
35
36 if (MEDIA_IS_SKU(hwInterface->GetSkuTable(), FtrE2ECompression))
37 {
38 if (hwInterface->m_enableCodecMmc)
39 {
40 m_mmcEnabled = true;
41 }
42 else
43 {
44 m_mmcEnabled = false;
45 }
46
47 // overwrite if "Enable Codec MMC" exists
48 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
49 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
50 userFeatureData.i32Data = m_mmcEnabled;
51 userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
52 MOS_UserFeature_ReadValue_ID(
53 nullptr,
54 __MEDIA_USER_FEATURE_VALUE_CODEC_MMC_ENABLE_ID,
55 &userFeatureData,
56 m_osInterface->pOsContext);
57 m_mmcEnabled = (userFeatureData.i32Data) ? true : false;
58
59 MOS_USER_FEATURE_VALUE_WRITE_DATA userFeatureWriteData;
60 MOS_ZeroMemory(&userFeatureWriteData, sizeof(userFeatureWriteData));
61 userFeatureWriteData.Value.i32Data = m_mmcEnabled;
62 userFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_CODEC_MMC_IN_USE_ID;
63 MOS_UserFeature_WriteValues_ID(nullptr, &userFeatureWriteData, 1, m_osInterface->pOsContext);
64 }
65 MOS_ZeroMemory(&auxBufForClear, sizeof(MOS_RESOURCE));
66 }
67
InitDecodeMmcEnable(CodechalHwInterface * hwInterface)68 void CodecHalMmcStateG12::InitDecodeMmcEnable(CodechalHwInterface *hwInterface)
69 {
70 CODECHAL_HW_ASSERT(hwInterface);
71 CODECHAL_HW_ASSERT(hwInterface->GetSkuTable());
72 if (MEDIA_IS_SKU(hwInterface->GetSkuTable(), FtrE2ECompression))
73 {
74 bool decodeMmcEnabled = true;
75 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
76 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
77 userFeatureData.i32Data = decodeMmcEnabled;
78 userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
79 MOS_UserFeature_ReadValue_ID(
80 nullptr,
81 __MEDIA_USER_FEATURE_VALUE_DECODE_MMC_ENABLE_ID,
82 &userFeatureData,
83 m_osInterface->pOsContext);
84 decodeMmcEnabled = (userFeatureData.i32Data) ? true : false;
85
86 m_mmcEnabledForComponent = m_mmcEnabled && decodeMmcEnabled;
87
88 MOS_USER_FEATURE_VALUE_WRITE_DATA userFeatureWriteData;
89 MOS_ZeroMemory(&userFeatureWriteData, sizeof(userFeatureWriteData));
90 userFeatureWriteData.Value.i32Data = m_mmcEnabledForComponent;
91 userFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_DECODE_MMC_IN_USE_ID;
92 MOS_UserFeature_WriteValues_ID(nullptr, &userFeatureWriteData, 1, m_osInterface->pOsContext);
93 }
94
95 #if (_DEBUG || _RELEASE_INTERNAL)
96 m_compressibleId = __MEDIA_USER_FEATURE_VALUE_MMC_DEC_RT_COMPRESSIBLE_ID;
97 m_compressModeId = __MEDIA_USER_FEATURE_VALUE_MMC_DEC_RT_COMPRESSMODE_ID;
98 #endif
99 }
100
InitEncodeMmcEnable(CodechalHwInterface * hwInterface)101 void CodecHalMmcStateG12::InitEncodeMmcEnable(CodechalHwInterface *hwInterface)
102 {
103 CODECHAL_HW_ASSERT(hwInterface);
104 CODECHAL_HW_ASSERT(hwInterface->GetSkuTable());
105 if (MEDIA_IS_SKU(hwInterface->GetSkuTable(), FtrE2ECompression))
106 {
107 bool encodeMmcEnabled = true;
108 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
109 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
110 userFeatureData.i32Data = encodeMmcEnabled;
111 userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
112 MOS_UserFeature_ReadValue_ID(
113 nullptr,
114 __MEDIA_USER_FEATURE_VALUE_ENCODE_MMC_ENABLE_ID,
115 &userFeatureData,
116 m_osInterface->pOsContext);
117 encodeMmcEnabled = (userFeatureData.i32Data) ? true : false;
118
119 m_mmcEnabledForComponent = m_mmcEnabled && encodeMmcEnabled;
120
121 MOS_USER_FEATURE_VALUE_WRITE_DATA userFeatureWriteData;
122 MOS_ZeroMemory(&userFeatureWriteData, sizeof(userFeatureWriteData));
123 userFeatureWriteData.Value.i32Data = m_mmcEnabledForComponent;
124 userFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_ENCODE_MMC_IN_USE_ID;
125 MOS_UserFeature_WriteValues_ID(nullptr, &userFeatureWriteData, 1, m_osInterface->pOsContext);
126 }
127
128 #if (_DEBUG || _RELEASE_INTERNAL)
129 m_compressibleId = __MEDIA_USER_FEATURE_VALUE_MMC_ENC_RECON_COMPRESSIBLE_ID;
130 m_compressModeId = __MEDIA_USER_FEATURE_VALUE_MMC_ENC_RECON_COMPRESSMODE_ID;
131 #endif
132 }
133
SetSurfaceParams(PCODECHAL_SURFACE_CODEC_PARAMS surfaceParams)134 MOS_STATUS CodecHalMmcStateG12::SetSurfaceParams(
135 PCODECHAL_SURFACE_CODEC_PARAMS surfaceParams)
136 {
137 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
138
139 CODECHAL_HW_FUNCTION_ENTER;
140
141 if (m_mmcEnabled)
142 {
143 CODECHAL_HW_CHK_NULL_RETURN(surfaceParams->psSurface);
144 CODECHAL_HW_CHK_STATUS_RETURN(m_osInterface->pfnGetMemoryCompressionMode(
145 m_osInterface,
146 &surfaceParams->psSurface->OsResource,
147 &surfaceParams->psSurface->MmcState));
148 }
149 else
150 {
151 surfaceParams->psSurface->MmcState = MOS_MEMCOMP_DISABLED;
152 }
153 return eStatus;
154 }
155
SetSurfaceState(PMHW_VDBOX_SURFACE_PARAMS surfaceStateParams,PMOS_COMMAND_BUFFER cmdBuffer)156 MOS_STATUS CodecHalMmcStateG12::SetSurfaceState(
157 PMHW_VDBOX_SURFACE_PARAMS surfaceStateParams,
158 PMOS_COMMAND_BUFFER cmdBuffer)
159 {
160 CODECHAL_HW_CHK_NULL_RETURN(surfaceStateParams);
161 CODECHAL_HW_CHK_NULL_RETURN(surfaceStateParams->psSurface);
162
163 CODECHAL_HW_FUNCTION_ENTER;
164
165 if (m_mmcEnabled)
166 {
167 CODECHAL_HW_CHK_STATUS_RETURN(m_osInterface->pfnGetMemoryCompressionMode(m_osInterface,
168 &surfaceStateParams->psSurface->OsResource, &surfaceStateParams->mmcState));
169 CODECHAL_HW_CHK_STATUS_RETURN(m_osInterface->pfnGetMemoryCompressionFormat(m_osInterface,
170 &surfaceStateParams->psSurface->OsResource, &surfaceStateParams->dwCompressionFormat));
171 }
172 else
173 {
174 surfaceStateParams->mmcState = MOS_MEMCOMP_DISABLED;
175 }
176 return MOS_STATUS_SUCCESS;
177 }
178
SendPrologCmd(MhwMiInterface * miInterface,MOS_COMMAND_BUFFER * cmdBuffer,MOS_GPU_CONTEXT gpuContext)179 MOS_STATUS CodecHalMmcStateG12::SendPrologCmd(
180 MhwMiInterface *miInterface,
181 MOS_COMMAND_BUFFER *cmdBuffer,
182 MOS_GPU_CONTEXT gpuContext)
183 {
184 CODECHAL_HW_CHK_NULL_RETURN(miInterface);
185 CODECHAL_HW_CHK_NULL_RETURN(cmdBuffer);
186
187 if (m_mmcEnabled)
188 {
189 uint64_t auxTableBaseAddr = m_osInterface->pfnGetAuxTableBaseAddr(m_osInterface);
190 if (auxTableBaseAddr)
191 {
192 MHW_MI_LOAD_REGISTER_IMM_PARAMS lriParams;
193 MOS_ZeroMemory(&lriParams, sizeof(MHW_MI_LOAD_REGISTER_IMM_PARAMS));
194
195 if (MOS_RCS_ENGINE_USED(gpuContext))
196 {
197 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioRcsAuxTableBaseLow;
198 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
199 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
200
201 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioRcsAuxTableBaseHigh;
202 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
203 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
204
205 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioCcs0AuxTableBaseLow;
206 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
207 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
208
209 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioCcs0AuxTableBaseHigh;
210 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
211 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
212 }
213 else if (MOS_VECS_ENGINE_USED(gpuContext))
214 {
215 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVe0AuxTableBaseLow;
216 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
217 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
218
219 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVe0AuxTableBaseHigh;
220 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
221 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
222 }
223 else
224 {
225 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVd0AuxTableBaseLow;
226 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
227 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
228
229 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVd0AuxTableBaseHigh;
230 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
231 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
232
233 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVd2AuxTableBaseLow;
234 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
235 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
236
237 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVd2AuxTableBaseHigh;
238 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
239 CODECHAL_HW_CHK_STATUS_RETURN(miInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
240 }
241 }
242 }
243 return MOS_STATUS_SUCCESS;
244 }
245
246 //Program Huc Copy related command to clear aux table, not sumbit
ClearAuxSurf(CodechalDecode * m_decoder,MhwMiInterface * miInterface,MOS_RESOURCE * res,PCODECHAL_DECODE_SINGLEPIPE_VIRTUALENGINE_STATE m_veState)247 MOS_STATUS CodecHalMmcStateG12::ClearAuxSurf(
248 CodechalDecode* m_decoder,
249 MhwMiInterface * miInterface,
250 MOS_RESOURCE * res,
251 PCODECHAL_DECODE_SINGLEPIPE_VIRTUALENGINE_STATE m_veState)
252 {
253 CODECHAL_HW_CHK_NULL_RETURN(miInterface);
254 CODECHAL_HW_CHK_NULL_RETURN(res);
255 CODECHAL_HW_CHK_NULL_RETURN(res->pGmmResInfo);
256 CODECHAL_HW_CHK_NULL_RETURN(m_veState);
257
258 CODECHAL_HW_FUNCTION_ENTER;
259
260 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
261 bool hasAuxSurf = false;
262 uint32_t resArrayIndex = 0;
263 uint32_t auxSurfSize = 0;
264 uint32_t auxSurfOffset = 0;
265 MOS_COMMAND_BUFFER cmdBuffer;
266 MHW_MI_FLUSH_DW_PARAMS flushDwParams;
267 GMM_RESOURCE_FLAG gmmFlags;
268
269 gmmFlags = res->pGmmResInfo->GetResFlags();
270 hasAuxSurf = (gmmFlags.Gpu.MMC || gmmFlags.Info.MediaCompressed) && gmmFlags.Gpu.UnifiedAuxSurface;
271 if (!hasAuxSurf)
272 {
273 return MOS_STATUS_SUCCESS;
274 }
275
276 resArrayIndex = ((res->pGmmResInfo->GetArraySize()) > 1) ? m_osInterface->pfnGetResourceIndex(res):0;
277 auxSurfSize = (uint32_t)res->pGmmResInfo->GetAuxQPitch();
278 auxSurfOffset = (uint32_t)res->pGmmResInfo->GetPlanarAuxOffset(resArrayIndex, GMM_AUX_Y_CCS);
279 if (Mos_ResourceIsNull(&auxBufForClear))
280 {
281 CODECHAL_HW_CHK_STATUS_RETURN(m_decoder->AllocateBuffer(
282 &auxBufForClear,
283 auxSurfSize,
284 "auxClearBuffer",
285 true,
286 0));
287 }
288 else if (auxBufForClear.pGmmResInfo->GetSizeSurface() < auxSurfSize)
289 {
290 if (!Mos_ResourceIsNull(&auxBufForClear))
291 {
292 m_osInterface->pfnFreeResource(
293 m_osInterface,
294 &auxBufForClear);
295 }
296 CODECHAL_HW_CHK_STATUS_RETURN(m_decoder->AllocateBuffer(
297 &auxBufForClear,
298 auxSurfSize,
299 "auxClearBuffer",
300 true,
301 0));
302 }
303
304 CODECHAL_HW_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
305
306 // Send command buffer header at the beginning (OS dependent)
307 CODECHAL_HW_CHK_STATUS_RETURN(m_decoder->SendPrologWithFrameTracking(&cmdBuffer, false));
308
309 CODECHAL_HW_CHK_STATUS_RETURN(m_decoder->HucCopy(
310 &cmdBuffer, // pCmdBuffer
311 &auxBufForClear, // presSrc
312 res, // presDst
313 auxSurfSize, // u32CopyLength
314 0, // u32CopyInputOffset
315 auxSurfOffset)); // u32CopyOutputOffset
316
317 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
318
319 return eStatus;
320 }
321
~CodecHalMmcStateG12()322 CodecHalMmcStateG12::~CodecHalMmcStateG12()
323 {
324 CODECHAL_DECODE_FUNCTION_ENTER;
325
326 if (!Mos_ResourceIsNull(&auxBufForClear))
327 {
328 m_osInterface->pfnFreeResource(
329 m_osInterface,
330 &auxBufForClear);
331 }
332 }
333