1 /* $OpenBSD: rcvbundl.h,v 1.2 2005/04/24 20:41:34 brad Exp $ */ 2 3 /* 4 Copyright (c) 1999-2001, Intel Corporation 5 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright notice, 15 this list of conditions and the following disclaimer in the documentation 16 and/or other materials provided with the distribution. 17 18 3. Neither the name of Intel Corporation nor the names of its contributors 19 may be used to endorse or promote products derived from this software 20 without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 28 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 29 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 30 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 31 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /* 34 rcvbundl.h 35 36 Author: Patrick J Luhmann (PJL) 37 Date: 05/30/2000 38 Version: 3.28 39 40 This file contains the loadable micro code arrays to implement receive bundling on the 41 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step, 42 D102 B-step with TCO work around, D102 C-step and D102 E-step. 43 44 Each controller has its own specific micro code array. The array for one controller 45 is totally incompatible with any other controller, and if used will most likely 46 cause the controller to lock up and stop responding to the driver. Each micro 47 code array has its own parameter offsets (described below), and they each have 48 their own version number (which should not be confused with the version of the 49 rcvbundl.h file given above). 50 51 */ 52 53 54 55 /************************************************************************* 56 * CPUSaver parameters 57 * 58 * All CPUSaver parameters are 16-bit literals that are part of a 59 * "move immediate value" instruction. By changing the value of 60 * the literal in the instruction before the code is loaded, the 61 * driver can change algorithm. 62 * 63 * CPUSAVER_DWORD - This is the location of the instruction that loads 64 * the dead-man timer with its inital value. By writing a 16-bit 65 * value to the low word of this instruction, the driver can change 66 * the timer value. The current default is either x600 or x800; 67 * experiments show that the value probably should stay within the 68 * range of x200 - x1000. 69 * 70 * CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction 71 * that sets the maximum number of frames that will be bundled. In 72 * some situations, such as the TCP windowing algorithm, it may be 73 * better to limit the growth of the bundle size than let it go as 74 * high as it can, because that could cause too much added latency. 75 * The default is six, because this is the number of packets in the 76 * default TCP window size. A value of 1 would make CPUSaver indicate 77 * an interrupt for every frame received. If you do not want to put 78 * a limit on the bundle size, set this value to xFFFF. 79 * 80 * CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction 81 * that contains a bit-mask describing the minimum size frame that 82 * will be bundled. The default masks the lower 7 bits, which means 83 * that any frame less than 128 bytes in length will not be bundled, 84 * but will instead immediately generate an interrupt. This does 85 * not affect the current bundle in any way. Any frame that is 128 86 * bytes or large will be bundled normally. This feature is meant 87 * to provide immediate indication of ACK frames in a TCP environment. 88 * Customers were seeing poor performance when a machine with CPUSaver 89 * enabled was sending but not receiving. The delay introduced when 90 * the ACKs were received was enough to reduce total throughput, because 91 * the sender would sit idle until the ACK was finally seen. 92 * 93 * The current default is 0xFF80, which masks out the lower 7 bits. 94 * This means that any frame which is x7F (127) bytes or smaller 95 * will cause an immediate interrupt. Because this value must be a 96 * bit mask, there are only a few valid values that can be used. To 97 * turn this feature off, the driver can write the value xFFFF to the 98 * lower word of this instruction (in the same way that the other 99 * parameters are used). Likewise, a value of 0xF800 (2047) would 100 * cause an interrupt to be generated for every frame, because all 101 * standard Ethernet frames are <= 2047 bytes in length. 102 *************************************************************************/ 103 104 105 106 /********************************************************/ 107 /* CPUSaver micro code for the D101A */ 108 /********************************************************/ 109 110 /* Version 2.0 */ 111 112 /* This value is the same for both A and B step of 558. */ 113 #define D101_CPUSAVER_DWORD 72 114 115 116 #define D101_A_RCVBUNDLE_UCODE \ 117 {\ 118 0x03B301BB, \ 119 0x0046FFFF, \ 120 0xFFFFFFFF, \ 121 0x051DFFFF, \ 122 0xFFFFFFFF, \ 123 0xFFFFFFFF, \ 124 0x000C0001, \ 125 0x00101212, \ 126 0x000C0008, \ 127 0x003801BC, \ 128 0x00000000, \ 129 0x00124818, \ 130 0x000C1000, \ 131 0x00220809, \ 132 0x00010200, \ 133 0x00124818, \ 134 0x000CFFFC, \ 135 0x003803B5, \ 136 0x00000000, \ 137 0x00000000, \ 138 0x00000000, \ 139 0x00000000, \ 140 0x0010009C, \ 141 0x0024B81D, \ 142 0x00130836, \ 143 0x000C0001, \ 144 0x0026081C, \ 145 0x0020C81B, \ 146 0x00130824, \ 147 0x00222819, \ 148 0x00101213, \ 149 0x00041000, \ 150 0x003A03B3, \ 151 0x00010200, \ 152 0x00101B13, \ 153 0x00238081, \ 154 0x00213049, \ 155 0x0038003B, \ 156 0x00000000, \ 157 0x00000000, \ 158 0x00000000, \ 159 0x00000000, \ 160 0x00000000, \ 161 0x00000000, \ 162 0x00000000, \ 163 0x00000000, \ 164 0x00000000, \ 165 0x00000000, \ 166 0x00000000, \ 167 0x00000000, \ 168 0x00000000, \ 169 0x00000000, \ 170 0x00000000, \ 171 0x00000000, \ 172 0x0010009C, \ 173 0x0024B83E, \ 174 0x00130826, \ 175 0x000C0001, \ 176 0x0026083B, \ 177 0x00010200, \ 178 0x00134824, \ 179 0x000C0001, \ 180 0x00101213, \ 181 0x00041000, \ 182 0x0038051E, \ 183 0x00101313, \ 184 0x00010400, \ 185 0x00380521, \ 186 0x00050600, \ 187 0x00100824, \ 188 0x00101310, \ 189 0x00041000, \ 190 0x00080600, \ 191 0x00101B10, \ 192 0x0038051E, \ 193 0x00000000, \ 194 0x00000000, \ 195 0x00000000, \ 196 0x00000000, \ 197 0x00000000, \ 198 0x00000000, \ 199 0x00000000, \ 200 0x00000000, \ 201 0x00000000, \ 202 0x00000000, \ 203 0x00000000, \ 204 0x00000000, \ 205 0x00000000, \ 206 0x00000000, \ 207 0x00000000, \ 208 0x00000000, \ 209 0x00000000, \ 210 0x00000000, \ 211 0x00000000, \ 212 0x00000000, \ 213 0x00000000, \ 214 0x00000000, \ 215 0x00000000, \ 216 0x00000000, \ 217 0x00000000, \ 218 0x00000000, \ 219 0x00000000, \ 220 } 221 222 223 /********************************************************/ 224 /* CPUSaver micro code for the D101B */ 225 /********************************************************/ 226 227 /* Version 2.0 */ 228 229 #define D101_B0_RCVBUNDLE_UCODE \ 230 {\ 231 0x03B401BC, \ 232 0x0047FFFF, \ 233 0xFFFFFFFF, \ 234 0x051EFFFF, \ 235 0xFFFFFFFF, \ 236 0xFFFFFFFF, \ 237 0x000C0001, \ 238 0x00101B92, \ 239 0x000C0008, \ 240 0x003801BD, \ 241 0x00000000, \ 242 0x00124818, \ 243 0x000C1000, \ 244 0x00220809, \ 245 0x00010200, \ 246 0x00124818, \ 247 0x000CFFFC, \ 248 0x003803B6, \ 249 0x00000000, \ 250 0x00000000, \ 251 0x00000000, \ 252 0x00000000, \ 253 0x0010009C, \ 254 0x0024B81D, \ 255 0x0013082F, \ 256 0x000C0001, \ 257 0x0026081C, \ 258 0x0020C81B, \ 259 0x00130837, \ 260 0x00222819, \ 261 0x00101B93, \ 262 0x00041000, \ 263 0x003A03B4, \ 264 0x00010200, \ 265 0x00101793, \ 266 0x00238082, \ 267 0x0021304A, \ 268 0x0038003C, \ 269 0x00000000, \ 270 0x00000000, \ 271 0x00000000, \ 272 0x00000000, \ 273 0x00000000, \ 274 0x00000000, \ 275 0x00000000, \ 276 0x00000000, \ 277 0x00000000, \ 278 0x00000000, \ 279 0x00000000, \ 280 0x00000000, \ 281 0x00000000, \ 282 0x00000000, \ 283 0x00000000, \ 284 0x00000000, \ 285 0x0010009C, \ 286 0x0024B83E, \ 287 0x00130826, \ 288 0x000C0001, \ 289 0x0026083B, \ 290 0x00010200, \ 291 0x00134837, \ 292 0x000C0001, \ 293 0x00101B93, \ 294 0x00041000, \ 295 0x0038051F, \ 296 0x00101313, \ 297 0x00010400, \ 298 0x00380522, \ 299 0x00050600, \ 300 0x00100837, \ 301 0x00101310, \ 302 0x00041000, \ 303 0x00080600, \ 304 0x00101790, \ 305 0x0038051F, \ 306 0x00000000, \ 307 0x00000000, \ 308 0x00000000, \ 309 0x00000000, \ 310 0x00000000, \ 311 0x00000000, \ 312 0x00000000, \ 313 0x00000000, \ 314 0x00000000, \ 315 0x00000000, \ 316 0x00000000, \ 317 0x00000000, \ 318 0x00000000, \ 319 0x00000000, \ 320 0x00000000, \ 321 0x00000000, \ 322 0x00000000, \ 323 0x00000000, \ 324 0x00000000, \ 325 0x00000000, \ 326 0x00000000, \ 327 0x00000000, \ 328 0x00000000, \ 329 0x00000000, \ 330 0x00000000, \ 331 0x00000000, \ 332 0x00000000, \ 333 } 334 335 336 /********************************************************/ 337 /* CPUSaver micro code for the D101M (B-step only) */ 338 /********************************************************/ 339 340 /* Version 2.10 */ 341 342 /* Parameter values for the D101M B-step */ 343 #define D101M_CPUSAVER_DWORD 78 344 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD 65 345 #define D101M_CPUSAVER_MIN_SIZE_DWORD 126 346 347 348 #define D101M_B_RCVBUNDLE_UCODE \ 349 {\ 350 0x00550215, \ 351 0xFFFF0437, \ 352 0xFFFFFFFF, \ 353 0x06A70789, \ 354 0xFFFFFFFF, \ 355 0x0558FFFF, \ 356 0x000C0001, \ 357 0x00101312, \ 358 0x000C0008, \ 359 0x00380216, \ 360 0x0010009C, \ 361 0x00204056, \ 362 0x002380CC, \ 363 0x00380056, \ 364 0x0010009C, \ 365 0x00244C0B, \ 366 0x00000800, \ 367 0x00124818, \ 368 0x00380438, \ 369 0x00000000, \ 370 0x00140000, \ 371 0x00380555, \ 372 0x00308000, \ 373 0x00100662, \ 374 0x00100561, \ 375 0x000E0408, \ 376 0x00134861, \ 377 0x000C0002, \ 378 0x00103093, \ 379 0x00308000, \ 380 0x00100624, \ 381 0x00100561, \ 382 0x000E0408, \ 383 0x00100861, \ 384 0x000C007E, \ 385 0x00222C21, \ 386 0x000C0002, \ 387 0x00103093, \ 388 0x00380C7A, \ 389 0x00080000, \ 390 0x00103090, \ 391 0x00380C7A, \ 392 0x00000000, \ 393 0x00000000, \ 394 0x00000000, \ 395 0x00000000, \ 396 0x0010009C, \ 397 0x00244C2D, \ 398 0x00010004, \ 399 0x00041000, \ 400 0x003A0437, \ 401 0x00044010, \ 402 0x0038078A, \ 403 0x00000000, \ 404 0x00100099, \ 405 0x00206C7A, \ 406 0x0010009C, \ 407 0x00244C48, \ 408 0x00130824, \ 409 0x000C0001, \ 410 0x00101213, \ 411 0x00260C75, \ 412 0x00041000, \ 413 0x00010004, \ 414 0x00130826, \ 415 0x000C0006, \ 416 0x002206A8, \ 417 0x0013C926, \ 418 0x00101313, \ 419 0x003806A8, \ 420 0x00000000, \ 421 0x00000000, \ 422 0x00000000, \ 423 0x00000000, \ 424 0x00000000, \ 425 0x00000000, \ 426 0x00000000, \ 427 0x00000000, \ 428 0x00080600, \ 429 0x00101B10, \ 430 0x00050004, \ 431 0x00100826, \ 432 0x00101210, \ 433 0x00380C34, \ 434 0x00000000, \ 435 0x00000000, \ 436 0x0021155B, \ 437 0x00100099, \ 438 0x00206559, \ 439 0x0010009C, \ 440 0x00244559, \ 441 0x00130836, \ 442 0x000C0000, \ 443 0x00220C62, \ 444 0x000C0001, \ 445 0x00101B13, \ 446 0x00229C0E, \ 447 0x00210C0E, \ 448 0x00226C0E, \ 449 0x00216C0E, \ 450 0x0022FC0E, \ 451 0x00215C0E, \ 452 0x00214C0E, \ 453 0x00380555, \ 454 0x00010004, \ 455 0x00041000, \ 456 0x00278C67, \ 457 0x00040800, \ 458 0x00018100, \ 459 0x003A0437, \ 460 0x00130826, \ 461 0x000C0001, \ 462 0x00220559, \ 463 0x00101313, \ 464 0x00380559, \ 465 0x00000000, \ 466 0x00000000, \ 467 0x00000000, \ 468 0x00000000, \ 469 0x00000000, \ 470 0x00000000, \ 471 0x00000000, \ 472 0x00000000, \ 473 0x00130831, \ 474 0x0010090B, \ 475 0x00124813, \ 476 0x000CFF80, \ 477 0x002606AB, \ 478 0x00041000, \ 479 0x003806A8, \ 480 0x00000000, \ 481 0x00000000, \ 482 0x00000000, \ 483 0x00000000, \ 484 } 485 486 487 /********************************************************/ 488 /* CPUSaver micro code for the D101S */ 489 /********************************************************/ 490 491 /* Version 1.20 */ 492 493 /* Parameter values for the D101S */ 494 #define D101S_CPUSAVER_DWORD 78 495 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD 67 496 #define D101S_CPUSAVER_MIN_SIZE_DWORD 129 497 498 499 #define D101S_RCVBUNDLE_UCODE \ 500 {\ 501 0x00550242, \ 502 0xFFFF047E, \ 503 0xFFFFFFFF, \ 504 0x06FF0818, \ 505 0xFFFFFFFF, \ 506 0x05A6FFFF, \ 507 0x000C0001, \ 508 0x00101312, \ 509 0x000C0008, \ 510 0x00380243, \ 511 0x0010009C, \ 512 0x00204056, \ 513 0x002380D0, \ 514 0x00380056, \ 515 0x0010009C, \ 516 0x00244F8B, \ 517 0x00000800, \ 518 0x00124818, \ 519 0x0038047F, \ 520 0x00000000, \ 521 0x00140000, \ 522 0x003805A3, \ 523 0x00308000, \ 524 0x00100610, \ 525 0x00100561, \ 526 0x000E0408, \ 527 0x00134861, \ 528 0x000C0002, \ 529 0x00103093, \ 530 0x00308000, \ 531 0x00100624, \ 532 0x00100561, \ 533 0x000E0408, \ 534 0x00100861, \ 535 0x000C007E, \ 536 0x00222FA1, \ 537 0x000C0002, \ 538 0x00103093, \ 539 0x00380F90, \ 540 0x00080000, \ 541 0x00103090, \ 542 0x00380F90, \ 543 0x00000000, \ 544 0x00000000, \ 545 0x00000000, \ 546 0x00000000, \ 547 0x0010009C, \ 548 0x00244FAD, \ 549 0x00010004, \ 550 0x00041000, \ 551 0x003A047E, \ 552 0x00044010, \ 553 0x00380819, \ 554 0x00000000, \ 555 0x00100099, \ 556 0x00206FFD, \ 557 0x0010009A, \ 558 0x0020AFFD, \ 559 0x0010009C, \ 560 0x00244FC8, \ 561 0x00130824, \ 562 0x000C0001, \ 563 0x00101213, \ 564 0x00260FF8, \ 565 0x00041000, \ 566 0x00010004, \ 567 0x00130826, \ 568 0x000C0006, \ 569 0x00220700, \ 570 0x0013C926, \ 571 0x00101313, \ 572 0x00380700, \ 573 0x00000000, \ 574 0x00000000, \ 575 0x00000000, \ 576 0x00000000, \ 577 0x00000000, \ 578 0x00000000, \ 579 0x00080600, \ 580 0x00101B10, \ 581 0x00050004, \ 582 0x00100826, \ 583 0x00101210, \ 584 0x00380FB6, \ 585 0x00000000, \ 586 0x00000000, \ 587 0x002115A9, \ 588 0x00100099, \ 589 0x002065A7, \ 590 0x0010009A, \ 591 0x0020A5A7, \ 592 0x0010009C, \ 593 0x002445A7, \ 594 0x00130836, \ 595 0x000C0000, \ 596 0x00220FE4, \ 597 0x000C0001, \ 598 0x00101B13, \ 599 0x00229F8E, \ 600 0x00210F8E, \ 601 0x00226F8E, \ 602 0x00216F8E, \ 603 0x0022FF8E, \ 604 0x00215F8E, \ 605 0x00214F8E, \ 606 0x003805A3, \ 607 0x00010004, \ 608 0x00041000, \ 609 0x00278FE9, \ 610 0x00040800, \ 611 0x00018100, \ 612 0x003A047E, \ 613 0x00130826, \ 614 0x000C0001, \ 615 0x002205A7, \ 616 0x00101313, \ 617 0x003805A7, \ 618 0x00000000, \ 619 0x00000000, \ 620 0x00000000, \ 621 0x00000000, \ 622 0x00000000, \ 623 0x00000000, \ 624 0x00000000, \ 625 0x00000000, \ 626 0x00000000, \ 627 0x00130831, \ 628 0x0010090B, \ 629 0x00124813, \ 630 0x000CFF80, \ 631 0x00260703, \ 632 0x00041000, \ 633 0x00380700, \ 634 0x00000000, \ 635 } 636 637 638 /********************************************************/ 639 /* CPUSaver micro code for the D102 B-step */ 640 /********************************************************/ 641 642 /* Version 2.0 */ 643 644 /* 645 This version of CPUSaver is different from all others in 646 a different way. It combines the CPUSaver algorithm with 647 fixes for bugs in the B-step hardware (specifically, bugs 648 with Inline Receive). 649 Thus, when CPUSaver is disabled, this micro code image will 650 still need to be loaded. Before this happens, the hit addresses 651 for the CPUSaver algorithm must be set to 0x1FFFF. The hit 652 addresses for CPUSaver are (starting with 0, and remember that 653 654 */ 655 656 /* Parameter values for the D102 B-step */ 657 #define D102_B_CPUSAVER_DWORD 91 658 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD 115 659 #define D102_B_CPUSAVER_MIN_SIZE_DWORD 70 660 661 662 #define D102_B_RCVBUNDLE_UCODE \ 663 {\ 664 0x006F0276, \ 665 0x02BF0E93, \ 666 0x1FFF0ED9, \ 667 0x0D2508FA, \ 668 0x04D21FFF, \ 669 0x0EA10892, \ 670 0x00300001, \ 671 0x0140D871, \ 672 0x00300008, \ 673 0x00E00277, \ 674 0x01406C57, \ 675 0x00816073, \ 676 0x008700FA, \ 677 0x00E00070, \ 678 0x00E00E94, \ 679 0x00200004, \ 680 0x01410000, \ 681 0x014B6F6F, \ 682 0x0030FFFF, \ 683 0x01486F72, \ 684 0x00E81F9B, \ 685 0x00E00EA3, \ 686 0x003C0040, \ 687 0x00380920, \ 688 0x00C02000, \ 689 0x0150ED38, \ 690 0x0150EE39, \ 691 0x0150EF3A, \ 692 0x003C0040, \ 693 0x01506F0D, \ 694 0x01600E72, \ 695 0x00380AE0, \ 696 0x00E002C0, \ 697 0x00300001, \ 698 0x014C0000, \ 699 0x008404DC, \ 700 0x014C6F72, \ 701 0x00E01F9D, \ 702 0x01406C51, \ 703 0x0080DFC2, \ 704 0x01406C52, \ 705 0x00815FC2, \ 706 0x01406C57, \ 707 0x00917FD5, \ 708 0x00E01FE6, \ 709 0x00000000, \ 710 0x01406C57, \ 711 0x00919FAD, \ 712 0x00038800, \ 713 0x00300000, \ 714 0x00E81FF2, \ 715 0x014D6FC4, \ 716 0x00E008FB, \ 717 0x00000000, \ 718 0x00822D30, \ 719 0x01406C51, \ 720 0x0080CD26, \ 721 0x01406C52, \ 722 0x00814D26, \ 723 0x01406C57, \ 724 0x00916D26, \ 725 0x014C6FD7, \ 726 0x00300000, \ 727 0x00841FDB, \ 728 0x00300001, \ 729 0x0140D772, \ 730 0x00E012B3, \ 731 0x014C6F91, \ 732 0x0150710B, \ 733 0x01496F72, \ 734 0x0030FF80, \ 735 0x00940EDD, \ 736 0x00102000, \ 737 0x00E00EDA, \ 738 0x01406C57, \ 739 0x00917FFD, \ 740 0x00001000, \ 741 0x00E01FFD, \ 742 0x00138800, \ 743 0x00300001, \ 744 0x00E81FF2, \ 745 0x00202500, \ 746 0x00E81F9B, \ 747 0x01600EC5, \ 748 0x00E00893, \ 749 0x00000000, \ 750 0x01406CD5, \ 751 0x0091EEA3, \ 752 0x00904EA3, \ 753 0x00901F89, \ 754 0x00E00EA3, \ 755 0x00200600, \ 756 0x0140D76F, \ 757 0x00138400, \ 758 0x01406FD8, \ 759 0x0140D96F, \ 760 0x00E01FE6, \ 761 0x00038400, \ 762 0x00102000, \ 763 0x00971FE0, \ 764 0x00101000, \ 765 0x00050200, \ 766 0x00E804D2, \ 767 0x014C6FD8, \ 768 0x00300001, \ 769 0x00840D26, \ 770 0x0140D872, \ 771 0x00E00D26, \ 772 0x014C6FD9, \ 773 0x00300001, \ 774 0x0140D972, \ 775 0x00941FBD, \ 776 0x00102000, \ 777 0x00038400, \ 778 0x014C6FD8, \ 779 0x00300006, \ 780 0x00840EDA, \ 781 0x014F71D8, \ 782 0x0140D872, \ 783 0x00E00EDA, \ 784 0x00340020, \ 785 0x014C6FED, \ 786 0x01603472, \ 787 0x016035EE, \ 788 0x016036EF, \ 789 0x00300004, \ 790 0x01611C71, \ 791 0x00300014, \ 792 0x00200A00, \ 793 0x00E810B9, \ 794 0x00600000, \ 795 0x01496F50, \ 796 0x00E004D3, \ 797 0x00000000, \ 798 } 799 800 801 802 803 /********************************************************/ 804 /* TCO micro code for the D102 B-step */ 805 /********************************************************/ 806 807 /* Version 2.0 */ 808 809 /* 810 This version is a fix to TCO bug. This version can be loaded instead 811 the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver" 812 813 */ 814 815 816 #define D102_B_TCO_UCODE \ 817 {\ 818 0x1FFF0ED3, \ 819 0x02BF0E93, \ 820 0x1FFF1FFF, \ 821 0x1FFF08FA, \ 822 0x1FFF1FFF, \ 823 0x0EA10892, \ 824 0x00906ED8, \ 825 0x01406C55, \ 826 0x00E00ED4, \ 827 0x00000000, \ 828 0x00000000, \ 829 0x00000000, \ 830 0x00000000, \ 831 0x00000000, \ 832 0x00E00E94, \ 833 0x00200004, \ 834 0x01410000, \ 835 0x014B6F6F, \ 836 0x0030FFFF, \ 837 0x01486F72, \ 838 0x00E81F9B, \ 839 0x00E00EA3, \ 840 0x003C0040, \ 841 0x00380920, \ 842 0x00C02000, \ 843 0x0150ED38, \ 844 0x0150EE39, \ 845 0x0150EF3A, \ 846 0x003C0040, \ 847 0x01506F0D, \ 848 0x01600E72, \ 849 0x00380AE0, \ 850 0x00E002C0, \ 851 0x00300001, \ 852 0x014C0000, \ 853 0x008404DC, \ 854 0x014C6F72, \ 855 0x00E01F9D, \ 856 0x00000000, \ 857 0x00000000, \ 858 0x00000000, \ 859 0x00000000, \ 860 0x00000000, \ 861 0x00000000, \ 862 0x00000000, \ 863 0x00000000, \ 864 0x01406C57, \ 865 0x00919FAD, \ 866 0x00038800, \ 867 0x00300000, \ 868 0x00E81FD5, \ 869 0x014D6FC4, \ 870 0x00E008FB, \ 871 0x00000000, \ 872 0x00000000, \ 873 0x00000000, \ 874 0x00000000, \ 875 0x00000000, \ 876 0x00000000, \ 877 0x00000000, \ 878 0x00000000, \ 879 0x00000000, \ 880 0x00000000, \ 881 0x00000000, \ 882 0x00000000, \ 883 0x00000000, \ 884 0x00000000, \ 885 0x00000000, \ 886 0x00000000, \ 887 0x00000000, \ 888 0x00000000, \ 889 0x00000000, \ 890 0x00000000, \ 891 0x00000000, \ 892 0x00000000, \ 893 0x00000000, \ 894 0x00000000, \ 895 0x00000000, \ 896 0x00138800, \ 897 0x00300001, \ 898 0x00E81FD5, \ 899 0x00202500, \ 900 0x00E81F9B, \ 901 0x01600EC5, \ 902 0x00E00893, \ 903 0x00000000, \ 904 0x01406CD5, \ 905 0x0091EEA3, \ 906 0x00904EA3, \ 907 0x00901F89, \ 908 0x00E00EA3, \ 909 0x00340020, \ 910 0x014C6FED, \ 911 0x01603472, \ 912 0x016035EE, \ 913 0x016036EF, \ 914 0x00300004, \ 915 0x01611C71, \ 916 0x00300014, \ 917 0x00200A00, \ 918 0x00E810B9, \ 919 0x00600000, \ 920 0x00000000, \ 921 0x00000000, \ 922 0x00000000, \ 923 0x00000000, \ 924 0x00000000, \ 925 0x00000000, \ 926 0x00000000, \ 927 0x00000000, \ 928 0x00000000, \ 929 0x00000000, \ 930 0x00000000, \ 931 0x00000000, \ 932 0x00000000, \ 933 0x00000000, \ 934 0x00000000, \ 935 0x00000000, \ 936 0x00000000, \ 937 0x00000000, \ 938 0x00000000, \ 939 0x00000000, \ 940 0x00000000, \ 941 0x00000000, \ 942 0x00000000, \ 943 0x00000000, \ 944 0x00000000, \ 945 0x00000000, \ 946 0x00000000, \ 947 0x00000000, \ 948 0x00000000, \ 949 0x00000000, \ 950 0x00000000, \ 951 0x00000000, \ 952 } 953 954 955 956 /********************************************************/ 957 /* Micro code for the D102 C-step */ 958 /********************************************************/ 959 960 /* Parameter values for the D102 C-step */ 961 #define D102_C_CPUSAVER_DWORD 46 962 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD 54 963 #define D102_C_CPUSAVER_MIN_SIZE_DWORD 133 /* not implemented */ 964 965 966 967 968 969 #if 0 970 // this uCode include the CPU Saver and the TCO work around 971 //for IP fregments. 972 #endif 973 #define D102_C_RCVBUNDLE_UCODE \ 974 { \ 975 0x00700279, \ 976 0x0E6104E2, \ 977 0x02BF0CAE, \ 978 0x1519150C, \ 979 0x1FFF0E5B, \ 980 0x1FFF1FFF, \ 981 0x00E014D8, \ 982 0x00000000, \ 983 0x00000000, \ 984 0x00000000, \ 985 0x00E014DC, \ 986 0x00000000, \ 987 0x00000000, \ 988 0x00000000, \ 989 0x00E014F4, \ 990 0x00000000, \ 991 0x00000000, \ 992 0x00000000, \ 993 0x00000000, \ 994 0x00000000, \ 995 0x00000000, \ 996 0x00000000, \ 997 0x00E014E0, \ 998 0x00000000, \ 999 0x00000000, \ 1000 0x00000000, \ 1001 0x00000000, \ 1002 0x00000000, \ 1003 0x00000000, \ 1004 0x00000000, \ 1005 0x00000000, \ 1006 0x00000000, \ 1007 0x00000000, \ 1008 0x00000000, \ 1009 0x00000000, \ 1010 0x00000000, \ 1011 0x00000000, \ 1012 0x00000000, \ 1013 0x00E014E7, \ 1014 0x00000000, \ 1015 0x00000000, \ 1016 0x00000000, \ 1017 0x00141000, \ 1018 0x015D6F0D, \ 1019 0x00E002C0, \ 1020 0x00000000, \ 1021 0x00200600, \ 1022 0x00E0150D, \ 1023 0x00000000, \ 1024 0x00000000, \ 1025 0x00000000, \ 1026 0x00000000, \ 1027 0x00000000, \ 1028 0x00000000, \ 1029 0x00300006, \ 1030 0x00E0151A, \ 1031 0x00000000, \ 1032 0x00000000, \ 1033 0x00000000, \ 1034 0x00000000, \ 1035 0x00000000, \ 1036 0x00000000, \ 1037 0x00000000, \ 1038 0x00000000, \ 1039 0x00000000, \ 1040 0x00000000, \ 1041 0x00000000, \ 1042 0x00000000, \ 1043 0x00000000, \ 1044 0x00000000, \ 1045 0x00906E65, \ 1046 0x00800E60, \ 1047 0x00E00E5D, \ 1048 0x00000000, \ 1049 0x00000000, \ 1050 0x00000000, \ 1051 0x00000000, \ 1052 0x00000000, \ 1053 0x00000000, \ 1054 0x00000000, \ 1055 0x00000000, \ 1056 0x00000000, \ 1057 0x00000000, \ 1058 0x00000000, \ 1059 0x00000000, \ 1060 0x00000000, \ 1061 0x00000000, \ 1062 0x00000000, \ 1063 0x00000000, \ 1064 0x00000000, \ 1065 0x00000000, \ 1066 0x00000000, \ 1067 0x00000000, \ 1068 0x00000000, \ 1069 0x00000000, \ 1070 0x00000000, \ 1071 0x00000000, \ 1072 0x00000000, \ 1073 0x00000000, \ 1074 0x00000000, \ 1075 0x00000000, \ 1076 0x00000000, \ 1077 0x00000000, \ 1078 0x00000000, \ 1079 0x00000000, \ 1080 0x00000000, \ 1081 0x00000000, \ 1082 0x00000000, \ 1083 0x00000000, \ 1084 0x00000000, \ 1085 0x00000000, \ 1086 0x00000000, \ 1087 0x00000000, \ 1088 0x00000000, \ 1089 0x00000000, \ 1090 0x00000000, \ 1091 0x00000000, \ 1092 0x00000000, \ 1093 0x00000000, \ 1094 0x00000000, \ 1095 0x00000000, \ 1096 0x00000000, \ 1097 0x00000000, \ 1098 0x00000000, \ 1099 0x00000000, \ 1100 0x00000000, \ 1101 0x00000000, \ 1102 0x00000000, \ 1103 0x00000000, \ 1104 0x00000000, \ 1105 0x00000000, \ 1106 0x00000000, \ 1107 0x00000000, \ 1108 0x00000000, \ 1109 } 1110 1111 /********************************************************/ 1112 /* Micro code for the D102 E-step */ 1113 /********************************************************/ 1114 1115 /* Parameter values for the D102 E-step */ 1116 #define D102_E_CPUSAVER_DWORD 42 1117 #define D102_E_CPUSAVER_BUNDLE_MAX_DWORD 54 1118 #define D102_E_CPUSAVER_MIN_SIZE_DWORD 46 1119 1120 #define D102_E_RCVBUNDLE_UCODE \ 1121 {\ 1122 0x007D028F, \ 1123 0x0E4204F9, \ 1124 0x14ED0C85, \ 1125 0x14FA14E9, \ 1126 0x0EF70E36, \ 1127 0x1FFF1FFF, \ 1128 0x00E014B9, \ 1129 0x00000000, \ 1130 0x00000000, \ 1131 0x00000000, \ 1132 0x00E014BD, \ 1133 0x00000000, \ 1134 0x00000000, \ 1135 0x00000000, \ 1136 0x00E014D5, \ 1137 0x00000000, \ 1138 0x00000000, \ 1139 0x00000000, \ 1140 0x00000000, \ 1141 0x00000000, \ 1142 0x00000000, \ 1143 0x00000000, \ 1144 0x00E014C1, \ 1145 0x00000000, \ 1146 0x00000000, \ 1147 0x00000000, \ 1148 0x00000000, \ 1149 0x00000000, \ 1150 0x00000000, \ 1151 0x00000000, \ 1152 0x00000000, \ 1153 0x00000000, \ 1154 0x00000000, \ 1155 0x00000000, \ 1156 0x00000000, \ 1157 0x00000000, \ 1158 0x00000000, \ 1159 0x00000000, \ 1160 0x00E014C8, \ 1161 0x00000000, \ 1162 0x00000000, \ 1163 0x00000000, \ 1164 0x00200600, \ 1165 0x00E014EE, \ 1166 0x00000000, \ 1167 0x00000000, \ 1168 0x0030FF80, \ 1169 0x00940E46, \ 1170 0x00038200, \ 1171 0x00102000, \ 1172 0x00E00E43, \ 1173 0x00000000, \ 1174 0x00000000, \ 1175 0x00000000, \ 1176 0x00300006, \ 1177 0x00E014FB, \ 1178 0x00000000, \ 1179 0x00000000, \ 1180 0x00000000, \ 1181 0x00000000, \ 1182 0x00000000, \ 1183 0x00000000, \ 1184 0x00000000, \ 1185 0x00000000, \ 1186 0x00000000, \ 1187 0x00000000, \ 1188 0x00000000, \ 1189 0x00000000, \ 1190 0x00000000, \ 1191 0x00000000, \ 1192 0x00906E41, \ 1193 0x00800E3C, \ 1194 0x00E00E39, \ 1195 0x00000000, \ 1196 0x00906EFD, \ 1197 0x00900EFD, \ 1198 0x00E00EF8, \ 1199 0x00000000, \ 1200 0x00000000, \ 1201 0x00000000, \ 1202 0x00000000, \ 1203 0x00000000, \ 1204 0x00000000, \ 1205 0x00000000, \ 1206 0x00000000, \ 1207 0x00000000, \ 1208 0x00000000, \ 1209 0x00000000, \ 1210 0x00000000, \ 1211 0x00000000, \ 1212 0x00000000, \ 1213 0x00000000, \ 1214 0x00000000, \ 1215 0x00000000, \ 1216 0x00000000, \ 1217 0x00000000, \ 1218 0x00000000, \ 1219 0x00000000, \ 1220 0x00000000, \ 1221 0x00000000, \ 1222 0x00000000, \ 1223 0x00000000, \ 1224 0x00000000, \ 1225 0x00000000, \ 1226 0x00000000, \ 1227 0x00000000, \ 1228 0x00000000, \ 1229 0x00000000, \ 1230 0x00000000, \ 1231 0x00000000, \ 1232 0x00000000, \ 1233 0x00000000, \ 1234 0x00000000, \ 1235 0x00000000, \ 1236 0x00000000, \ 1237 0x00000000, \ 1238 0x00000000, \ 1239 0x00000000, \ 1240 0x00000000, \ 1241 0x00000000, \ 1242 0x00000000, \ 1243 0x00000000, \ 1244 0x00000000, \ 1245 0x00000000, \ 1246 0x00000000, \ 1247 0x00000000, \ 1248 0x00000000, \ 1249 0x00000000, \ 1250 0x00000000, \ 1251 0x00000000, \ 1252 0x00000000, \ 1253 0x00000000, \ 1254 0x00000000, \ 1255 0x00000000, \ 1256 } 1257