1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_1394_TARGETS_DCAM1394_REG_H 28 #define _SYS_1394_TARGETS_DCAM1394_REG_H 29 30 #include <sys/1394/targets/dcam1394/dcam.h> 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * dcam spec: Sec 1.1 Camera Initialize Register 38 */ 39 #define DCAM1394_REG_OFFS_INITIALIZE 0x0 40 #define DCAM1394_REG_VAL_INITIALIZE_ASSERT 0x80000000 41 42 /* 43 * dcam spec: Sec 1.2.1.1 Inquiry Register for Video Mode 44 */ 45 #define DCAM1394_REG_OFFS_VID_MODE_INQ 0x180 46 47 /* 48 * dcam spec: Sec 1.2.2 Inquiry Register for Video Frame Rate 49 */ 50 #define DCAM1394_REG_OFFS_FRAME_RATE_INQ_BASE 0x200 51 52 /* 53 * dcam spec: basic function inquiry registers, sec 1.3 54 */ 55 #define DCAM1394_REG_OFFS_BASIC_FUNC_INQ 0x400 56 57 #define DCAM1394_MASK_CAM_POWER_CTRL 0x8000 58 #define DCAM1394_SHIFT_CAM_POWER_CTRL 15 59 60 61 /* 62 * dcam spec: Sec 1.5 Inquiry Register for Feature Elements 63 */ 64 #define DCAM1394_REG_OFFS_FEATURE_ELM_INQ_BASE 0x500 65 66 #define DCAM1394_REG_OFFS_BRIGHTNESS_INQ 0x0 67 #define DCAM1394_REG_OFFS_EXPOSURE_INQ 0x4 68 #define DCAM1394_REG_OFFS_SHARPNESS_INQ 0x8 69 #define DCAM1394_REG_OFFS_WHITE_BALANCE_INQ 0xC 70 #define DCAM1394_REG_OFFS_HUE_INQ 0x10 71 #define DCAM1394_REG_OFFS_SATURATION_INQ 0x14 72 #define DCAM1394_REG_OFFS_GAMMA_INQ 0x18 73 #define DCAM1394_REG_OFFS_SHUTTER_INQ 0x1C 74 #define DCAM1394_REG_OFFS_GAIN_INQ 0x20 75 #define DCAM1394_REG_OFFS_IRIS_INQ 0x24 76 #define DCAM1394_REG_OFFS_FOCUS_INQ 0x28 77 #define DCAM1394_REG_OFFS_ZOOM_INQ 0x80 78 #define DCAM1394_REG_OFFS_PAN_INQ 0x84 79 #define DCAM1394_REG_OFFS_TILT_INQ 0x88 80 81 /* 82 * "presence of feature" bit is located in Feature Presence Inquiry 83 * Register(Sec 1.4) Feature Element Inquiry Register(Sec 1.5) and Feature 84 * Status and Control Register(Sec 1.7); driver will use later. 85 */ 86 #define DCAM1394_MASK_READOUT_INQ 0x8000000 87 #define DCAM1394_SHIFT_READOUT_INQ 27 88 89 #define DCAM1394_MASK_ON_OFF_INQ 0x4000000 90 #define DCAM1394_SHIFT_ON_OFF_INQ 26 91 92 #define DCAM1394_MASK_AUTO_INQ 0x2000000 93 #define DCAM1394_SHIFT_AUTO_INQ 25 94 95 #define DCAM1394_MASK_MANUAL_INQ 0x1000000 96 #define DCAM1394_SHIFT_MANUAL_INQ 24 97 98 #define DCAM1394_MASK_MIN_VAL 0xFFF000 99 #define DCAM1394_SHIFT_MIN_VAL 12 100 101 #define DCAM1394_MASK_MAX_VAL 0xFFF 102 #define DCAM1394_SHIFT_MAX_VAL 0 103 104 105 /* 106 * dcam spec: Sec 1.6 107 */ 108 #define DCAM1394_REG_OFFS_CUR_V_FRM_RATE 0x600 109 #define DCAM1394_SHIFT_CUR_V_FRM_RATE 29 110 111 #define DCAM1394_REG_OFFS_CUR_V_MODE 0x604 112 #define DCAM1394_SHIFT_CUR_V_MODE 29 113 114 #define DCAM1394_REG_OFFS_CUR_V_FORMAT 0x608 115 #define DCAM1394_REG_OFFS_CUR_ISO_CHANNEL 0x60C 116 117 #define DCAM1394_REG_OFFS_CAMERA_POWER 0x610 118 #define DCAM1394_SHIFT_CAMERA_POWER 31 119 120 #define DCAM1394_REG_OFFS_ISO_EN 0x614 121 #define DCAM1394_REG_OFFS_MEMORY_SAVE 0x618 122 #define DCAM1394_REG_OFFS_ONE_SHOT 0x61C 123 #define DCAM1394_REG_OFFS_MEM_SAVE_CH 0x620 124 #define DCAM1394_REG_OFFS_CUR_MEM_CH 0x624 125 126 127 #define DCAM1394_REG_OFFS_FEATURE_CSR_BASE 0x800 128 129 #define DCAM1394_REG_OFFS_BRIGHTNESS_CSR 0x0 130 #define DCAM1394_REG_OFFS_EXPOSURE_CSR 0x4 131 #define DCAM1394_REG_OFFS_SHARPNESS_CSR 0x8 132 #define DCAM1394_REG_OFFS_WHITE_BALANCE_CSR 0xC 133 #define DCAM1394_REG_OFFS_HUE_CSR 0x10 134 #define DCAM1394_REG_OFFS_SATURATION_CSR 0x14 135 #define DCAM1394_REG_OFFS_GAMMA_CSR 0x18 136 #define DCAM1394_REG_OFFS_SHUTTER_CSR 0x1C 137 #define DCAM1394_REG_OFFS_GAIN_CSR 0x20 138 #define DCAM1394_REG_OFFS_IRIS_CSR 0x24 139 #define DCAM1394_REG_OFFS_FOCUS_CSR 0x28 140 #define DCAM1394_REG_OFFS_ZOOM_CSR 0x80 141 #define DCAM1394_REG_OFFS_PAN_CSR 0x84 142 #define DCAM1394_REG_OFFS_TILT_CSR 0x88 143 144 #define DCAM1394_MASK_PRESENCE_INQ 0x80000000 145 #define DCAM1394_SHIFT_PRESENCE_INQ 31 146 147 #define DCAM1394_MASK_ON_OFF 0x2000000 148 #define DCAM1394_SHIFT_ON_OFF 25 149 150 #define DCAM1394_MASK_A_M_MODE 0x1000000 151 #define DCAM1394_SHIFT_A_M_MODE 24 152 153 #define DCAM1394_MASK_VALUE 0xFFF /* XXX: chk vals */ 154 #define DCAM1394_SHIFT_VALUE 0 155 156 /* 157 * white balance feature's u and v values 158 */ 159 #define DCAM1394_MASK_U_VALUE 0xFFF000 160 #define DCAM1394_SHIFT_U_VALUE 12 161 162 #define DCAM1394_MASK_V_VALUE 0xFFF 163 #define DCAM1394_SHIFT_V_VALUE 0 164 165 int dcam_reg_read(dcam_state_t *soft_state, dcam1394_reg_io_t *arg); 166 int dcam_reg_write(dcam_state_t *soft_state, dcam1394_reg_io_t *arg); 167 168 #ifdef __cplusplus 169 } 170 #endif 171 172 #endif /* _SYS_1394_TARGETS_DCAM1394_REG_H */ 173