1 /*
2 * Generic intermediate code generation.
3 *
4 * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9
10 #ifndef EXEC__TRANSLATOR_H
11 #define EXEC__TRANSLATOR_H
12
13 /*
14 * Include this header from a target-specific file, and add a
15 *
16 * DisasContextBase base;
17 *
18 * member in your target-specific DisasContext.
19 */
20
21 #include "qemu/bswap.h"
22 #include "exec/vaddr.h"
23
24 /**
25 * gen_intermediate_code
26 * @cpu: cpu context
27 * @tb: translation block
28 * @max_insns: max number of instructions to translate
29 * @pc: guest virtual program counter address
30 * @host_pc: host physical program counter address
31 *
32 * This function must be provided by the target, which should create
33 * the target-specific DisasContext, and then invoke translator_loop.
34 */
35 void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
36 vaddr pc, void *host_pc);
37
38 /**
39 * DisasJumpType:
40 * @DISAS_NEXT: Next instruction in program order.
41 * @DISAS_TOO_MANY: Too many instructions translated.
42 * @DISAS_NORETURN: Following code is dead.
43 * @DISAS_TARGET_*: Start of target-specific conditions.
44 *
45 * What instruction to disassemble next.
46 */
47 typedef enum DisasJumpType {
48 DISAS_NEXT,
49 DISAS_TOO_MANY,
50 DISAS_NORETURN,
51 DISAS_TARGET_0,
52 DISAS_TARGET_1,
53 DISAS_TARGET_2,
54 DISAS_TARGET_3,
55 DISAS_TARGET_4,
56 DISAS_TARGET_5,
57 DISAS_TARGET_6,
58 DISAS_TARGET_7,
59 DISAS_TARGET_8,
60 DISAS_TARGET_9,
61 DISAS_TARGET_10,
62 DISAS_TARGET_11,
63 } DisasJumpType;
64
65 /**
66 * DisasContextBase:
67 * @tb: Translation block for this disassembly.
68 * @pc_first: Address of first guest instruction in this TB.
69 * @pc_next: Address of next guest instruction in this TB (current during
70 * disassembly).
71 * @is_jmp: What instruction to disassemble next.
72 * @num_insns: Number of translated instructions (including current).
73 * @max_insns: Maximum number of instructions to be translated in this TB.
74 * @plugin_enabled: TCG plugin enabled in this TB.
75 * @fake_insn: True if translator_fake_ldb used.
76 * @insn_start: The last op emitted by the insn_start hook,
77 * which is expected to be INDEX_op_insn_start.
78 *
79 * Architecture-agnostic disassembly context.
80 */
81 struct DisasContextBase {
82 TranslationBlock *tb;
83 vaddr pc_first;
84 vaddr pc_next;
85 DisasJumpType is_jmp;
86 int num_insns;
87 int max_insns;
88 bool plugin_enabled;
89 bool fake_insn;
90 struct TCGOp *insn_start;
91 void *host_addr[2];
92
93 /*
94 * Record insn data that we cannot read directly from host memory.
95 * There are only two reasons we cannot use host memory:
96 * (1) We are executing from I/O,
97 * (2) We are executing a synthetic instruction (s390x EX).
98 * In both cases we need record exactly one instruction,
99 * and thus the maximum amount of data we record is limited.
100 */
101 int record_start;
102 int record_len;
103 uint8_t record[32];
104 };
105
106 /**
107 * TranslatorOps:
108 * @init_disas_context:
109 * Initialize the target-specific portions of DisasContext struct.
110 * The generic DisasContextBase has already been initialized.
111 *
112 * @tb_start:
113 * Emit any code required before the start of the main loop,
114 * after the generic gen_tb_start().
115 *
116 * @insn_start:
117 * Emit the tcg_gen_insn_start opcode.
118 *
119 * @translate_insn:
120 * Disassemble one instruction and set db->pc_next for the start
121 * of the following instruction. Set db->is_jmp as necessary to
122 * terminate the main loop.
123 *
124 * @tb_stop:
125 * Emit any opcodes required to exit the TB, based on db->is_jmp.
126 *
127 * @disas_log:
128 * Print instruction disassembly to log.
129 */
130 typedef struct TranslatorOps {
131 void (*init_disas_context)(DisasContextBase *db, CPUState *cpu);
132 void (*tb_start)(DisasContextBase *db, CPUState *cpu);
133 void (*insn_start)(DisasContextBase *db, CPUState *cpu);
134 void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
135 void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
136 bool (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f);
137 } TranslatorOps;
138
139 /**
140 * translator_loop:
141 * @cpu: Target vCPU.
142 * @tb: Translation block.
143 * @max_insns: Maximum number of insns to translate.
144 * @pc: guest virtual program counter address
145 * @host_pc: host physical program counter address
146 * @ops: Target-specific operations.
147 * @db: Disassembly context.
148 *
149 * Generic translator loop.
150 *
151 * Translation will stop in the following cases (in order):
152 * - When is_jmp set by #TranslatorOps::breakpoint_check.
153 * - set to DISAS_TOO_MANY exits after translating one more insn
154 * - set to any other value than DISAS_NEXT exits immediately.
155 * - When is_jmp set by #TranslatorOps::translate_insn.
156 * - set to any value other than DISAS_NEXT exits immediately.
157 * - When the TCG operation buffer is full.
158 * - When single-stepping is enabled (system-wide or on the current vCPU).
159 * - When too many instructions have been translated.
160 */
161 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
162 vaddr pc, void *host_pc, const TranslatorOps *ops,
163 DisasContextBase *db);
164
165 /**
166 * translator_use_goto_tb
167 * @db: Disassembly context
168 * @dest: target pc of the goto
169 *
170 * Return true if goto_tb is allowed between the current TB
171 * and the destination PC.
172 */
173 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest);
174
175 /**
176 * translator_io_start
177 * @db: Disassembly context
178 *
179 * If icount is enabled, set cpu->can_do_io, adjust db->is_jmp to
180 * DISAS_TOO_MANY if it is still DISAS_NEXT, and return true.
181 * Otherwise return false.
182 */
183 bool translator_io_start(DisasContextBase *db);
184
185 /*
186 * Translator Load Functions
187 *
188 * These are intended to replace the direct usage of the cpu_ld*_code
189 * functions and are mandatory for front-ends that have been migrated
190 * to the common translator_loop. These functions are only intended
191 * to be called from the translation stage and should not be called
192 * from helper functions. Those functions should be converted to encode
193 * the relevant information at translation time.
194 */
195
196 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc);
197 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc);
198 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc);
199 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc);
200
201 static inline uint16_t
translator_lduw_swap(CPUArchState * env,DisasContextBase * db,vaddr pc,bool do_swap)202 translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
203 vaddr pc, bool do_swap)
204 {
205 uint16_t ret = translator_lduw(env, db, pc);
206 if (do_swap) {
207 ret = bswap16(ret);
208 }
209 return ret;
210 }
211
212 static inline uint32_t
translator_ldl_swap(CPUArchState * env,DisasContextBase * db,vaddr pc,bool do_swap)213 translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
214 vaddr pc, bool do_swap)
215 {
216 uint32_t ret = translator_ldl(env, db, pc);
217 if (do_swap) {
218 ret = bswap32(ret);
219 }
220 return ret;
221 }
222
223 static inline uint64_t
translator_ldq_swap(CPUArchState * env,DisasContextBase * db,vaddr pc,bool do_swap)224 translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
225 vaddr pc, bool do_swap)
226 {
227 uint64_t ret = translator_ldq(env, db, pc);
228 if (do_swap) {
229 ret = bswap64(ret);
230 }
231 return ret;
232 }
233
234 /**
235 * translator_fake_ld - fake instruction load
236 * @db: Disassembly context
237 * @data: bytes of instruction
238 * @len: number of bytes
239 *
240 * This is a special case helper used where the instruction we are
241 * about to translate comes from somewhere else (e.g. being
242 * re-synthesised for s390x "ex"). It ensures we update other areas of
243 * the translator with details of the executed instruction.
244 */
245 void translator_fake_ld(DisasContextBase *db, const void *data, size_t len);
246
247 /**
248 * translator_st
249 * @db: disassembly context
250 * @dest: address to copy into
251 * @addr: virtual address within TB
252 * @len: length
253 *
254 * Copy @len bytes from @addr into @dest.
255 * All bytes must have been read during translation.
256 * Return true on success or false on failure.
257 */
258 bool translator_st(const DisasContextBase *db, void *dest,
259 vaddr addr, size_t len);
260
261 /**
262 * translator_st_len
263 * @db: disassembly context
264 *
265 * Return the number of bytes available to copy from the
266 * current translation block with translator_st.
267 */
268 size_t translator_st_len(const DisasContextBase *db);
269
270 #ifdef COMPILING_PER_TARGET
271 /*
272 * Return whether addr is on the same page as where disassembly started.
273 * Translators can use this to enforce the rule that only single-insn
274 * translation blocks are allowed to cross page boundaries.
275 */
is_same_page(const DisasContextBase * db,vaddr addr)276 static inline bool is_same_page(const DisasContextBase *db, vaddr addr)
277 {
278 return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0;
279 }
280 #endif
281
282 #endif /* EXEC__TRANSLATOR_H */
283