1 // 2 // dsp.h 3 // 4 5 #ifndef __DSP_H__ 6 #define __DSP_H__ 7 8 #include <boolean.h> 9 10 #include "vjag_memory.h" 11 12 #ifdef __cplusplus 13 extern "C" { 14 #endif 15 16 #define DSP_CONTROL_RAM_BASE 0x00F1A100 17 #define DSP_WORK_RAM_BASE 0x00F1B000 18 19 void DSPInit(void); 20 void DSPReset(void); 21 void DSPExec(int32_t); 22 void DSPDone(void); 23 void DSPUpdateRegisterBanks(void); 24 void DSPHandleIRQs(void); 25 void DSPSetIRQLine(int irqline, int state); 26 uint8_t DSPReadByte(uint32_t offset, uint32_t who); 27 uint16_t DSPReadWord(uint32_t offset, uint32_t who); 28 uint32_t DSPReadLong(uint32_t offset, uint32_t who); 29 void DSPWriteByte(uint32_t offset, uint8_t data, uint32_t who); 30 void DSPWriteWord(uint32_t offset, uint16_t data, uint32_t who); 31 void DSPWriteLong(uint32_t offset, uint32_t data, uint32_t who); 32 void DSPReleaseTimeslice(void); 33 bool DSPIsRunning(void); 34 35 void DSPExecP(int32_t cycles); 36 void DSPExecP2(int32_t cycles); 37 void DSPExecComp(int32_t cycles); 38 39 // Exported vars 40 41 extern uint32_t dsp_reg_bank_0[], dsp_reg_bank_1[]; 42 43 // DSP interrupt numbers (in $F1A100, bits 4-8 & 16) 44 45 enum { DSPIRQ_CPU = 0, DSPIRQ_SSI, DSPIRQ_TIMER0, DSPIRQ_TIMER1, DSPIRQ_EXT0, DSPIRQ_EXT1 }; 46 47 #ifdef __cplusplus 48 } 49 #endif 50 51 #endif // __DSP_H__ 52