1 /*
2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu/datadir.h"
26 #include "qemu/guest-random.h"
27 #include "sysemu/sysemu.h"
28 #include "cpu.h"
29 #include "hw/boards.h"
30 #include "hw/or-irq.h"
31 #include "elf.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "hw/char/escc.h"
35 #include "hw/sysbus.h"
36 #include "hw/scsi/esp.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
39 #include "bootinfo.h"
40 #include "hw/m68k/q800.h"
41 #include "hw/m68k/q800-glue.h"
42 #include "hw/misc/mac_via.h"
43 #include "hw/misc/djmemc.h"
44 #include "hw/misc/iosb.h"
45 #include "hw/input/adb.h"
46 #include "hw/audio/asc.h"
47 #include "hw/nubus/mac-nubus-bridge.h"
48 #include "hw/display/macfb.h"
49 #include "hw/block/swim.h"
50 #include "net/net.h"
51 #include "net/util.h"
52 #include "qapi/error.h"
53 #include "qemu/error-report.h"
54 #include "sysemu/qtest.h"
55 #include "sysemu/runstate.h"
56 #include "sysemu/reset.h"
57 #include "migration/vmstate.h"
58
59 #define MACROM_ADDR 0x40800000
60 #define MACROM_SIZE 0x00100000
61
62 #define MACROM_FILENAME "MacROM.bin"
63
64 #define IO_BASE 0x50000000
65 #define IO_SLICE 0x00040000
66 #define IO_SLICE_MASK (IO_SLICE - 1)
67 #define IO_SIZE 0x04000000
68
69 #define VIA_BASE (IO_BASE + 0x00000)
70 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
71 #define SONIC_BASE (IO_BASE + 0x0a000)
72 #define SCC_BASE (IO_BASE + 0x0c020)
73 #define DJMEMC_BASE (IO_BASE + 0x0e000)
74 #define ESP_BASE (IO_BASE + 0x10000)
75 #define ESP_PDMA (IO_BASE + 0x10100)
76 #define ASC_BASE (IO_BASE + 0x14000)
77 #define IOSB_BASE (IO_BASE + 0x18000)
78 #define SWIM_BASE (IO_BASE + 0x1E000)
79
80 #define SONIC_PROM_SIZE 0x1000
81
82 /*
83 * the video base, whereas it a Nubus address,
84 * is needed by the kernel to have early display and
85 * thus provided by the bootloader
86 */
87 #define VIDEO_BASE 0xf9000000
88
89 #define MAC_CLOCK 3686418
90
91 /* Size of whole RAM area */
92 #define RAM_SIZE 0x40000000
93
94 /*
95 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
96 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800
97 */
98 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
99 BIT(0xe))
100
101 /* Quadra 800 machine ID */
102 #define Q800_MACHINE_ID 0xa55a2bad
103
104
main_cpu_reset(void * opaque)105 static void main_cpu_reset(void *opaque)
106 {
107 M68kCPU *cpu = opaque;
108 CPUState *cs = CPU(cpu);
109
110 cpu_reset(cs);
111 cpu->env.aregs[7] = ldl_phys(cs->as, 0);
112 cpu->env.pc = ldl_phys(cs->as, 4);
113 }
114
rerandomize_rng_seed(void * opaque)115 static void rerandomize_rng_seed(void *opaque)
116 {
117 struct bi_record *rng_seed = opaque;
118 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
119 be16_to_cpu(*(uint16_t *)rng_seed->data));
120 }
121
122 static uint8_t fake_mac_rom[] = {
123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
124
125 /* offset: 0xa - mac_reset */
126
127 /* via2[vDirB] |= VIA2B_vPower */
128 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
129 0x10, 0x10, /* moveb %a0@,%d0 */
130 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
131 0x10, 0x80, /* moveb %d0,%a0@ */
132
133 /* via2[vBufB] &= ~VIA2B_vPower */
134 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
135 0x10, 0x10, /* moveb %a0@,%d0 */
136 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
137 0x10, 0x80, /* moveb %d0,%a0@ */
138
139 /* while (true) ; */
140 0x60, 0xFE /* bras [self] */
141 };
142
macio_alias_read(void * opaque,hwaddr addr,uint64_t * data,unsigned size,MemTxAttrs attrs)143 static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data,
144 unsigned size, MemTxAttrs attrs)
145 {
146 MemTxResult r;
147 uint32_t val;
148
149 addr &= IO_SLICE_MASK;
150 addr |= IO_BASE;
151
152 switch (size) {
153 case 4:
154 val = address_space_ldl_be(&address_space_memory, addr, attrs, &r);
155 break;
156 case 2:
157 val = address_space_lduw_be(&address_space_memory, addr, attrs, &r);
158 break;
159 case 1:
160 val = address_space_ldub(&address_space_memory, addr, attrs, &r);
161 break;
162 default:
163 g_assert_not_reached();
164 }
165
166 *data = val;
167 return r;
168 }
169
macio_alias_write(void * opaque,hwaddr addr,uint64_t value,unsigned size,MemTxAttrs attrs)170 static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value,
171 unsigned size, MemTxAttrs attrs)
172 {
173 MemTxResult r;
174
175 addr &= IO_SLICE_MASK;
176 addr |= IO_BASE;
177
178 switch (size) {
179 case 4:
180 address_space_stl_be(&address_space_memory, addr, value, attrs, &r);
181 break;
182 case 2:
183 address_space_stw_be(&address_space_memory, addr, value, attrs, &r);
184 break;
185 case 1:
186 address_space_stb(&address_space_memory, addr, value, attrs, &r);
187 break;
188 default:
189 g_assert_not_reached();
190 }
191
192 return r;
193 }
194
195 static const MemoryRegionOps macio_alias_ops = {
196 .read_with_attrs = macio_alias_read,
197 .write_with_attrs = macio_alias_write,
198 .endianness = DEVICE_BIG_ENDIAN,
199 .valid = {
200 .min_access_size = 1,
201 .max_access_size = 4,
202 },
203 };
204
machine_id_read(void * opaque,hwaddr addr,unsigned size)205 static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size)
206 {
207 return Q800_MACHINE_ID;
208 }
209
machine_id_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)210 static void machine_id_write(void *opaque, hwaddr addr, uint64_t val,
211 unsigned size)
212 {
213 return;
214 }
215
216 static const MemoryRegionOps machine_id_ops = {
217 .read = machine_id_read,
218 .write = machine_id_write,
219 .endianness = DEVICE_BIG_ENDIAN,
220 .valid = {
221 .min_access_size = 4,
222 .max_access_size = 4,
223 },
224 };
225
ramio_read(void * opaque,hwaddr addr,unsigned size)226 static uint64_t ramio_read(void *opaque, hwaddr addr, unsigned size)
227 {
228 return 0x0;
229 }
230
ramio_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)231 static void ramio_write(void *opaque, hwaddr addr, uint64_t val,
232 unsigned size)
233 {
234 return;
235 }
236
237 static const MemoryRegionOps ramio_ops = {
238 .read = ramio_read,
239 .write = ramio_write,
240 .endianness = DEVICE_BIG_ENDIAN,
241 .valid = {
242 .min_access_size = 1,
243 .max_access_size = 4,
244 },
245 };
246
q800_machine_init(MachineState * machine)247 static void q800_machine_init(MachineState *machine)
248 {
249 Q800MachineState *m = Q800_MACHINE(machine);
250 int linux_boot;
251 int32_t kernel_size;
252 uint64_t elf_entry;
253 char *filename;
254 int bios_size;
255 ram_addr_t initrd_base;
256 int32_t initrd_size;
257 uint8_t *prom;
258 int i, checksum;
259 MacFbMode *macfb_mode;
260 ram_addr_t ram_size = machine->ram_size;
261 const char *kernel_filename = machine->kernel_filename;
262 const char *initrd_filename = machine->initrd_filename;
263 const char *kernel_cmdline = machine->kernel_cmdline;
264 const char *bios_name = machine->firmware ?: MACROM_FILENAME;
265 hwaddr parameters_base;
266 CPUState *cs;
267 DeviceState *dev;
268 SysBusESPState *sysbus_esp;
269 ESPState *esp;
270 SysBusDevice *sysbus;
271 BusState *adb_bus;
272 NubusBus *nubus;
273 DriveInfo *dinfo;
274 NICInfo *nd;
275 MACAddr mac;
276 uint8_t rng_seed[32];
277
278 linux_boot = (kernel_filename != NULL);
279
280 if (ram_size > 1 * GiB) {
281 error_report("Too much memory for this machine: %" PRId64 " MiB, "
282 "maximum 1024 MiB", ram_size / MiB);
283 exit(1);
284 }
285
286 /* init CPUs */
287 object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type);
288 qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal);
289 qemu_register_reset(main_cpu_reset, &m->cpu);
290
291 /* RAM */
292 memory_region_init_io(&m->ramio, OBJECT(machine), &ramio_ops, &m->ramio,
293 "ram", RAM_SIZE);
294 memory_region_add_subregion(get_system_memory(), 0x0, &m->ramio);
295
296 memory_region_add_subregion(&m->ramio, 0, machine->ram);
297
298 /*
299 * Create container for all IO devices
300 */
301 memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE);
302 memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio);
303
304 /*
305 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
306 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
307 */
308 memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops,
309 &m->macio, "mac-io.alias", IO_SIZE - IO_SLICE);
310 memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE,
311 &m->macio_alias);
312
313 memory_region_init_io(&m->machine_id, NULL, &machine_id_ops, NULL,
314 "Machine ID", 4);
315 memory_region_add_subregion(get_system_memory(), 0x5ffffffc,
316 &m->machine_id);
317
318 /* IRQ Glue */
319 object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE);
320 object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu),
321 &error_abort);
322 sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal);
323
324 /* djMEMC memory controller */
325 object_initialize_child(OBJECT(machine), "djmemc", &m->djmemc,
326 TYPE_DJMEMC);
327 sysbus = SYS_BUS_DEVICE(&m->djmemc);
328 sysbus_realize_and_unref(sysbus, &error_fatal);
329 memory_region_add_subregion(&m->macio, DJMEMC_BASE - IO_BASE,
330 sysbus_mmio_get_region(sysbus, 0));
331
332 /* IOSB subsystem */
333 object_initialize_child(OBJECT(machine), "iosb", &m->iosb, TYPE_IOSB);
334 sysbus = SYS_BUS_DEVICE(&m->iosb);
335 sysbus_realize_and_unref(sysbus, &error_fatal);
336 memory_region_add_subregion(&m->macio, IOSB_BASE - IO_BASE,
337 sysbus_mmio_get_region(sysbus, 0));
338
339 /* VIA 1 */
340 object_initialize_child(OBJECT(machine), "via1", &m->via1,
341 TYPE_MOS6522_Q800_VIA1);
342 dinfo = drive_get(IF_MTD, 0, 0);
343 if (dinfo) {
344 qdev_prop_set_drive(DEVICE(&m->via1), "drive",
345 blk_by_legacy_dinfo(dinfo));
346 }
347 sysbus = SYS_BUS_DEVICE(&m->via1);
348 sysbus_realize(sysbus, &error_fatal);
349 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE,
350 sysbus_mmio_get_region(sysbus, 1));
351 sysbus_connect_irq(sysbus, 0,
352 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1));
353 /* A/UX mode */
354 qdev_connect_gpio_out(DEVICE(&m->via1), 0,
355 qdev_get_gpio_in_named(DEVICE(&m->glue),
356 "auxmode", 0));
357
358 adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0");
359 dev = qdev_new(TYPE_ADB_KEYBOARD);
360 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
361 dev = qdev_new(TYPE_ADB_MOUSE);
362 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
363
364 /* VIA 2 */
365 object_initialize_child(OBJECT(machine), "via2", &m->via2,
366 TYPE_MOS6522_Q800_VIA2);
367 sysbus = SYS_BUS_DEVICE(&m->via2);
368 sysbus_realize(sysbus, &error_fatal);
369 memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE,
370 sysbus_mmio_get_region(sysbus, 1));
371 sysbus_connect_irq(sysbus, 0,
372 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2));
373
374 /* MACSONIC */
375
376 /*
377 * MacSonic driver needs an Apple MAC address
378 * Valid prefix are:
379 * 00:05:02 Apple
380 * 00:80:19 Dayna Communications, Inc.
381 * 00:A0:40 Apple
382 * 08:00:07 Apple
383 * (Q800 use the last one)
384 */
385 object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x,
386 TYPE_DP8393X);
387 dev = DEVICE(&m->dp8393x);
388 nd = qemu_find_nic_info(TYPE_DP8393X, true, "dp83932");
389 if (nd) {
390 qdev_set_nic_properties(dev, nd);
391 memcpy(mac.a, nd->macaddr.a, sizeof(mac.a));
392 } else {
393 qemu_macaddr_default_if_unset(&mac);
394 }
395 mac.a[0] = 0x08;
396 mac.a[1] = 0x00;
397 mac.a[2] = 0x07;
398 qdev_prop_set_macaddr(dev, "mac", mac.a);
399
400 qdev_prop_set_uint8(dev, "it_shift", 2);
401 qdev_prop_set_bit(dev, "big_endian", true);
402 object_property_set_link(OBJECT(dev), "dma_mr",
403 OBJECT(get_system_memory()), &error_abort);
404 sysbus = SYS_BUS_DEVICE(dev);
405 sysbus_realize(sysbus, &error_fatal);
406 memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE,
407 sysbus_mmio_get_region(sysbus, 0));
408 sysbus_connect_irq(sysbus, 0,
409 qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC));
410
411 memory_region_init_rom(&m->dp8393x_prom, NULL, "dp8393x-q800.prom",
412 SONIC_PROM_SIZE, &error_fatal);
413 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE,
414 &m->dp8393x_prom);
415
416 /* Add MAC address with valid checksum to PROM */
417 prom = memory_region_get_ram_ptr(&m->dp8393x_prom);
418 checksum = 0;
419 for (i = 0; i < 6; i++) {
420 prom[i] = revbit8(mac.a[i]);
421 checksum ^= prom[i];
422 }
423 prom[7] = 0xff - checksum;
424
425 /* SCC */
426
427 object_initialize_child(OBJECT(machine), "escc", &m->escc,
428 TYPE_ESCC);
429 dev = DEVICE(&m->escc);
430 qdev_prop_set_uint32(dev, "disabled", 0);
431 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
432 qdev_prop_set_uint32(dev, "it_shift", 1);
433 qdev_prop_set_bit(dev, "bit_swap", true);
434 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
435 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
436 qdev_prop_set_uint32(dev, "chnBtype", 0);
437 qdev_prop_set_uint32(dev, "chnAtype", 0);
438 sysbus = SYS_BUS_DEVICE(dev);
439 sysbus_realize(sysbus, &error_fatal);
440
441 /* Logically OR both its IRQs together */
442 object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate,
443 TYPE_OR_IRQ);
444 object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2,
445 &error_fatal);
446 dev = DEVICE(&m->escc_orgate);
447 qdev_realize(dev, NULL, &error_fatal);
448 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0));
449 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1));
450 qdev_connect_gpio_out(dev, 0,
451 qdev_get_gpio_in(DEVICE(&m->glue),
452 GLUE_IRQ_IN_ESCC));
453 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE,
454 sysbus_mmio_get_region(sysbus, 0));
455
456 /* Create alias for NetBSD */
457 memory_region_init_alias(&m->escc_alias, OBJECT(machine), "escc-alias",
458 sysbus_mmio_get_region(sysbus, 0), 0, 0x8);
459 memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE - 0x20,
460 &m->escc_alias);
461
462 /* SCSI */
463
464 object_initialize_child(OBJECT(machine), "esp", &m->esp,
465 TYPE_SYSBUS_ESP);
466 sysbus_esp = SYSBUS_ESP(&m->esp);
467 esp = &sysbus_esp->esp;
468 esp->dma_memory_read = NULL;
469 esp->dma_memory_write = NULL;
470 esp->dma_opaque = NULL;
471 sysbus_esp->it_shift = 4;
472 esp->dma_enabled = 1;
473
474 sysbus = SYS_BUS_DEVICE(&m->esp);
475 sysbus_realize(sysbus, &error_fatal);
476 /* SCSI and SCSI data IRQs are negative edge triggered */
477 sysbus_connect_irq(sysbus, 0,
478 qemu_irq_invert(
479 qdev_get_gpio_in(DEVICE(&m->via2),
480 VIA2_IRQ_SCSI_BIT)));
481 sysbus_connect_irq(sysbus, 1,
482 qemu_irq_invert(
483 qdev_get_gpio_in(DEVICE(&m->via2),
484 VIA2_IRQ_SCSI_DATA_BIT)));
485 memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE,
486 sysbus_mmio_get_region(sysbus, 0));
487 memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE,
488 sysbus_mmio_get_region(sysbus, 1));
489
490 scsi_bus_legacy_handle_cmdline(&esp->bus);
491
492 /* Apple Sound Chip */
493
494 object_initialize_child(OBJECT(machine), "asc", &m->asc, TYPE_ASC);
495 qdev_prop_set_uint8(DEVICE(&m->asc), "asctype", m->easc ? ASC_TYPE_EASC
496 : ASC_TYPE_ASC);
497 if (machine->audiodev) {
498 qdev_prop_set_string(DEVICE(&m->asc), "audiodev", machine->audiodev);
499 }
500 sysbus = SYS_BUS_DEVICE(&m->asc);
501 sysbus_realize_and_unref(sysbus, &error_fatal);
502 memory_region_add_subregion(&m->macio, ASC_BASE - IO_BASE,
503 sysbus_mmio_get_region(sysbus, 0));
504 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(DEVICE(&m->glue),
505 GLUE_IRQ_IN_ASC));
506
507 /* Wire ASC IRQ via GLUE for use in classic mode */
508 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_ASC,
509 qdev_get_gpio_in(DEVICE(&m->via2),
510 VIA2_IRQ_ASC_BIT));
511
512 /* SWIM floppy controller */
513
514 object_initialize_child(OBJECT(machine), "swim", &m->swim,
515 TYPE_SWIM);
516 sysbus = SYS_BUS_DEVICE(&m->swim);
517 sysbus_realize(sysbus, &error_fatal);
518 memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE,
519 sysbus_mmio_get_region(sysbus, 0));
520
521 /* NuBus */
522
523 object_initialize_child(OBJECT(machine), "mac-nubus-bridge",
524 &m->mac_nubus_bridge,
525 TYPE_MAC_NUBUS_BRIDGE);
526 sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge);
527 dev = DEVICE(&m->mac_nubus_bridge);
528 qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask",
529 Q800_NUBUS_SLOTS_AVAILABLE);
530 sysbus_realize(sysbus, &error_fatal);
531 memory_region_add_subregion(get_system_memory(),
532 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE,
533 sysbus_mmio_get_region(sysbus, 0));
534 memory_region_add_subregion(get_system_memory(),
535 NUBUS_SLOT_BASE +
536 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE,
537 sysbus_mmio_get_region(sysbus, 1));
538 qdev_connect_gpio_out(dev, 9,
539 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
540 VIA2_NUBUS_IRQ_INTVIDEO));
541 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) {
542 qdev_connect_gpio_out(dev, 9 + i,
543 qdev_get_gpio_in_named(DEVICE(&m->via2),
544 "nubus-irq",
545 VIA2_NUBUS_IRQ_9 + i));
546 }
547
548 /*
549 * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
550 * IRQ via GLUE for use by SONIC Ethernet in classic mode
551 */
552 qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9,
553 qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
554 VIA2_NUBUS_IRQ_9));
555
556 nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0"));
557
558 /* framebuffer in nubus slot #9 */
559
560 object_initialize_child(OBJECT(machine), "macfb", &m->macfb,
561 TYPE_NUBUS_MACFB);
562 dev = DEVICE(&m->macfb);
563 qdev_prop_set_uint32(dev, "slot", 9);
564 qdev_prop_set_uint32(dev, "width", graphic_width);
565 qdev_prop_set_uint32(dev, "height", graphic_height);
566 qdev_prop_set_uint8(dev, "depth", graphic_depth);
567 if (graphic_width == 1152 && graphic_height == 870) {
568 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR);
569 } else {
570 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA);
571 }
572 qdev_realize(dev, BUS(nubus), &error_fatal);
573
574 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode;
575
576 cs = CPU(&m->cpu);
577 if (linux_boot) {
578 uint64_t high;
579 void *param_blob, *param_ptr, *param_rng_seed;
580
581 if (kernel_cmdline) {
582 param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
583 } else {
584 param_blob = g_malloc(1024);
585 }
586
587 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
588 &elf_entry, NULL, &high, NULL, 1,
589 EM_68K, 0, 0);
590 if (kernel_size < 0) {
591 error_report("could not load kernel '%s'", kernel_filename);
592 exit(1);
593 }
594 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
595 parameters_base = (high + 1) & ~1;
596 param_ptr = param_blob;
597
598 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC);
599 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
600 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
601 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
602 BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040);
603 BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800);
604 BOOTINFO1(param_ptr,
605 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
606 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
607 BOOTINFO1(param_ptr, BI_MAC_VADDR,
608 VIDEO_BASE + macfb_mode->offset);
609 BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth);
610 BOOTINFO1(param_ptr, BI_MAC_VDIM,
611 (graphic_height << 16) | graphic_width);
612 BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride);
613 BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE);
614
615 memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom",
616 sizeof(fake_mac_rom), fake_mac_rom);
617 memory_region_set_readonly(&m->rom, true);
618 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
619
620 if (kernel_cmdline) {
621 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
622 kernel_cmdline);
623 }
624
625 /* Pass seed to RNG. */
626 param_rng_seed = param_ptr;
627 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
628 BOOTINFODATA(param_ptr, BI_RNG_SEED,
629 rng_seed, sizeof(rng_seed));
630
631 /* load initrd */
632 if (initrd_filename) {
633 initrd_size = get_image_size(initrd_filename);
634 if (initrd_size < 0) {
635 error_report("could not load initial ram disk '%s'",
636 initrd_filename);
637 exit(1);
638 }
639
640 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
641 load_image_targphys(initrd_filename, initrd_base,
642 ram_size - initrd_base);
643 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
644 initrd_size);
645 } else {
646 initrd_base = 0;
647 initrd_size = 0;
648 }
649 BOOTINFO0(param_ptr, BI_LAST);
650 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
651 parameters_base, cs->as);
652 qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
653 rom_ptr_for_as(cs->as, parameters_base,
654 param_ptr - param_blob) +
655 (param_rng_seed - param_blob));
656 g_free(param_blob);
657 } else {
658 uint8_t *ptr;
659 /* allocate and load BIOS */
660 memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE,
661 &error_abort);
662 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
663 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
664
665 memory_region_init_alias(&m->rom_alias, NULL, "m68k_mac.rom-alias",
666 &m->rom, 0, MACROM_SIZE);
667 memory_region_add_subregion(get_system_memory(), 0x40000000,
668 &m->rom_alias);
669
670 /* Load MacROM binary */
671 if (filename) {
672 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
673 g_free(filename);
674 } else {
675 bios_size = -1;
676 }
677
678 /* Remove qtest_enabled() check once firmware files are in the tree */
679 if (!qtest_enabled()) {
680 if (bios_size <= 0 || bios_size > MACROM_SIZE) {
681 error_report("could not load MacROM '%s'", bios_name);
682 exit(1);
683 }
684
685 ptr = rom_ptr(MACROM_ADDR, bios_size);
686 assert(ptr != NULL);
687 stl_phys(cs->as, 0, ldl_be_p(ptr)); /* reset initial SP */
688 stl_phys(cs->as, 4,
689 MACROM_ADDR + ldl_be_p(ptr + 4)); /* reset initial PC */
690 }
691 }
692 }
693
q800_get_easc(Object * obj,Error ** errp)694 static bool q800_get_easc(Object *obj, Error **errp)
695 {
696 Q800MachineState *ms = Q800_MACHINE(obj);
697
698 return ms->easc;
699 }
700
q800_set_easc(Object * obj,bool value,Error ** errp)701 static void q800_set_easc(Object *obj, bool value, Error **errp)
702 {
703 Q800MachineState *ms = Q800_MACHINE(obj);
704
705 ms->easc = value;
706 }
707
q800_init(Object * obj)708 static void q800_init(Object *obj)
709 {
710 Q800MachineState *ms = Q800_MACHINE(obj);
711
712 /* Default to EASC */
713 ms->easc = true;
714 }
715
716 static GlobalProperty hw_compat_q800[] = {
717 { "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" },
718 { "scsi-hd", "vendor", " SEAGATE" },
719 { "scsi-hd", "product", " ST225N" },
720 { "scsi-hd", "ver", "1.0 " },
721 { "scsi-cd", "quirk_mode_page_apple_vendor", "on" },
722 { "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" },
723 { "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" },
724 { "scsi-cd", "quirk_mode_page_truncated", "on" },
725 { "scsi-cd", "vendor", "MATSHITA" },
726 { "scsi-cd", "product", "CD-ROM CR-8005" },
727 { "scsi-cd", "ver", "1.0k" },
728 };
729 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
730
q800_machine_class_init(ObjectClass * oc,void * data)731 static void q800_machine_class_init(ObjectClass *oc, void *data)
732 {
733 static const char * const valid_cpu_types[] = {
734 M68K_CPU_TYPE_NAME("m68040"),
735 NULL
736 };
737 MachineClass *mc = MACHINE_CLASS(oc);
738
739 mc->desc = "Macintosh Quadra 800";
740 mc->init = q800_machine_init;
741 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
742 mc->valid_cpu_types = valid_cpu_types;
743 mc->max_cpus = 1;
744 mc->block_default_type = IF_SCSI;
745 mc->default_ram_id = "m68k_mac.ram";
746 machine_add_audiodev_property(mc);
747 compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len);
748
749 object_class_property_add_bool(oc, "easc", q800_get_easc, q800_set_easc);
750 object_class_property_set_description(oc, "easc",
751 "Set to off to use ASC rather than EASC");
752 }
753
754 static const TypeInfo q800_machine_typeinfo = {
755 .name = MACHINE_TYPE_NAME("q800"),
756 .parent = TYPE_MACHINE,
757 .instance_init = q800_init,
758 .instance_size = sizeof(Q800MachineState),
759 .class_init = q800_machine_class_init,
760 };
761
q800_machine_register_types(void)762 static void q800_machine_register_types(void)
763 {
764 type_register_static(&q800_machine_typeinfo);
765 }
766
767 type_init(q800_machine_register_types)
768