| /dports/misc/glow/glow-f24d960e3cc80db95ac0bc17b1900dbf60ca044a/thirdparty/fp16/ |
| H A D | README.md | 1 # FP16 chapter
|
| /dports/devel/fp16/FP16-4dfe081cf6bcd15db339cf2680b9281b8451eeb3/ |
| H A D | README.md | 1 # FP16 chapter
|
| /dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/tests/gtests/ |
| H A D | test_gemm_f16.cpp | 30 #define FP16 macro
|
| /dports/math/onednn/oneDNN-2.5.1/tests/gtests/ |
| H A D | test_gemm_f16.cpp | 30 #define FP16 macro
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| /dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Common/Math/ |
| H A D | math_util.h | 90 struct FP16 { struct
91 uint16_t u;
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| /dports/emulators/ppsspp/ppsspp-1.12.3/Common/Math/ |
| H A D | math_util.h | 90 struct FP16 { struct
91 uint16_t u;
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| /dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Common/Math/ |
| H A D | math_util.h | 90 struct FP16 { struct
91 uint16_t u;
|
| /dports/misc/glow/glow-f24d960e3cc80db95ac0bc17b1900dbf60ca044a/include/glow/Optimizer/GraphOptimizer/ |
| H A D | CompilationContext.h | 49 FP16, /// FP16 format for float16 should be used. enumerator
|
| /dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/common/ |
| H A D | Types.hpp | 38 BF16, FP16 enumerator
|
| /dports/misc/glow/glow-f24d960e3cc80db95ac0bc17b1900dbf60ca044a/tests/stress/ |
| H A D | ParameterSweepTest.cpp | 424 bool fused, bool FP16, bool accumFP16) { in createAndInitSLWSNet()
504 bool rowwiseQuantize, bool fused, bool FP16, in testParamSweepSLWS()
|
| /dports/lang/erlang-runtime24/otp-OTP-24.1.7/erts/emulator/test/ |
| H A D | bs_construct_SUITE.erl | 946 -define(FP16(EncodedInt, Float), macro
|
| H A D | bs_match_misc_SUITE.erl | 580 -define(FP16(EncodedInt, Float), macro
|
| /dports/lang/erlang-wx/otp-OTP-24.1.7/erts/emulator/test/ |
| H A D | bs_construct_SUITE.erl | 946 -define(FP16(EncodedInt, Float), macro
|
| H A D | bs_match_misc_SUITE.erl | 580 -define(FP16(EncodedInt, Float), macro
|
| /dports/lang/erlang-java/otp-OTP-24.1.7/erts/emulator/test/ |
| H A D | bs_construct_SUITE.erl | 946 -define(FP16(EncodedInt, Float), macro
|
| H A D | bs_match_misc_SUITE.erl | 580 -define(FP16(EncodedInt, Float), macro
|
| /dports/lang/erlang/otp-OTP-24.1.7/erts/emulator/test/ |
| H A D | bs_construct_SUITE.erl | 946 -define(FP16(EncodedInt, Float), macro
|
| H A D | bs_match_misc_SUITE.erl | 580 -define(FP16(EncodedInt, Float), macro
|
| /dports/misc/mnn/MNN-1.2.0/codegen/cpu/ |
| H A D | CPUAst.hpp | 128 FP16, enumerator
|
| /dports/math/libxsmm/libxsmm-1.16.3/samples/deeplearning/gxm/proto/ |
| H A D | gxm.proto | 26 FP16 = 3; enumerator
|
| /dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/visa/include/ |
| H A D | visa_igc_common_header.h | 647 FP16 = 10, // half (1, 5, 10) enumerator
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/angle/third_party/VK-GL-CTS/src/external/vulkancts/modules/vulkan/spirv_assembly/ |
| H A D | vktSpvAsmFloatControlsTests.cpp | 54 FP16 = 0, enumerator
|
| /dports/devel/level-zero/level-zero-1.7.4/include/ |
| H A D | ze.py | 534 …FP16 = ZE_BIT(0) ## Device supports 16-bit floating-point operations variable in ze_device_module_flags_v
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 907 bool FP16) { in IsAddressingMode5()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 903 int Lwb, int Upb, bool FP16) { in IsAddressingMode5()
|