1 /** @file
2 
3   Copyright (c) 2020 Jared McNeill. All rights reserved.
4   Copyright (c) 2020 Andrey Warkentin <andrey.warkentin@gmail.com>
5 
6   SPDX-License-Identifier: BSD-2-Clause-Patent
7 
8 **/
9 
10 #ifndef GENERICPHY_H__
11 #define GENERICPHY_H__
12 
13 //
14 // Basic Control Register
15 //
16 #define GENERIC_PHY_BMCR                0x00
17 #define  GENERIC_PHY_BMCR_RESET         BIT15
18 #define  GENERIC_PHY_BMCR_ANE           BIT12
19 #define  GENERIC_PHY_BMCR_RESTART_AN    BIT9
20 
21 //
22 // Basic Status Register
23 //
24 #define GENERIC_PHY_BMSR                0x01
25 #define  GENERIC_PHY_BMSR_ANEG_COMPLETE BIT5
26 #define  GENERIC_PHY_BMSR_LINK_STATUS   BIT2
27 
28 //
29 // PHY Identifier I & II
30 //
31 #define GENERIC_PHY_PHYIDR1             0x02
32 #define GENERIC_PHY_PHYIDR2             0x03
33 
34 //
35 // Auto-Negotiation Advertisement Register
36 //
37 #define GENERIC_PHY_ANAR                0x04
38 #define  GENERIC_PHY_ANAR_100BASETX_FDX BIT8
39 #define  GENERIC_PHY_ANAR_100BASETX     BIT7
40 #define  GENERIC_PHY_ANAR_10BASET_FDX   BIT6
41 #define  GENERIC_PHY_ANAR_10BASET       BIT5
42 
43 //
44 // Auto-Negotiation Link Partner Ability Register
45 //
46 #define GENERIC_PHY_ANLPAR              0x05
47 
48 //
49 // 1000Base-T Control Register
50 //
51 #define GENERIC_PHY_GBCR                0x09
52 #define  GENERIC_PHY_GBCR_1000BASET_FDX BIT9
53 #define  GENERIC_PHY_GBCR_1000BASET     BIT8
54 
55 //
56 // 1000Base-T Status Register
57 //
58 #define GENERIC_PHY_GBSR                0x0A
59 
60 typedef enum {
61   PHY_SPEED_NONE  = 0,
62   PHY_SPEED_10    = 10,
63   PHY_SPEED_100   = 100,
64   PHY_SPEED_1000  = 1000
65 } GENERIC_PHY_SPEED;
66 
67 typedef enum {
68   PHY_DUPLEX_HALF,
69   PHY_DUPLEX_FULL
70 } GENERIC_PHY_DUPLEX;
71 
72 typedef
73 EFI_STATUS
74 (EFIAPI *GENERIC_PHY_READ) (
75   IN VOID                     *Priv,
76   IN UINT8                    PhyAddr,
77   IN UINT8                    Reg,
78   OUT UINT16 *                Data
79   );
80 
81 typedef
82 EFI_STATUS
83 (EFIAPI *GENERIC_PHY_WRITE) (
84   IN VOID                     *Priv,
85   IN UINT8                    PhyAddr,
86   IN UINT8                    Reg,
87   IN UINT16                   Data
88   );
89 
90 typedef
91 EFI_STATUS
92 (EFIAPI *GENERIC_PHY_RESET_ACTION) (
93   IN VOID                     *Priv
94   );
95 
96 typedef
97 VOID
98 (EFIAPI *GENERIC_PHY_CONFIGURE) (
99   IN VOID                     *Priv,
100   IN GENERIC_PHY_SPEED        Speed,
101   IN GENERIC_PHY_DUPLEX       Duplex
102   );
103 
104 typedef struct {
105   GENERIC_PHY_READ            Read;
106   GENERIC_PHY_WRITE           Write;
107   GENERIC_PHY_RESET_ACTION    ResetAction;
108   GENERIC_PHY_CONFIGURE       Configure;
109   VOID                        *PrivateData;
110 
111   UINT8                       PhyAddr;
112   BOOLEAN                     LinkUp;
113 } GENERIC_PHY_PRIVATE_DATA;
114 
115 EFI_STATUS
116 EFIAPI
117 GenericPhyInit (
118   IN GENERIC_PHY_PRIVATE_DATA *Phy
119   );
120 
121 EFI_STATUS
122 EFIAPI
123 GenericPhyUpdateConfig (
124   IN GENERIC_PHY_PRIVATE_DATA *Phy
125   );
126 
127 EFI_STATUS
128 EFIAPI
129 GenericPhyReset (
130   IN GENERIC_PHY_PRIVATE_DATA *Phy
131   );
132 
133 #endif // GENERICPHY_H__
134