1 //===- ELFObjectFile.cpp - ELF object file implementation -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Part of the ELFObjectFile class implementation.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "llvm/Object/ELFObjectFile.h"
14 #include "llvm/BinaryFormat/ELF.h"
15 #include "llvm/MC/MCInstrAnalysis.h"
16 #include "llvm/MC/TargetRegistry.h"
17 #include "llvm/Object/ELF.h"
18 #include "llvm/Object/ELFTypes.h"
19 #include "llvm/Object/Error.h"
20 #include "llvm/Support/ARMAttributeParser.h"
21 #include "llvm/Support/ARMBuildAttributes.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/MathExtras.h"
24 #include "llvm/Support/RISCVAttributeParser.h"
25 #include "llvm/Support/RISCVAttributes.h"
26 #include "llvm/Support/RISCVISAInfo.h"
27 #include "llvm/TargetParser/SubtargetFeature.h"
28 #include "llvm/TargetParser/Triple.h"
29 #include <algorithm>
30 #include <cstddef>
31 #include <cstdint>
32 #include <memory>
33 #include <optional>
34 #include <string>
35 #include <utility>
36
37 using namespace llvm;
38 using namespace object;
39
40 const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = {
41 {"None", "NOTYPE", ELF::STT_NOTYPE},
42 {"Object", "OBJECT", ELF::STT_OBJECT},
43 {"Function", "FUNC", ELF::STT_FUNC},
44 {"Section", "SECTION", ELF::STT_SECTION},
45 {"File", "FILE", ELF::STT_FILE},
46 {"Common", "COMMON", ELF::STT_COMMON},
47 {"TLS", "TLS", ELF::STT_TLS},
48 {"Unknown", "<unknown>: 7", 7},
49 {"Unknown", "<unknown>: 8", 8},
50 {"Unknown", "<unknown>: 9", 9},
51 {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC},
52 {"OS Specific", "<OS specific>: 11", 11},
53 {"OS Specific", "<OS specific>: 12", 12},
54 {"Proc Specific", "<processor specific>: 13", 13},
55 {"Proc Specific", "<processor specific>: 14", 14},
56 {"Proc Specific", "<processor specific>: 15", 15}
57 };
58
ELFObjectFileBase(unsigned int Type,MemoryBufferRef Source)59 ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source)
60 : ObjectFile(Type, Source) {}
61
62 template <class ELFT>
63 static Expected<std::unique_ptr<ELFObjectFile<ELFT>>>
createPtr(MemoryBufferRef Object,bool InitContent)64 createPtr(MemoryBufferRef Object, bool InitContent) {
65 auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent);
66 if (Error E = Ret.takeError())
67 return std::move(E);
68 return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret));
69 }
70
71 Expected<std::unique_ptr<ObjectFile>>
createELFObjectFile(MemoryBufferRef Obj,bool InitContent)72 ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) {
73 std::pair<unsigned char, unsigned char> Ident =
74 getElfArchType(Obj.getBuffer());
75 std::size_t MaxAlignment =
76 1ULL << llvm::countr_zero(
77 reinterpret_cast<uintptr_t>(Obj.getBufferStart()));
78
79 if (MaxAlignment < 2)
80 return createError("Insufficient alignment");
81
82 if (Ident.first == ELF::ELFCLASS32) {
83 if (Ident.second == ELF::ELFDATA2LSB)
84 return createPtr<ELF32LE>(Obj, InitContent);
85 else if (Ident.second == ELF::ELFDATA2MSB)
86 return createPtr<ELF32BE>(Obj, InitContent);
87 else
88 return createError("Invalid ELF data");
89 } else if (Ident.first == ELF::ELFCLASS64) {
90 if (Ident.second == ELF::ELFDATA2LSB)
91 return createPtr<ELF64LE>(Obj, InitContent);
92 else if (Ident.second == ELF::ELFDATA2MSB)
93 return createPtr<ELF64BE>(Obj, InitContent);
94 else
95 return createError("Invalid ELF data");
96 }
97 return createError("Invalid ELF class");
98 }
99
getMIPSFeatures() const100 SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const {
101 SubtargetFeatures Features;
102 unsigned PlatformFlags = getPlatformFlags();
103
104 switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
105 case ELF::EF_MIPS_ARCH_1:
106 break;
107 case ELF::EF_MIPS_ARCH_2:
108 Features.AddFeature("mips2");
109 break;
110 case ELF::EF_MIPS_ARCH_3:
111 Features.AddFeature("mips3");
112 break;
113 case ELF::EF_MIPS_ARCH_4:
114 Features.AddFeature("mips4");
115 break;
116 case ELF::EF_MIPS_ARCH_5:
117 Features.AddFeature("mips5");
118 break;
119 case ELF::EF_MIPS_ARCH_32:
120 Features.AddFeature("mips32");
121 break;
122 case ELF::EF_MIPS_ARCH_64:
123 Features.AddFeature("mips64");
124 break;
125 case ELF::EF_MIPS_ARCH_32R2:
126 Features.AddFeature("mips32r2");
127 break;
128 case ELF::EF_MIPS_ARCH_64R2:
129 Features.AddFeature("mips64r2");
130 break;
131 case ELF::EF_MIPS_ARCH_32R6:
132 Features.AddFeature("mips32r6");
133 break;
134 case ELF::EF_MIPS_ARCH_64R6:
135 Features.AddFeature("mips64r6");
136 break;
137 default:
138 llvm_unreachable("Unknown EF_MIPS_ARCH value");
139 }
140
141 switch (PlatformFlags & ELF::EF_MIPS_MACH) {
142 case ELF::EF_MIPS_MACH_NONE:
143 // No feature associated with this value.
144 break;
145 case ELF::EF_MIPS_MACH_OCTEON:
146 Features.AddFeature("cnmips");
147 break;
148 default:
149 llvm_unreachable("Unknown EF_MIPS_ARCH value");
150 }
151
152 if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
153 Features.AddFeature("mips16");
154 if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
155 Features.AddFeature("micromips");
156
157 return Features;
158 }
159
getARMFeatures() const160 SubtargetFeatures ELFObjectFileBase::getARMFeatures() const {
161 SubtargetFeatures Features;
162 ARMAttributeParser Attributes;
163 if (Error E = getBuildAttributes(Attributes)) {
164 consumeError(std::move(E));
165 return SubtargetFeatures();
166 }
167
168 // both ARMv7-M and R have to support thumb hardware div
169 bool isV7 = false;
170 std::optional<unsigned> Attr =
171 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
172 if (Attr)
173 isV7 = *Attr == ARMBuildAttrs::v7;
174
175 Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
176 if (Attr) {
177 switch (*Attr) {
178 case ARMBuildAttrs::ApplicationProfile:
179 Features.AddFeature("aclass");
180 break;
181 case ARMBuildAttrs::RealTimeProfile:
182 Features.AddFeature("rclass");
183 if (isV7)
184 Features.AddFeature("hwdiv");
185 break;
186 case ARMBuildAttrs::MicroControllerProfile:
187 Features.AddFeature("mclass");
188 if (isV7)
189 Features.AddFeature("hwdiv");
190 break;
191 }
192 }
193
194 Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use);
195 if (Attr) {
196 switch (*Attr) {
197 default:
198 break;
199 case ARMBuildAttrs::Not_Allowed:
200 Features.AddFeature("thumb", false);
201 Features.AddFeature("thumb2", false);
202 break;
203 case ARMBuildAttrs::AllowThumb32:
204 Features.AddFeature("thumb2");
205 break;
206 }
207 }
208
209 Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch);
210 if (Attr) {
211 switch (*Attr) {
212 default:
213 break;
214 case ARMBuildAttrs::Not_Allowed:
215 Features.AddFeature("vfp2sp", false);
216 Features.AddFeature("vfp3d16sp", false);
217 Features.AddFeature("vfp4d16sp", false);
218 break;
219 case ARMBuildAttrs::AllowFPv2:
220 Features.AddFeature("vfp2");
221 break;
222 case ARMBuildAttrs::AllowFPv3A:
223 case ARMBuildAttrs::AllowFPv3B:
224 Features.AddFeature("vfp3");
225 break;
226 case ARMBuildAttrs::AllowFPv4A:
227 case ARMBuildAttrs::AllowFPv4B:
228 Features.AddFeature("vfp4");
229 break;
230 }
231 }
232
233 Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch);
234 if (Attr) {
235 switch (*Attr) {
236 default:
237 break;
238 case ARMBuildAttrs::Not_Allowed:
239 Features.AddFeature("neon", false);
240 Features.AddFeature("fp16", false);
241 break;
242 case ARMBuildAttrs::AllowNeon:
243 Features.AddFeature("neon");
244 break;
245 case ARMBuildAttrs::AllowNeon2:
246 Features.AddFeature("neon");
247 Features.AddFeature("fp16");
248 break;
249 }
250 }
251
252 Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch);
253 if (Attr) {
254 switch (*Attr) {
255 default:
256 break;
257 case ARMBuildAttrs::Not_Allowed:
258 Features.AddFeature("mve", false);
259 Features.AddFeature("mve.fp", false);
260 break;
261 case ARMBuildAttrs::AllowMVEInteger:
262 Features.AddFeature("mve.fp", false);
263 Features.AddFeature("mve");
264 break;
265 case ARMBuildAttrs::AllowMVEIntegerAndFloat:
266 Features.AddFeature("mve.fp");
267 break;
268 }
269 }
270
271 Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use);
272 if (Attr) {
273 switch (*Attr) {
274 default:
275 break;
276 case ARMBuildAttrs::DisallowDIV:
277 Features.AddFeature("hwdiv", false);
278 Features.AddFeature("hwdiv-arm", false);
279 break;
280 case ARMBuildAttrs::AllowDIVExt:
281 Features.AddFeature("hwdiv");
282 Features.AddFeature("hwdiv-arm");
283 break;
284 }
285 }
286
287 return Features;
288 }
289
getRISCVFeatures() const290 Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const {
291 SubtargetFeatures Features;
292 unsigned PlatformFlags = getPlatformFlags();
293
294 if (PlatformFlags & ELF::EF_RISCV_RVC) {
295 Features.AddFeature("c");
296 }
297
298 RISCVAttributeParser Attributes;
299 if (Error E = getBuildAttributes(Attributes)) {
300 return std::move(E);
301 }
302
303 std::optional<StringRef> Attr =
304 Attributes.getAttributeString(RISCVAttrs::ARCH);
305 if (Attr) {
306 auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr);
307 if (!ParseResult)
308 return ParseResult.takeError();
309 auto &ISAInfo = *ParseResult;
310
311 if (ISAInfo->getXLen() == 32)
312 Features.AddFeature("64bit", false);
313 else if (ISAInfo->getXLen() == 64)
314 Features.AddFeature("64bit");
315 else
316 llvm_unreachable("XLEN should be 32 or 64.");
317
318 Features.addFeaturesVector(ISAInfo->toFeatures());
319 }
320
321 return Features;
322 }
323
getLoongArchFeatures() const324 SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const {
325 SubtargetFeatures Features;
326
327 switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) {
328 case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT:
329 break;
330 case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT:
331 Features.AddFeature("d");
332 // D implies F according to LoongArch ISA spec.
333 [[fallthrough]];
334 case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT:
335 Features.AddFeature("f");
336 break;
337 }
338
339 return Features;
340 }
341
getFeatures() const342 Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const {
343 switch (getEMachine()) {
344 case ELF::EM_MIPS:
345 return getMIPSFeatures();
346 case ELF::EM_ARM:
347 return getARMFeatures();
348 case ELF::EM_RISCV:
349 return getRISCVFeatures();
350 case ELF::EM_LOONGARCH:
351 return getLoongArchFeatures();
352 default:
353 return SubtargetFeatures();
354 }
355 }
356
tryGetCPUName() const357 std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const {
358 switch (getEMachine()) {
359 case ELF::EM_AMDGPU:
360 return getAMDGPUCPUName();
361 case ELF::EM_CUDA:
362 return getNVPTXCPUName();
363 case ELF::EM_PPC:
364 case ELF::EM_PPC64:
365 return StringRef("future");
366 default:
367 return std::nullopt;
368 }
369 }
370
getAMDGPUCPUName() const371 StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
372 assert(getEMachine() == ELF::EM_AMDGPU);
373 unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH;
374
375 switch (CPU) {
376 // Radeon HD 2000/3000 Series (R600).
377 case ELF::EF_AMDGPU_MACH_R600_R600:
378 return "r600";
379 case ELF::EF_AMDGPU_MACH_R600_R630:
380 return "r630";
381 case ELF::EF_AMDGPU_MACH_R600_RS880:
382 return "rs880";
383 case ELF::EF_AMDGPU_MACH_R600_RV670:
384 return "rv670";
385
386 // Radeon HD 4000 Series (R700).
387 case ELF::EF_AMDGPU_MACH_R600_RV710:
388 return "rv710";
389 case ELF::EF_AMDGPU_MACH_R600_RV730:
390 return "rv730";
391 case ELF::EF_AMDGPU_MACH_R600_RV770:
392 return "rv770";
393
394 // Radeon HD 5000 Series (Evergreen).
395 case ELF::EF_AMDGPU_MACH_R600_CEDAR:
396 return "cedar";
397 case ELF::EF_AMDGPU_MACH_R600_CYPRESS:
398 return "cypress";
399 case ELF::EF_AMDGPU_MACH_R600_JUNIPER:
400 return "juniper";
401 case ELF::EF_AMDGPU_MACH_R600_REDWOOD:
402 return "redwood";
403 case ELF::EF_AMDGPU_MACH_R600_SUMO:
404 return "sumo";
405
406 // Radeon HD 6000 Series (Northern Islands).
407 case ELF::EF_AMDGPU_MACH_R600_BARTS:
408 return "barts";
409 case ELF::EF_AMDGPU_MACH_R600_CAICOS:
410 return "caicos";
411 case ELF::EF_AMDGPU_MACH_R600_CAYMAN:
412 return "cayman";
413 case ELF::EF_AMDGPU_MACH_R600_TURKS:
414 return "turks";
415
416 // AMDGCN GFX6.
417 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600:
418 return "gfx600";
419 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601:
420 return "gfx601";
421 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602:
422 return "gfx602";
423
424 // AMDGCN GFX7.
425 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700:
426 return "gfx700";
427 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701:
428 return "gfx701";
429 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702:
430 return "gfx702";
431 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703:
432 return "gfx703";
433 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704:
434 return "gfx704";
435 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705:
436 return "gfx705";
437
438 // AMDGCN GFX8.
439 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801:
440 return "gfx801";
441 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802:
442 return "gfx802";
443 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803:
444 return "gfx803";
445 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805:
446 return "gfx805";
447 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810:
448 return "gfx810";
449
450 // AMDGCN GFX9.
451 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900:
452 return "gfx900";
453 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902:
454 return "gfx902";
455 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904:
456 return "gfx904";
457 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906:
458 return "gfx906";
459 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908:
460 return "gfx908";
461 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909:
462 return "gfx909";
463 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A:
464 return "gfx90a";
465 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C:
466 return "gfx90c";
467 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940:
468 return "gfx940";
469 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941:
470 return "gfx941";
471 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942:
472 return "gfx942";
473
474 // AMDGCN GFX10.
475 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010:
476 return "gfx1010";
477 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011:
478 return "gfx1011";
479 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012:
480 return "gfx1012";
481 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013:
482 return "gfx1013";
483 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030:
484 return "gfx1030";
485 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031:
486 return "gfx1031";
487 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032:
488 return "gfx1032";
489 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033:
490 return "gfx1033";
491 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034:
492 return "gfx1034";
493 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035:
494 return "gfx1035";
495 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036:
496 return "gfx1036";
497
498 // AMDGCN GFX11.
499 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100:
500 return "gfx1100";
501 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101:
502 return "gfx1101";
503 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102:
504 return "gfx1102";
505 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103:
506 return "gfx1103";
507 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150:
508 return "gfx1150";
509 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151:
510 return "gfx1151";
511
512 // AMDGCN GFX12.
513 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200:
514 return "gfx1200";
515 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201:
516 return "gfx1201";
517 default:
518 llvm_unreachable("Unknown EF_AMDGPU_MACH value");
519 }
520 }
521
getNVPTXCPUName() const522 StringRef ELFObjectFileBase::getNVPTXCPUName() const {
523 assert(getEMachine() == ELF::EM_CUDA);
524 unsigned SM = getPlatformFlags() & ELF::EF_CUDA_SM;
525
526 switch (SM) {
527 // Fermi architecture.
528 case ELF::EF_CUDA_SM20:
529 return "sm_20";
530 case ELF::EF_CUDA_SM21:
531 return "sm_21";
532
533 // Kepler architecture.
534 case ELF::EF_CUDA_SM30:
535 return "sm_30";
536 case ELF::EF_CUDA_SM32:
537 return "sm_32";
538 case ELF::EF_CUDA_SM35:
539 return "sm_35";
540 case ELF::EF_CUDA_SM37:
541 return "sm_37";
542
543 // Maxwell architecture.
544 case ELF::EF_CUDA_SM50:
545 return "sm_50";
546 case ELF::EF_CUDA_SM52:
547 return "sm_52";
548 case ELF::EF_CUDA_SM53:
549 return "sm_53";
550
551 // Pascal architecture.
552 case ELF::EF_CUDA_SM60:
553 return "sm_60";
554 case ELF::EF_CUDA_SM61:
555 return "sm_61";
556 case ELF::EF_CUDA_SM62:
557 return "sm_62";
558
559 // Volta architecture.
560 case ELF::EF_CUDA_SM70:
561 return "sm_70";
562 case ELF::EF_CUDA_SM72:
563 return "sm_72";
564
565 // Turing architecture.
566 case ELF::EF_CUDA_SM75:
567 return "sm_75";
568
569 // Ampere architecture.
570 case ELF::EF_CUDA_SM80:
571 return "sm_80";
572 case ELF::EF_CUDA_SM86:
573 return "sm_86";
574 case ELF::EF_CUDA_SM87:
575 return "sm_87";
576
577 // Ada architecture.
578 case ELF::EF_CUDA_SM89:
579 return "sm_89";
580
581 // Hopper architecture.
582 case ELF::EF_CUDA_SM90:
583 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_90a" : "sm_90";
584 default:
585 llvm_unreachable("Unknown EF_CUDA_SM value");
586 }
587 }
588
589 // FIXME Encode from a tablegen description or target parser.
setARMSubArch(Triple & TheTriple) const590 void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const {
591 if (TheTriple.getSubArch() != Triple::NoSubArch)
592 return;
593
594 ARMAttributeParser Attributes;
595 if (Error E = getBuildAttributes(Attributes)) {
596 // TODO Propagate Error.
597 consumeError(std::move(E));
598 return;
599 }
600
601 std::string Triple;
602 // Default to ARM, but use the triple if it's been set.
603 if (TheTriple.isThumb())
604 Triple = "thumb";
605 else
606 Triple = "arm";
607
608 std::optional<unsigned> Attr =
609 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
610 if (Attr) {
611 switch (*Attr) {
612 case ARMBuildAttrs::v4:
613 Triple += "v4";
614 break;
615 case ARMBuildAttrs::v4T:
616 Triple += "v4t";
617 break;
618 case ARMBuildAttrs::v5T:
619 Triple += "v5t";
620 break;
621 case ARMBuildAttrs::v5TE:
622 Triple += "v5te";
623 break;
624 case ARMBuildAttrs::v5TEJ:
625 Triple += "v5tej";
626 break;
627 case ARMBuildAttrs::v6:
628 Triple += "v6";
629 break;
630 case ARMBuildAttrs::v6KZ:
631 Triple += "v6kz";
632 break;
633 case ARMBuildAttrs::v6T2:
634 Triple += "v6t2";
635 break;
636 case ARMBuildAttrs::v6K:
637 Triple += "v6k";
638 break;
639 case ARMBuildAttrs::v7: {
640 std::optional<unsigned> ArchProfileAttr =
641 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
642 if (ArchProfileAttr &&
643 *ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile)
644 Triple += "v7m";
645 else
646 Triple += "v7";
647 break;
648 }
649 case ARMBuildAttrs::v6_M:
650 Triple += "v6m";
651 break;
652 case ARMBuildAttrs::v6S_M:
653 Triple += "v6sm";
654 break;
655 case ARMBuildAttrs::v7E_M:
656 Triple += "v7em";
657 break;
658 case ARMBuildAttrs::v8_A:
659 Triple += "v8a";
660 break;
661 case ARMBuildAttrs::v8_R:
662 Triple += "v8r";
663 break;
664 case ARMBuildAttrs::v8_M_Base:
665 Triple += "v8m.base";
666 break;
667 case ARMBuildAttrs::v8_M_Main:
668 Triple += "v8m.main";
669 break;
670 case ARMBuildAttrs::v8_1_M_Main:
671 Triple += "v8.1m.main";
672 break;
673 case ARMBuildAttrs::v9_A:
674 Triple += "v9a";
675 break;
676 }
677 }
678 if (!isLittleEndian())
679 Triple += "eb";
680
681 TheTriple.setArchName(Triple);
682 }
683
getPltEntries() const684 std::vector<ELFPltEntry> ELFObjectFileBase::getPltEntries() const {
685 std::string Err;
686 const auto Triple = makeTriple();
687 const auto *T = TargetRegistry::lookupTarget(Triple.str(), Err);
688 if (!T)
689 return {};
690 uint32_t JumpSlotReloc = 0, GlobDatReloc = 0;
691 switch (Triple.getArch()) {
692 case Triple::x86:
693 JumpSlotReloc = ELF::R_386_JUMP_SLOT;
694 GlobDatReloc = ELF::R_386_GLOB_DAT;
695 break;
696 case Triple::x86_64:
697 JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT;
698 GlobDatReloc = ELF::R_X86_64_GLOB_DAT;
699 break;
700 case Triple::aarch64:
701 case Triple::aarch64_be:
702 JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT;
703 break;
704 default:
705 return {};
706 }
707 std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo());
708 std::unique_ptr<const MCInstrAnalysis> MIA(
709 T->createMCInstrAnalysis(MII.get()));
710 if (!MIA)
711 return {};
712 std::vector<std::pair<uint64_t, uint64_t>> PltEntries;
713 std::optional<SectionRef> RelaPlt, RelaDyn;
714 uint64_t GotBaseVA = 0;
715 for (const SectionRef &Section : sections()) {
716 Expected<StringRef> NameOrErr = Section.getName();
717 if (!NameOrErr) {
718 consumeError(NameOrErr.takeError());
719 continue;
720 }
721 StringRef Name = *NameOrErr;
722
723 if (Name == ".rela.plt" || Name == ".rel.plt") {
724 RelaPlt = Section;
725 } else if (Name == ".rela.dyn" || Name == ".rel.dyn") {
726 RelaDyn = Section;
727 } else if (Name == ".got.plt") {
728 GotBaseVA = Section.getAddress();
729 } else if (Name == ".plt" || Name == ".plt.got") {
730 Expected<StringRef> PltContents = Section.getContents();
731 if (!PltContents) {
732 consumeError(PltContents.takeError());
733 return {};
734 }
735 llvm::append_range(
736 PltEntries,
737 MIA->findPltEntries(Section.getAddress(),
738 arrayRefFromStringRef(*PltContents), Triple));
739 }
740 }
741
742 // Build a map from GOT entry virtual address to PLT entry virtual address.
743 DenseMap<uint64_t, uint64_t> GotToPlt;
744 for (auto [Plt, GotPlt] : PltEntries) {
745 uint64_t GotPltEntry = GotPlt;
746 // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add
747 // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address.
748 // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit.
749 if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386)
750 GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA;
751 GotToPlt.insert(std::make_pair(GotPltEntry, Plt));
752 }
753
754 // Find the relocations in the dynamic relocation table that point to
755 // locations in the GOT for which we know the corresponding PLT entry.
756 std::vector<ELFPltEntry> Result;
757 auto handleRels = [&](iterator_range<relocation_iterator> Rels,
758 uint32_t RelType, StringRef PltSec) {
759 for (const auto &R : Rels) {
760 if (R.getType() != RelType)
761 continue;
762 auto PltEntryIter = GotToPlt.find(R.getOffset());
763 if (PltEntryIter != GotToPlt.end()) {
764 symbol_iterator Sym = R.getSymbol();
765 if (Sym == symbol_end())
766 Result.push_back(
767 ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second});
768 else
769 Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(),
770 PltEntryIter->second});
771 }
772 }
773 };
774
775 if (RelaPlt)
776 handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt");
777
778 // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's
779 // x86 port places the PLT entry in the .plt.got section.
780 if (RelaDyn)
781 handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got");
782
783 return Result;
784 }
785
786 template <class ELFT>
readBBAddrMapImpl(const ELFFile<ELFT> & EF,std::optional<unsigned> TextSectionIndex,std::vector<PGOAnalysisMap> * PGOAnalyses)787 Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl(
788 const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex,
789 std::vector<PGOAnalysisMap> *PGOAnalyses) {
790 using Elf_Shdr = typename ELFT::Shdr;
791 bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL;
792 std::vector<BBAddrMap> BBAddrMaps;
793 if (PGOAnalyses)
794 PGOAnalyses->clear();
795
796 const auto &Sections = cantFail(EF.sections());
797 auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> {
798 if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP &&
799 Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP_V0)
800 return false;
801 if (!TextSectionIndex)
802 return true;
803 Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link);
804 if (!TextSecOrErr)
805 return createError("unable to get the linked-to section for " +
806 describe(EF, Sec) + ": " +
807 toString(TextSecOrErr.takeError()));
808 if (*TextSectionIndex != std::distance(Sections.begin(), *TextSecOrErr))
809 return false;
810 return true;
811 };
812
813 Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr =
814 EF.getSectionAndRelocations(IsMatch);
815 if (!SectionRelocMapOrErr)
816 return SectionRelocMapOrErr.takeError();
817
818 for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) {
819 if (IsRelocatable && !RelocSec)
820 return createError("unable to get relocation section for " +
821 describe(EF, *Sec));
822 Expected<std::vector<BBAddrMap>> BBAddrMapOrErr =
823 EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses);
824 if (!BBAddrMapOrErr) {
825 if (PGOAnalyses)
826 PGOAnalyses->clear();
827 return createError("unable to read " + describe(EF, *Sec) + ": " +
828 toString(BBAddrMapOrErr.takeError()));
829 }
830 std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(),
831 std::back_inserter(BBAddrMaps));
832 }
833 if (PGOAnalyses)
834 assert(PGOAnalyses->size() == BBAddrMaps.size() &&
835 "The same number of BBAddrMaps and PGOAnalysisMaps should be "
836 "returned when PGO information is requested");
837 return BBAddrMaps;
838 }
839
840 template <class ELFT>
841 static Expected<std::vector<VersionEntry>>
readDynsymVersionsImpl(const ELFFile<ELFT> & EF,ELFObjectFileBase::elf_symbol_iterator_range Symbols)842 readDynsymVersionsImpl(const ELFFile<ELFT> &EF,
843 ELFObjectFileBase::elf_symbol_iterator_range Symbols) {
844 using Elf_Shdr = typename ELFT::Shdr;
845 const Elf_Shdr *VerSec = nullptr;
846 const Elf_Shdr *VerNeedSec = nullptr;
847 const Elf_Shdr *VerDefSec = nullptr;
848 // The user should ensure sections() can't fail here.
849 for (const Elf_Shdr &Sec : cantFail(EF.sections())) {
850 if (Sec.sh_type == ELF::SHT_GNU_versym)
851 VerSec = &Sec;
852 else if (Sec.sh_type == ELF::SHT_GNU_verdef)
853 VerDefSec = &Sec;
854 else if (Sec.sh_type == ELF::SHT_GNU_verneed)
855 VerNeedSec = &Sec;
856 }
857 if (!VerSec)
858 return std::vector<VersionEntry>();
859
860 Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr =
861 EF.loadVersionMap(VerNeedSec, VerDefSec);
862 if (!MapOrErr)
863 return MapOrErr.takeError();
864
865 std::vector<VersionEntry> Ret;
866 size_t I = 0;
867 for (const ELFSymbolRef &Sym : Symbols) {
868 ++I;
869 Expected<const typename ELFT::Versym *> VerEntryOrErr =
870 EF.template getEntry<typename ELFT::Versym>(*VerSec, I);
871 if (!VerEntryOrErr)
872 return createError("unable to read an entry with index " + Twine(I) +
873 " from " + describe(EF, *VerSec) + ": " +
874 toString(VerEntryOrErr.takeError()));
875
876 Expected<uint32_t> FlagsOrErr = Sym.getFlags();
877 if (!FlagsOrErr)
878 return createError("unable to read flags for symbol with index " +
879 Twine(I) + ": " + toString(FlagsOrErr.takeError()));
880
881 bool IsDefault;
882 Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex(
883 (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr,
884 (*FlagsOrErr) & SymbolRef::SF_Undefined);
885 if (!VerOrErr)
886 return createError("unable to get a version for entry " + Twine(I) +
887 " of " + describe(EF, *VerSec) + ": " +
888 toString(VerOrErr.takeError()));
889
890 Ret.push_back({(*VerOrErr).str(), IsDefault});
891 }
892
893 return Ret;
894 }
895
896 Expected<std::vector<VersionEntry>>
readDynsymVersions() const897 ELFObjectFileBase::readDynsymVersions() const {
898 elf_symbol_iterator_range Symbols = getDynamicSymbolIterators();
899 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
900 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
901 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
902 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
903 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
904 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
905 return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
906 Symbols);
907 }
908
readBBAddrMap(std::optional<unsigned> TextSectionIndex,std::vector<PGOAnalysisMap> * PGOAnalyses) const909 Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap(
910 std::optional<unsigned> TextSectionIndex,
911 std::vector<PGOAnalysisMap> *PGOAnalyses) const {
912 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
913 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
914 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
915 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
916 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
917 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
918 return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
919 TextSectionIndex, PGOAnalyses);
920 }
921