1 #ifndef HEXAGON_INSN_H 2 #define HEXAGON_INSN_H 3 4 enum HEX_INS { 5 HEX_INS_UNKNOWN, 6 HEX_INS_IMMEXT, 7 HEX_INS_RD___ADD__RS___S16_, 8 HEX_INS_RD___ADD__RS__RT_, 9 HEX_INS_RD___ADD__RS__RT___SAT, 10 HEX_INS_RD___AND__RS___S10_, 11 HEX_INS_RD___OR__RS___S10_, 12 HEX_INS_RD___AND__RS__RT_, 13 HEX_INS_RD___OR__RS__RT_, 14 HEX_INS_RD___XOR__RS__RT_, 15 HEX_INS_RD___AND__RT___RS_, 16 HEX_INS_RD___OR__RT___RS_, 17 HEX_INS_NOP, 18 HEX_INS_RD___SUB___S10__RS_, 19 HEX_INS_RD___SUB__RT__RS_, 20 HEX_INS_RD___SUB__RT__RS___SAT, 21 HEX_INS_RD___SXTB__RS_, 22 HEX_INS_RD___SXTH__RS_, 23 HEX_INS_RX_L____U16, 24 HEX_INS_RX_H____U16, 25 HEX_INS_RD____S16, 26 HEX_INS_RD___RS, 27 HEX_INS_RD___VADDH__RS__RT_, 28 HEX_INS_RD___VADDH__RS__RT___SAT, 29 HEX_INS_RD___VADDUH__RS__RT___SAT, 30 HEX_INS_RD___VAVGH__RS__RT_, 31 HEX_INS_RD___VAVGH__RS__RT___RND, 32 HEX_INS_RD___VNAVGH__RT__RS_, 33 HEX_INS_RD___VSUBH__RT__RS_, 34 HEX_INS_RD___VSUBH__RT__RS___SAT, 35 HEX_INS_RD___VSUBUH__RT__RS___SAT, 36 HEX_INS_RD___ZXTH__RS_, 37 HEX_INS_RDD___COMBINE__RS___S8_, 38 HEX_INS_RDD___COMBINE___S8__RS_, 39 HEX_INS_RDD___COMBINE___S8___S8_, 40 HEX_INS_RDD___COMBINE___S8___U6_, 41 HEX_INS_RD___COMBINE__RT_H__RS_H_, 42 HEX_INS_RD___COMBINE__RT_H__RS_L_, 43 HEX_INS_RD___COMBINE__RT_L__RS_H_, 44 HEX_INS_RD___COMBINE__RT_L__RS_L_, 45 HEX_INS_RDD___COMBINE__RS__RT_, 46 HEX_INS_RD___MUX__PU__RS___S8_, 47 HEX_INS_RD___MUX__PU___S8__RS_, 48 HEX_INS_RD___MUX__PU___S8___S8_, 49 HEX_INS_RD___MUX__PU__RS__RT_, 50 HEX_INS_RD___ASLH__RS_, 51 HEX_INS_RD___ASRH__RS_, 52 HEX_INS_RDD___PACKHL__RS__RT_, 53 HEX_INS_IF__PU__RD___ADD__RS___S8_, 54 HEX_INS_IF__PU_NEW__RD___ADD__RS___S8_, 55 HEX_INS_IF__NOT_PU_RD___ADD__RS___S8_, 56 HEX_INS_IF__NOT_PU_NEW_RD___ADD__RS___S8_, 57 HEX_INS_IF__PU__RD___ADD__RS__RT_, 58 HEX_INS_IF__NOT_PU_RD___ADD__RS__RT_, 59 HEX_INS_IF__PU_NEW__RD___ADD__RS__RT_, 60 HEX_INS_IF__NOT_PU_NEW_RD___ADD__RS__RT_, 61 HEX_INS_IF__PU__RD___ASLH__RS_, 62 HEX_INS_IF__PU_NEW__RD___ASLH__RS_, 63 HEX_INS_IF__NOT_PU_RD___ASLH__RS_, 64 HEX_INS_IF__NOT_PU_NEW_RD___ASLH__RS_, 65 HEX_INS_IF__PU__RD___ASRH__RS_, 66 HEX_INS_IF__PU_NEW__RD___ASRH__RS_, 67 HEX_INS_IF__NOT_PU_RD___ASRH__RS_, 68 HEX_INS_IF__NOT_PU_NEW_RD___ASRH__RS_, 69 HEX_INS_IF__PU__RDD___COMBINE__RS__RT_, 70 HEX_INS_IF__NOT_PU_RDD___COMBINE__RS__RT_, 71 HEX_INS_IF__PU_NEW__RDD___COMBINE__RS__RT_, 72 HEX_INS_IF__NOT_PU_NEW_RDD___COMBINE__RS__RT_, 73 HEX_INS_IF__PU__RD___AND__RS__RT_, 74 HEX_INS_IF__NOT_PU_RD___AND__RS__RT_, 75 HEX_INS_IF__PU_NEW__RD___AND__RS__RT_, 76 HEX_INS_IF__NOT_PU_NEW_RD___AND__RS__RT_, 77 HEX_INS_IF__PU__RD___OR__RS__RT_, 78 HEX_INS_IF__NOT_PU_RD___OR__RS__RT_, 79 HEX_INS_IF__PU_NEW__RD___OR__RS__RT_, 80 HEX_INS_IF__NOT_PU_NEW_RD___OR__RS__RT_, 81 HEX_INS_IF__PU__RD___XOR__RS__RT_, 82 HEX_INS_IF__NOT_PU_RD___XOR__RS__RT_, 83 HEX_INS_IF__PU_NEW__RD___XOR__RS__RT_, 84 HEX_INS_IF__NOT_PU_NEW_RD___XOR__RS__RT_, 85 HEX_INS_IF__PU__RD___SUB__RT__RS_, 86 HEX_INS_IF__NOT_PU_RD___SUB__RT__RS_, 87 HEX_INS_IF__PU_NEW__RD___SUB__RT__RS_, 88 HEX_INS_IF__NOT_PU_NEW_RD___SUB__RT__RS_, 89 HEX_INS_IF__PU__RD___SXTB__RS_, 90 HEX_INS_IF__PU_NEW__RD___SXTB__RS_, 91 HEX_INS_IF__NOT_PU_RD___SXTB__RS_, 92 HEX_INS_IF__NOT_PU_NEW_RD___SXTB__RS_, 93 HEX_INS_IF__PU__RD___SXTH__RS_, 94 HEX_INS_IF__PU_NEW__RD___SXTH__RS_, 95 HEX_INS_IF__NOT_PU_RD___SXTH__RS_, 96 HEX_INS_IF__NOT_PU_NEW_RD___SXTH__RS_, 97 HEX_INS_IF__PU__RD____S12, 98 HEX_INS_IF__PU_NEW__RD____S12, 99 HEX_INS_IF__NOT_PU_RD____S12, 100 HEX_INS_IF__NOT_PU_NEW_RD____S12, 101 HEX_INS_IF__PU__RD___ZXTB__RS_, 102 HEX_INS_IF__PU_NEW__RD___ZXTB__RS_, 103 HEX_INS_IF__NOT_PU_RD___ZXTB__RS_, 104 HEX_INS_IF__NOT_PU_NEW_RD___ZXTB__RS_, 105 HEX_INS_IF__PU__RD___ZXTH__RS_, 106 HEX_INS_IF__PU_NEW__RD___ZXTH__RS_, 107 HEX_INS_IF__NOT_PU_RD___ZXTH__RS_, 108 HEX_INS_IF__NOT_PU_NEW_RD___ZXTH__RS_, 109 HEX_INS_PD___CMP_EQ__RS___S10_, 110 HEX_INS_PD____NOT_CMP_EQ__RS___S10_, 111 HEX_INS_PD___CMP_GT__RS___S10_, 112 HEX_INS_PD____NOT_CMP_GT__RS___S10_, 113 HEX_INS_PD___CMP_GTU__RS___U9_, 114 HEX_INS_PD____NOT_CMP_GTU__RS___U9_, 115 HEX_INS_PD___CMP_EQ__RS__RT_, 116 HEX_INS_PD____NOT_CMP_EQ__RS__RT_, 117 HEX_INS_PD___CMP_GT__RS__RT_, 118 HEX_INS_PD____NOT_CMP_GT__RS__RT_, 119 HEX_INS_PD___CMP_GTU__RS__RT_, 120 HEX_INS_PD____NOT_CMP_GTU__RS__RT_, 121 HEX_INS_RD___CMP_EQ__RS___S8_, 122 HEX_INS_RD____NOT_CMP_EQ__RS___S8_, 123 HEX_INS_RD___CMP_EQ__RS__RT_, 124 HEX_INS_RD____NOT_CMP_EQ__RS__RT_, 125 HEX_INS_PD___FASTCORNER9__PS__PT_, 126 HEX_INS_PD____NOT_FASTCORNER9__PS__PT_, 127 HEX_INS_PD___ANY8__PS_, 128 HEX_INS_PD___ALL8__PS_, 129 HEX_INS_LOOP0___R7_2__RS_, 130 HEX_INS_LOOP1___R7_2__RS_, 131 HEX_INS_LOOP0___R7_2___U10_, 132 HEX_INS_LOOP1___R7_2___U10_, 133 HEX_INS_RD___ADD__PC___U6_, 134 HEX_INS_P3___SP1LOOP0___R7_2__RS_, 135 HEX_INS_P3___SP2LOOP0___R7_2__RS_, 136 HEX_INS_P3___SP3LOOP0___R7_2__RS_, 137 HEX_INS_P3___SP1LOOP0___R7_2___U10_, 138 HEX_INS_P3___SP2LOOP0___R7_2___U10_, 139 HEX_INS_P3___SP3LOOP0___R7_2___U10_, 140 HEX_INS_PD___AND__PT__PS_, 141 HEX_INS_PD___AND__PS__AND__PT__PU__, 142 HEX_INS_PD___OR__PT__PS_, 143 HEX_INS_PD___AND__PS__OR__PT__PU__, 144 HEX_INS_PD___XOR__PS__PT_, 145 HEX_INS_PD___OR__PS__AND__PT__PU__, 146 HEX_INS_PD___AND__PT___NOT_PS_, 147 HEX_INS_PD___OR__PS__OR__PT__PU__, 148 HEX_INS_PD___AND__PS__AND__PT___NOT_PU__, 149 HEX_INS_PD___AND__PS__OR__PT___NOT_PU__, 150 HEX_INS_PD___NOT__PS_, 151 HEX_INS_PD___OR__PS__AND__PT___NOT_PU__, 152 HEX_INS_PD___OR__PT___NOT_PS_, 153 HEX_INS_PD___OR__PS__OR__PT___NOT_PU__, 154 HEX_INS_CD___RS, 155 HEX_INS_CDD___RSS, 156 HEX_INS_RDD___CSS, 157 HEX_INS_RD___CS, 158 HEX_INS_CALLR_RS, 159 HEX_INS_IF__PU__CALLR_RS, 160 HEX_INS_IF__NOT_PU_CALLR_RS, 161 HEX_INS_HINTJR__RS_, 162 HEX_INS_JUMPR_RS, 163 HEX_INS_IF__PU__JUMPR_NT_RS, 164 HEX_INS_IF__PU_NEW__JUMPR_NT_RS, 165 HEX_INS_IF__PU__JUMPR_T_RS, 166 HEX_INS_IF__PU_NEW__JUMPR_T_RS, 167 HEX_INS_IF__NOT_PU_JUMPR_NT_RS, 168 HEX_INS_IF__NOT_PU_NEW_JUMPR_NT_RS, 169 HEX_INS_IF__NOT_PU_JUMPR_T_RS, 170 HEX_INS_IF__NOT_PU_NEW_JUMPR_T_RS, 171 HEX_INS_CALL__R22_2, 172 HEX_INS_IF__PU__CALL__R15_2, 173 HEX_INS_IF__NOT_PU_CALL__R15_2, 174 HEX_INS_MULT_P0___CMP_EQ__RS____1____IF__P0_NEW__JUMP_NT__R9_2, 175 HEX_INS_MULT_P0___CMP_GT__RS____1____IF__P0_NEW__JUMP_NT__R9_2, 176 HEX_INS_MULT_P0___TSTBIT__RS___0____IF__P0_NEW__JUMP_NT__R9_2, 177 HEX_INS_MULT_P0___CMP_EQ__RS____1____IF__P0_NEW__JUMP_T__R9_2, 178 HEX_INS_MULT_P0___CMP_GT__RS____1____IF__P0_NEW__JUMP_T__R9_2, 179 HEX_INS_MULT_P0___TSTBIT__RS___0____IF__P0_NEW__JUMP_T__R9_2, 180 HEX_INS_MULT_P0___CMP_EQ__RS____1____IF___NOT_P0_NEW__JUMP_NT__R9_2, 181 HEX_INS_MULT_P0___CMP_GT__RS____1____IF___NOT_P0_NEW__JUMP_NT__R9_2, 182 HEX_INS_MULT_P0___TSTBIT__RS___0____IF___NOT_P0_NEW__JUMP_NT__R9_2, 183 HEX_INS_MULT_P0___CMP_EQ__RS____1____IF___NOT_P0_NEW__JUMP_T__R9_2, 184 HEX_INS_MULT_P0___CMP_GT__RS____1____IF___NOT_P0_NEW__JUMP_T__R9_2, 185 HEX_INS_MULT_P0___TSTBIT__RS___0____IF___NOT_P0_NEW__JUMP_T__R9_2, 186 HEX_INS_MULT_P0___CMP_EQ__RS___U5____IF__P0_NEW__JUMP_NT__R9_2, 187 HEX_INS_MULT_P0___CMP_EQ__RS___U5____IF__P0_NEW__JUMP_T__R9_2, 188 HEX_INS_MULT_P0___CMP_EQ__RS___U5____IF___NOT_P0_NEW__JUMP_NT__R9_2, 189 HEX_INS_MULT_P0___CMP_EQ__RS___U5____IF___NOT_P0_NEW__JUMP_T__R9_2, 190 HEX_INS_MULT_P0___CMP_GT__RS___U5____IF__P0_NEW__JUMP_NT__R9_2, 191 HEX_INS_MULT_P0___CMP_GT__RS___U5____IF__P0_NEW__JUMP_T__R9_2, 192 HEX_INS_MULT_P0___CMP_GT__RS___U5____IF___NOT_P0_NEW__JUMP_NT__R9_2, 193 HEX_INS_MULT_P0___CMP_GT__RS___U5____IF___NOT_P0_NEW__JUMP_T__R9_2, 194 HEX_INS_MULT_P0___CMP_GTU__RS___U5____IF__P0_NEW__JUMP_NT__R9_2, 195 HEX_INS_MULT_P0___CMP_GTU__RS___U5____IF__P0_NEW__JUMP_T__R9_2, 196 HEX_INS_MULT_P0___CMP_GTU__RS___U5____IF___NOT_P0_NEW__JUMP_NT__R9_2, 197 HEX_INS_MULT_P0___CMP_GTU__RS___U5____IF___NOT_P0_NEW__JUMP_T__R9_2, 198 HEX_INS_MULT_P1___CMP_EQ__RS____1____IF__P1_NEW__JUMP_NT__R9_2, 199 HEX_INS_MULT_P1___CMP_GT__RS____1____IF__P1_NEW__JUMP_NT__R9_2, 200 HEX_INS_MULT_P1___TSTBIT__RS___0____IF__P1_NEW__JUMP_NT__R9_2, 201 HEX_INS_MULT_P1___CMP_EQ__RS____1____IF__P1_NEW__JUMP_T__R9_2, 202 HEX_INS_MULT_P1___CMP_GT__RS____1____IF__P1_NEW__JUMP_T__R9_2, 203 HEX_INS_MULT_P1___TSTBIT__RS___0____IF__P1_NEW__JUMP_T__R9_2, 204 HEX_INS_MULT_P1___CMP_EQ__RS____1____IF___NOT_P1_NEW__JUMP_NT__R9_2, 205 HEX_INS_MULT_P1___CMP_GT__RS____1____IF___NOT_P1_NEW__JUMP_NT__R9_2, 206 HEX_INS_MULT_P1___TSTBIT__RS___0____IF___NOT_P1_NEW__JUMP_NT__R9_2, 207 HEX_INS_MULT_P1___CMP_EQ__RS____1____IF___NOT_P1_NEW__JUMP_T__R9_2, 208 HEX_INS_MULT_P1___CMP_GT__RS____1____IF___NOT_P1_NEW__JUMP_T__R9_2, 209 HEX_INS_MULT_P1___TSTBIT__RS___0____IF___NOT_P1_NEW__JUMP_T__R9_2, 210 HEX_INS_MULT_P1___CMP_EQ__RS___U5____IF__P1_NEW__JUMP_NT__R9_2, 211 HEX_INS_MULT_P1___CMP_EQ__RS___U5____IF__P1_NEW__JUMP_T__R9_2, 212 HEX_INS_MULT_P1___CMP_EQ__RS___U5____IF___NOT_P1_NEW__JUMP_NT__R9_2, 213 HEX_INS_MULT_P1___CMP_EQ__RS___U5____IF___NOT_P1_NEW__JUMP_T__R9_2, 214 HEX_INS_MULT_P1___CMP_GT__RS___U5____IF__P1_NEW__JUMP_NT__R9_2, 215 HEX_INS_MULT_P1___CMP_GT__RS___U5____IF__P1_NEW__JUMP_T__R9_2, 216 HEX_INS_MULT_P1___CMP_GT__RS___U5____IF___NOT_P1_NEW__JUMP_NT__R9_2, 217 HEX_INS_MULT_P1___CMP_GT__RS___U5____IF___NOT_P1_NEW__JUMP_T__R9_2, 218 HEX_INS_MULT_P1___CMP_GTU__RS___U5____IF__P1_NEW__JUMP_NT__R9_2, 219 HEX_INS_MULT_P1___CMP_GTU__RS___U5____IF__P1_NEW__JUMP_T__R9_2, 220 HEX_INS_MULT_P1___CMP_GTU__RS___U5____IF___NOT_P1_NEW__JUMP_NT__R9_2, 221 HEX_INS_MULT_P1___CMP_GTU__RS___U5____IF___NOT_P1_NEW__JUMP_T__R9_2, 222 HEX_INS_MULT_P0___CMP_EQ__RS__RT____IF__P0_NEW__JUMP_NT__R9_2, 223 HEX_INS_MULT_P1___CMP_EQ__RS__RT____IF__P1_NEW__JUMP_NT__R9_2, 224 HEX_INS_MULT_P0___CMP_EQ__RS__RT____IF__P0_NEW__JUMP_T__R9_2, 225 HEX_INS_MULT_P1___CMP_EQ__RS__RT____IF__P1_NEW__JUMP_T__R9_2, 226 HEX_INS_MULT_P0___CMP_EQ__RS__RT____IF___NOT_P0_NEW__JUMP_NT__R9_2, 227 HEX_INS_MULT_P1___CMP_EQ__RS__RT____IF___NOT_P1_NEW__JUMP_NT__R9_2, 228 HEX_INS_MULT_P0___CMP_EQ__RS__RT____IF___NOT_P0_NEW__JUMP_T__R9_2, 229 HEX_INS_MULT_P1___CMP_EQ__RS__RT____IF___NOT_P1_NEW__JUMP_T__R9_2, 230 HEX_INS_MULT_P0___CMP_GT__RS__RT____IF__P0_NEW__JUMP_NT__R9_2, 231 HEX_INS_MULT_P1___CMP_GT__RS__RT____IF__P1_NEW__JUMP_NT__R9_2, 232 HEX_INS_MULT_P0___CMP_GT__RS__RT____IF__P0_NEW__JUMP_T__R9_2, 233 HEX_INS_MULT_P1___CMP_GT__RS__RT____IF__P1_NEW__JUMP_T__R9_2, 234 HEX_INS_MULT_P0___CMP_GT__RS__RT____IF___NOT_P0_NEW__JUMP_NT__R9_2, 235 HEX_INS_MULT_P1___CMP_GT__RS__RT____IF___NOT_P1_NEW__JUMP_NT__R9_2, 236 HEX_INS_MULT_P0___CMP_GT__RS__RT____IF___NOT_P0_NEW__JUMP_T__R9_2, 237 HEX_INS_MULT_P1___CMP_GT__RS__RT____IF___NOT_P1_NEW__JUMP_T__R9_2, 238 HEX_INS_MULT_P0___CMP_GTU__RS__RT____IF__P0_NEW__JUMP_NT__R9_2, 239 HEX_INS_MULT_P1___CMP_GTU__RS__RT____IF__P1_NEW__JUMP_NT__R9_2, 240 HEX_INS_MULT_P0___CMP_GTU__RS__RT____IF__P0_NEW__JUMP_T__R9_2, 241 HEX_INS_MULT_P1___CMP_GTU__RS__RT____IF__P1_NEW__JUMP_T__R9_2, 242 HEX_INS_MULT_P0___CMP_GTU__RS__RT____IF___NOT_P0_NEW__JUMP_NT__R9_2, 243 HEX_INS_MULT_P1___CMP_GTU__RS__RT____IF___NOT_P1_NEW__JUMP_NT__R9_2, 244 HEX_INS_MULT_P0___CMP_GTU__RS__RT____IF___NOT_P0_NEW__JUMP_T__R9_2, 245 HEX_INS_MULT_P1___CMP_GTU__RS__RT____IF___NOT_P1_NEW__JUMP_T__R9_2, 246 HEX_INS_JUMP__R22_2, 247 HEX_INS_IF__PU__JUMP_NT__R15_2, 248 HEX_INS_IF__PU__JUMP_T__R15_2, 249 HEX_INS_IF__NOT_PU_JUMP_NT__R15_2, 250 HEX_INS_IF__NOT_PU_JUMP_T__R15_2, 251 HEX_INS_IF__PU_NEW__JUMP_NT__R15_2, 252 HEX_INS_IF__PU_NEW__JUMP_T__R15_2, 253 HEX_INS_IF__NOT_PU_NEW_JUMP_NT__R15_2, 254 HEX_INS_IF__NOT_PU_NEW_JUMP_T__R15_2, 255 HEX_INS_IF__RS__NOT____0__JUMP_NT__R13_2, 256 HEX_INS_IF__RS__NOT____0__JUMP_T__R13_2, 257 HEX_INS_IF__RS_GT_EQ___0__JUMP_NT__R13_2, 258 HEX_INS_IF__RS_GT_EQ___0__JUMP_T__R13_2, 259 HEX_INS_IF__RS__EQ___0__JUMP_NT__R13_2, 260 HEX_INS_IF__RS__EQ___0__JUMP_T__R13_2, 261 HEX_INS_IF__RS_LT_EQ___0__JUMP_NT__R13_2, 262 HEX_INS_IF__RS_LT_EQ___0__JUMP_T__R13_2, 263 HEX_INS_MULT_RD____U6___JUMP__R9_2, 264 HEX_INS_MULT_RD___RS___JUMP__R9_2, 265 HEX_INS_RDD___MEMD__RS___RT_____U2_, 266 HEX_INS_RDD___MEMD__GP____U16_3_, 267 HEX_INS_RDD___MEMD__RS____S11_3_, 268 HEX_INS_RDD___MEMD__RX_____S4_3_CIRC__MU__, 269 HEX_INS_RDD___MEMD__RX____I_CIRC__MU__, 270 HEX_INS_RDD___MEMD__RE____U6_, 271 HEX_INS_RDD___MEMD__RX_____S4_3_, 272 HEX_INS_RDD___MEMD__RT_____U2____U6_, 273 HEX_INS_RDD___MEMD__RX____MU_, 274 HEX_INS_RDD___MEMD__RX____MU_BREV_, 275 HEX_INS_IF__PV__RDD___MEMD__RS___RT_____U2_, 276 HEX_INS_IF__NOT_PV_RDD___MEMD__RS___RT_____U2_, 277 HEX_INS_IF__PV_NEW__RDD___MEMD__RS___RT_____U2_, 278 HEX_INS_IF__NOT_PV_NEW_RDD___MEMD__RS___RT_____U2_, 279 HEX_INS_IF__PT__RDD___MEMD__RS____U6_3_, 280 HEX_INS_IF__PT_NEW__RDD___MEMD__RS____U6_3_, 281 HEX_INS_IF__NOT_PT_RDD___MEMD__RS____U6_3_, 282 HEX_INS_IF__NOT_PT_NEW_RDD___MEMD__RS____U6_3_, 283 HEX_INS_IF__PT__RDD___MEMD__RX_____S4_3_, 284 HEX_INS_IF__NOT_PT_RDD___MEMD__RX_____S4_3_, 285 HEX_INS_IF__PT_NEW__RDD___MEMD__RX_____S4_3_, 286 HEX_INS_IF__NOT_PT_NEW_RDD___MEMD__RX_____S4_3_, 287 HEX_INS_IF__PT__RDD___MEMD___U6_, 288 HEX_INS_IF__NOT_PT_RDD___MEMD___U6_, 289 HEX_INS_IF__PT_NEW__RDD___MEMD___U6_, 290 HEX_INS_IF__NOT_PT_NEW_RDD___MEMD___U6_, 291 HEX_INS_RD___MEMB__RS___RT_____U2_, 292 HEX_INS_RD___MEMB__GP____U16_0_, 293 HEX_INS_RD___MEMB__RS____S11_0_, 294 HEX_INS_RD___MEMB__RX_____S4_0_CIRC__MU__, 295 HEX_INS_RD___MEMB__RX____I_CIRC__MU__, 296 HEX_INS_RD___MEMB__RE____U6_, 297 HEX_INS_RD___MEMB__RX_____S4_0_, 298 HEX_INS_RD___MEMB__RT_____U2____U6_, 299 HEX_INS_RD___MEMB__RX____MU_, 300 HEX_INS_RD___MEMB__RX____MU_BREV_, 301 HEX_INS_IF__PV__RD___MEMB__RS___RT_____U2_, 302 HEX_INS_IF__NOT_PV_RD___MEMB__RS___RT_____U2_, 303 HEX_INS_IF__PV_NEW__RD___MEMB__RS___RT_____U2_, 304 HEX_INS_IF__NOT_PV_NEW_RD___MEMB__RS___RT_____U2_, 305 HEX_INS_IF__PT__RD___MEMB__RS____U6_0_, 306 HEX_INS_IF__PT_NEW__RD___MEMB__RS____U6_0_, 307 HEX_INS_IF__NOT_PT_RD___MEMB__RS____U6_0_, 308 HEX_INS_IF__NOT_PT_NEW_RD___MEMB__RS____U6_0_, 309 HEX_INS_IF__PT__RD___MEMB__RX_____S4_0_, 310 HEX_INS_IF__NOT_PT_RD___MEMB__RX_____S4_0_, 311 HEX_INS_IF__PT_NEW__RD___MEMB__RX_____S4_0_, 312 HEX_INS_IF__NOT_PT_NEW_RD___MEMB__RX_____S4_0_, 313 HEX_INS_IF__PT__RD___MEMB___U6_, 314 HEX_INS_IF__NOT_PT_RD___MEMB___U6_, 315 HEX_INS_IF__PT_NEW__RD___MEMB___U6_, 316 HEX_INS_IF__NOT_PT_NEW_RD___MEMB___U6_, 317 HEX_INS_RYY___MEMB_FIFO__RS____S11_0_, 318 HEX_INS_RYY___MEMB_FIFO__RX_____S4_0_CIRC__MU__, 319 HEX_INS_RYY___MEMB_FIFO__RX____I_CIRC__MU__, 320 HEX_INS_RYY___MEMB_FIFO__RE____U6_, 321 HEX_INS_RYY___MEMB_FIFO__RX_____S4_0_, 322 HEX_INS_RYY___MEMB_FIFO__RT_____U2____U6_, 323 HEX_INS_RYY___MEMB_FIFO__RX____MU_, 324 HEX_INS_RYY___MEMB_FIFO__RX____MU_BREV_, 325 HEX_INS_RYY___MEMH_FIFO__RS____S11_1_, 326 HEX_INS_RYY___MEMH_FIFO__RX_____S4_1_CIRC__MU__, 327 HEX_INS_RYY___MEMH_FIFO__RX____I_CIRC__MU__, 328 HEX_INS_RYY___MEMH_FIFO__RE____U6_, 329 HEX_INS_RYY___MEMH_FIFO__RX_____S4_1_, 330 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HEX_INS_IF__PS_NEW__DEALLOC_RETURN_T, 442 HEX_INS_IF__NOT_PS_NEW_DEALLOC_RETURN_NT, 443 HEX_INS_IF__NOT_PS_DEALLOC_RETURN, 444 HEX_INS_IF__NOT_PS_NEW_DEALLOC_RETURN_T, 445 HEX_INS_RD___MEMBH__RS____S11_1_, 446 HEX_INS_RD___MEMUBH__RS____S11_1_, 447 HEX_INS_RDD___MEMUBH__RS____S11_2_, 448 HEX_INS_RDD___MEMBH__RS____S11_2_, 449 HEX_INS_RD___MEMBH__RX_____S4_1_CIRC__MU__, 450 HEX_INS_RD___MEMBH__RX____I_CIRC__MU__, 451 HEX_INS_RD___MEMUBH__RX_____S4_1_CIRC__MU__, 452 HEX_INS_RD___MEMUBH__RX____I_CIRC__MU__, 453 HEX_INS_RDD___MEMUBH__RX_____S4_2_CIRC__MU__, 454 HEX_INS_RDD___MEMUBH__RX____I_CIRC__MU__, 455 HEX_INS_RDD___MEMBH__RX_____S4_2_CIRC__MU__, 456 HEX_INS_RDD___MEMBH__RX____I_CIRC__MU__, 457 HEX_INS_RD___MEMBH__RE____U6_, 458 HEX_INS_RD___MEMBH__RX_____S4_1_, 459 HEX_INS_RD___MEMUBH__RE____U6_, 460 HEX_INS_RD___MEMUBH__RX_____S4_1_, 461 HEX_INS_RDD___MEMUBH__RE____U6_, 462 HEX_INS_RDD___MEMUBH__RX_____S4_2_, 463 HEX_INS_RDD___MEMBH__RE____U6_, 464 HEX_INS_RDD___MEMBH__RX_____S4_2_, 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HEX_INS_IF__CMP_GT__NS_NEW___U5___JUMP_T__R9_2, 527 HEX_INS_IF___NOT_CMP_GT__NS_NEW___U5___JUMP_NT__R9_2, 528 HEX_INS_IF___NOT_CMP_GT__NS_NEW___U5___JUMP_T__R9_2, 529 HEX_INS_IF__CMP_GTU__NS_NEW___U5___JUMP_NT__R9_2, 530 HEX_INS_IF__CMP_GTU__NS_NEW___U5___JUMP_T__R9_2, 531 HEX_INS_IF___NOT_CMP_GTU__NS_NEW___U5___JUMP_NT__R9_2, 532 HEX_INS_IF___NOT_CMP_GTU__NS_NEW___U5___JUMP_T__R9_2, 533 HEX_INS_IF__TSTBIT__NS_NEW___0___JUMP_NT__R9_2, 534 HEX_INS_IF__TSTBIT__NS_NEW___0___JUMP_T__R9_2, 535 HEX_INS_IF___NOT_TSTBIT__NS_NEW___0___JUMP_NT__R9_2, 536 HEX_INS_IF___NOT_TSTBIT__NS_NEW___0___JUMP_T__R9_2, 537 HEX_INS_IF__CMP_EQ__NS_NEW____1___JUMP_NT__R9_2, 538 HEX_INS_IF__CMP_EQ__NS_NEW____1___JUMP_T__R9_2, 539 HEX_INS_IF___NOT_CMP_EQ__NS_NEW____1___JUMP_NT__R9_2, 540 HEX_INS_IF___NOT_CMP_EQ__NS_NEW____1___JUMP_T__R9_2, 541 HEX_INS_IF__CMP_GT__NS_NEW____1___JUMP_NT__R9_2, 542 HEX_INS_IF__CMP_GT__NS_NEW____1___JUMP_T__R9_2, 543 HEX_INS_IF___NOT_CMP_GT__NS_NEW____1___JUMP_NT__R9_2, 544 HEX_INS_IF___NOT_CMP_GT__NS_NEW____1___JUMP_T__R9_2, 545 HEX_INS_MEMB__RS___RU_____U2____NT_NEW, 546 HEX_INS_MEMB__GP____U16_0____NT_NEW, 547 HEX_INS_MEMB__RS____S11_0____NT_NEW, 548 HEX_INS_MEMB__RX____I_CIRC__MU_____NT_NEW, 549 HEX_INS_MEMB__RX_____S4_0_CIRC__MU_____NT_NEW, 550 HEX_INS_MEMB__RE____U6____NT_NEW, 551 HEX_INS_MEMB__RX_____S4_0____NT_NEW, 552 HEX_INS_MEMB__RU_____U2____U6____NT_NEW, 553 HEX_INS_MEMB__RX____MU____NT_NEW, 554 HEX_INS_MEMB__RX____MU_BREV____NT_NEW, 555 HEX_INS_IF__PV__MEMB__RS___RU_____U2____NT_NEW, 556 HEX_INS_IF__NOT_PV_MEMB__RS___RU_____U2____NT_NEW, 557 HEX_INS_IF__PV_NEW__MEMB__RS___RU_____U2____NT_NEW, 558 HEX_INS_IF__NOT_PV_NEW_MEMB__RS___RU_____U2____NT_NEW, 559 HEX_INS_IF__PV__MEMB__RS____U6_0____NT_NEW, 560 HEX_INS_IF__PV_NEW__MEMB__RS____U6_0____NT_NEW, 561 HEX_INS_IF__NOT_PV_MEMB__RS____U6_0____NT_NEW, 562 HEX_INS_IF__NOT_PV_NEW_MEMB__RS____U6_0____NT_NEW, 563 HEX_INS_IF__PV__MEMB__RX_____S4_0____NT_NEW, 564 HEX_INS_IF__NOT_PV_MEMB__RX_____S4_0____NT_NEW, 565 HEX_INS_IF__PV_NEW__MEMB__RX_____S4_0____NT_NEW, 566 HEX_INS_IF__NOT_PV_NEW_MEMB__RX_____S4_0____NT_NEW, 567 HEX_INS_IF__PV__MEMB___U6____NT_NEW, 568 HEX_INS_IF__NOT_PV_MEMB___U6____NT_NEW, 569 HEX_INS_IF__PV_NEW__MEMB___U6____NT_NEW, 570 HEX_INS_IF__NOT_PV_NEW_MEMB___U6____NT_NEW, 571 HEX_INS_MEMH__RS___RU_____U2____NT_NEW, 572 HEX_INS_MEMH__GP____U16_1____NT_NEW, 573 HEX_INS_MEMH__RS____S11_1____NT_NEW, 574 HEX_INS_MEMH__RX____I_CIRC__MU_____NT_NEW, 575 HEX_INS_MEMH__RX_____S4_1_CIRC__MU_____NT_NEW, 576 HEX_INS_MEMH__RE____U6____NT_NEW, 577 HEX_INS_MEMH__RX_____S4_1____NT_NEW, 578 HEX_INS_MEMH__RU_____U2____U6____NT_NEW, 579 HEX_INS_MEMH__RX____MU____NT_NEW, 580 HEX_INS_MEMH__RX____MU_BREV____NT_NEW, 581 HEX_INS_IF__PV__MEMH__RS___RU_____U2____NT_NEW, 582 HEX_INS_IF__NOT_PV_MEMH__RS___RU_____U2____NT_NEW, 583 HEX_INS_IF__PV_NEW__MEMH__RS___RU_____U2____NT_NEW, 584 HEX_INS_IF__NOT_PV_NEW_MEMH__RS___RU_____U2____NT_NEW, 585 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HEX_INS_RD___VDMPY__RSS__RTT______N__RND_SAT, 1275 HEX_INS_RDD___VRMPYBU__RSS__RTT_, 1276 HEX_INS_RDD___VRMPYBSU__RSS__RTT_, 1277 HEX_INS_RXX__PLUS_EQ__VRMPYBU__RSS__RTT_, 1278 HEX_INS_RXX__PLUS_EQ__VRMPYBSU__RSS__RTT_, 1279 HEX_INS_RDD___VDMPYBSU__RSS__RTT___SAT, 1280 HEX_INS_RXX__PLUS_EQ__VDMPYBSU__RSS__RTT___SAT, 1281 HEX_INS_RDD___VMPYEH__RSS__RTT______N__SAT, 1282 HEX_INS_RXX__PLUS_EQ__VMPYEH__RSS__RTT_, 1283 HEX_INS_RXX__PLUS_EQ__VMPYEH__RSS__RTT______N__SAT, 1284 HEX_INS_RDD___VMPYH__RS__RT______N__SAT, 1285 HEX_INS_RXX__PLUS_EQ__VMPYH__RS__RT_, 1286 HEX_INS_RXX__PLUS_EQ__VMPYH__RS__RT______N__SAT, 1287 HEX_INS_RD___VMPYH__RS__RT______N__RND_SAT, 1288 HEX_INS_RDD___VMPYHSU__RS__RT______N__SAT, 1289 HEX_INS_RXX__PLUS_EQ__VMPYHSU__RS__RT______N__SAT, 1290 HEX_INS_RDD___VRMPYH__RSS__RTT_, 1291 HEX_INS_RXX__PLUS_EQ__VRMPYH__RSS__RTT_, 1292 HEX_INS_RDD___VMPYBSU__RS__RT_, 1293 HEX_INS_RDD___VMPYBU__RS__RT_, 1294 HEX_INS_RXX__PLUS_EQ__VMPYBU__RS__RT_, 1295 HEX_INS_RXX__PLUS_EQ__VMPYBSU__RS__RT_, 1296 HEX_INS_RDD___VPMPYH__RS__RT_, 1297 HEX_INS_RXX____VPMPYH__RS__RT_, 1298 HEX_INS_RDD___DECBIN__RSS__RTT_, 1299 HEX_INS_RD___SAT__RSS_, 1300 HEX_INS_RD___SATH__RS_, 1301 HEX_INS_RD___SATUH__RS_, 1302 HEX_INS_RD___SATUB__RS_, 1303 HEX_INS_RD___SATB__RS_, 1304 HEX_INS_RD___SWIZ__RS_, 1305 HEX_INS_RDD___VALIGNB__RTT__RSS___U3_, 1306 HEX_INS_RDD___VALIGNB__RTT__RSS__PU_, 1307 HEX_INS_RD___VRNDWH__RSS_, 1308 HEX_INS_RD___VRNDWH__RSS___SAT, 1309 HEX_INS_RD___VSATHUB__RSS_, 1310 HEX_INS_RD___VSATWH__RSS_, 1311 HEX_INS_RD___VSATWUH__RSS_, 1312 HEX_INS_RD___VSATHB__RSS_, 1313 HEX_INS_RD___VSATHB__RS_, 1314 HEX_INS_RD___VSATHUB__RS_, 1315 HEX_INS_RDD___VSATHUB__RSS_, 1316 HEX_INS_RDD___VSATWUH__RSS_, 1317 HEX_INS_RDD___VSATWH__RSS_, 1318 HEX_INS_RDD___VSATHB__RSS_, 1319 HEX_INS_RDD___SHUFFEB__RSS__RTT_, 1320 HEX_INS_RDD___SHUFFOB__RTT__RSS_, 1321 HEX_INS_RDD___SHUFFEH__RSS__RTT_, 1322 HEX_INS_RDD___SHUFFOH__RTT__RSS_, 1323 HEX_INS_RDD___VSPLATB__RS_, 1324 HEX_INS_RD___VSPLATB__RS_, 1325 HEX_INS_RDD___VSPLATH__RS_, 1326 HEX_INS_RDD___VSPLICEB__RSS__RTT___U3_, 1327 HEX_INS_RDD___VSPLICEB__RSS__RTT__PU_, 1328 HEX_INS_RDD___VSXTBH__RS_, 1329 HEX_INS_RDD___VSXTHW__RS_, 1330 HEX_INS_RD___VTRUNOHB__RSS_, 1331 HEX_INS_RD___VTRUNEHB__RSS_, 1332 HEX_INS_RDD___VTRUNEWH__RSS__RTT_, 1333 HEX_INS_RDD___VTRUNEHB__RSS__RTT_, 1334 HEX_INS_RDD___VTRUNOWH__RSS__RTT_, 1335 HEX_INS_RDD___VTRUNOHB__RSS__RTT_, 1336 HEX_INS_RDD___VZXTBH__RS_, 1337 HEX_INS_RDD___VZXTHW__RS_, 1338 HEX_INS_PD___BOUNDSCHECK__RSS__RTT___RAW_LO, 1339 HEX_INS_PD___BOUNDSCHECK__RSS__RTT___RAW_HI, 1340 HEX_INS_PD___CMPB_GT__RS__RT_, 1341 HEX_INS_PD___CMPB_EQ__RS__RT_, 1342 HEX_INS_PD___CMPB_GTU__RS__RT_, 1343 HEX_INS_PD___CMPB_EQ__RS___U8_, 1344 HEX_INS_PD___CMPB_GT__RS___S8_, 1345 HEX_INS_PD___CMPB_GTU__RS___U7_, 1346 HEX_INS_PD___CMPH_EQ__RS__RT_, 1347 HEX_INS_PD___CMPH_GT__RS__RT_, 1348 HEX_INS_PD___CMPH_GTU__RS__RT_, 1349 HEX_INS_PD___CMPH_EQ__RS___S8_, 1350 HEX_INS_PD___CMPH_GT__RS___S8_, 1351 HEX_INS_PD___CMPH_GTU__RS___U7_, 1352 HEX_INS_PD___CMP_EQ__RSS__RTT__, 1353 HEX_INS_PD___CMP_GT__RSS__RTT__, 1354 HEX_INS_PD___CMP_GTU__RSS__RTT_, 1355 HEX_INS_PD___BITSCLR__RS___U6_, 1356 HEX_INS_PD____NOT_BITSCLR__RS___U6_, 1357 HEX_INS_PD___BITSSET__RS__RT_, 1358 HEX_INS_PD____NOT_BITSSET__RS__RT_, 1359 HEX_INS_PD___BITSCLR__RS__RT_, 1360 HEX_INS_PD____NOT_BITSCLR__RS__RT_, 1361 HEX_INS_RDD___MASK__PT_, 1362 HEX_INS_PD___TLBMATCH__RSS__RT_, 1363 HEX_INS_PD___RS, 1364 HEX_INS_RD___PS, 1365 HEX_INS_PD___TSTBIT__RS___U5_, 1366 HEX_INS_PD____NOT_TSTBIT__RS___U5_, 1367 HEX_INS_PD___TSTBIT__RS__RT_, 1368 HEX_INS_PD____NOT_TSTBIT__RS__RT_, 1369 HEX_INS_PD___VCMPH_EQ__RSS__RTT_, 1370 HEX_INS_PD___VCMPH_GT__RSS__RTT_, 1371 HEX_INS_PD___VCMPH_GTU__RSS__RTT_, 1372 HEX_INS_PD___VCMPH_EQ__RSS___S8_, 1373 HEX_INS_PD___VCMPH_GT__RSS___S8_, 1374 HEX_INS_PD___VCMPH_GTU__RSS___U7_, 1375 HEX_INS_PD___ANY8__VCMPB_EQ__RSS__RTT__, 1376 HEX_INS_PD___VCMPB_EQ__RSS__RTT_, 1377 HEX_INS_PD___VCMPB_GTU__RSS__RTT_, 1378 HEX_INS_PD___VCMPB_GT__RSS__RTT_, 1379 HEX_INS_PD___VCMPB_EQ__RSS___U8_, 1380 HEX_INS_PD___VCMPB_GT__RSS___S8_, 1381 HEX_INS_PD___VCMPB_GTU__RSS___U7_, 1382 HEX_INS_PD___VCMPW_EQ__RSS__RTT_, 1383 HEX_INS_PD___VCMPW_GT__RSS__RTT_, 1384 HEX_INS_PD___VCMPW_GTU__RSS__RTT_, 1385 HEX_INS_PD___VCMPW_EQ__RSS___S8_, 1386 HEX_INS_PD___VCMPW_GT__RSS___S8_, 1387 HEX_INS_PD___VCMPW_GTU__RSS___U7_, 1388 HEX_INS_RD___VITPACK__PS__PT_, 1389 HEX_INS_RDD___VMUX__PU__RSS__RTT_, 1390 HEX_INS_RDD___ASR__RSS___U6_, 1391 HEX_INS_RDD___LSR__RSS___U6_, 1392 HEX_INS_RDD___ASL__RSS___U6_, 1393 HEX_INS_RDD___ROL__RSS___U6_, 1394 HEX_INS_RD___ASR__RS___U5_, 1395 HEX_INS_RD___LSR__RS___U5_, 1396 HEX_INS_RD___ASL__RS___U5_, 1397 HEX_INS_RD___ROL__RS___U5_, 1398 HEX_INS_RXX__MINUS_EQ__ASR__RSS___U6_, 1399 HEX_INS_RXX__MINUS_EQ__LSR__RSS___U6_, 1400 HEX_INS_RXX__MINUS_EQ__ASL__RSS___U6_, 1401 HEX_INS_RXX__MINUS_EQ__ROL__RSS___U6_, 1402 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HEX_INS_RXX__OR_EQ__ASL__RSS___U6_, 1426 HEX_INS_RXX__OR_EQ__ROL__RSS___U6_, 1427 HEX_INS_RXX____LSR__RSS___U6_, 1428 HEX_INS_RXX____ASL__RSS___U6_, 1429 HEX_INS_RXX____ROL__RSS___U6_, 1430 HEX_INS_RX__AND_EQ__ASR__RS___U5_, 1431 HEX_INS_RX__AND_EQ__LSR__RS___U5_, 1432 HEX_INS_RX__AND_EQ__ASL__RS___U5_, 1433 HEX_INS_RX__AND_EQ__ROL__RS___U5_, 1434 HEX_INS_RX__OR_EQ__ASR__RS___U5_, 1435 HEX_INS_RX__OR_EQ__LSR__RS___U5_, 1436 HEX_INS_RX__OR_EQ__ASL__RS___U5_, 1437 HEX_INS_RX__OR_EQ__ROL__RS___U5_, 1438 HEX_INS_RX____LSR__RS___U5_, 1439 HEX_INS_RX____ASL__RS___U5_, 1440 HEX_INS_RX____ROL__RS___U5_, 1441 HEX_INS_RX___AND___U8__ASL__RX___U5__, 1442 HEX_INS_RX___OR___U8__ASL__RX___U5__, 1443 HEX_INS_RX___AND___U8__LSR__RX___U5__, 1444 HEX_INS_RX___OR___U8__LSR__RX___U5__, 1445 HEX_INS_RDD___ASR__RSS___U6___RND, 1446 HEX_INS_RD___ASR__RS___U5___RND, 1447 HEX_INS_RD___ASL__RS___U5___SAT, 1448 HEX_INS_RDD___ASR__RSS__RT_, 1449 HEX_INS_RDD___LSR__RSS__RT_, 1450 HEX_INS_RDD___ASL__RSS__RT_, 1451 HEX_INS_RDD___LSL__RSS__RT_, 1452 HEX_INS_RD___ASR__RS__RT_, 1453 HEX_INS_RD___LSR__RS__RT_, 1454 HEX_INS_RD___ASL__RS__RT_, 1455 HEX_INS_RD___LSL__RS__RT_, 1456 HEX_INS_RD___LSL___S6__RT_, 1457 HEX_INS_RXX__MINUS_EQ__ASR__RSS__RT_, 1458 HEX_INS_RXX__MINUS_EQ__LSR__RSS__RT_, 1459 HEX_INS_RXX__MINUS_EQ__ASL__RSS__RT_, 1460 HEX_INS_RXX__MINUS_EQ__LSL__RSS__RT_, 1461 HEX_INS_RXX__PLUS_EQ__ASR__RSS__RT_, 1462 HEX_INS_RXX__PLUS_EQ__LSR__RSS__RT_, 1463 HEX_INS_RXX__PLUS_EQ__ASL__RSS__RT_, 1464 HEX_INS_RXX__PLUS_EQ__LSL__RSS__RT_, 1465 HEX_INS_RX__MINUS_EQ__ASR__RS__RT_, 1466 HEX_INS_RX__MINUS_EQ__LSR__RS__RT_, 1467 HEX_INS_RX__MINUS_EQ__ASL__RS__RT_, 1468 HEX_INS_RX__MINUS_EQ__LSL__RS__RT_, 1469 HEX_INS_RX__PLUS_EQ__ASR__RS__RT_, 1470 HEX_INS_RX__PLUS_EQ__LSR__RS__RT_, 1471 HEX_INS_RX__PLUS_EQ__ASL__RS__RT_, 1472 HEX_INS_RX__PLUS_EQ__LSL__RS__RT_, 1473 HEX_INS_RXX__OR_EQ__ASR__RSS__RT_, 1474 HEX_INS_RXX__OR_EQ__LSR__RSS__RT_, 1475 HEX_INS_RXX__OR_EQ__ASL__RSS__RT_, 1476 HEX_INS_RXX__OR_EQ__LSL__RSS__RT_, 1477 HEX_INS_RXX__AND_EQ__ASR__RSS__RT_, 1478 HEX_INS_RXX__AND_EQ__LSR__RSS__RT_, 1479 HEX_INS_RXX__AND_EQ__ASL__RSS__RT_, 1480 HEX_INS_RXX__AND_EQ__LSL__RSS__RT_, 1481 HEX_INS_RXX____ASR__RSS__RT_, 1482 HEX_INS_RXX____LSR__RSS__RT_, 1483 HEX_INS_RXX____ASL__RSS__RT_, 1484 HEX_INS_RXX____LSL__RSS__RT_, 1485 HEX_INS_RX__OR_EQ__ASR__RS__RT_, 1486 HEX_INS_RX__OR_EQ__LSR__RS__RT_, 1487 HEX_INS_RX__OR_EQ__ASL__RS__RT_, 1488 HEX_INS_RX__OR_EQ__LSL__RS__RT_, 1489 HEX_INS_RX__AND_EQ__ASR__RS__RT_, 1490 HEX_INS_RX__AND_EQ__LSR__RS__RT_, 1491 HEX_INS_RX__AND_EQ__ASL__RS__RT_, 1492 HEX_INS_RX__AND_EQ__LSL__RS__RT_, 1493 HEX_INS_RD___ASR__RS__RT___SAT, 1494 HEX_INS_RD___ASL__RS__RT___SAT, 1495 HEX_INS_RDD___VASRH__RSS___U4_, 1496 HEX_INS_RDD___VLSRH__RSS___U4_, 1497 HEX_INS_RDD___VASLH__RSS___U4_, 1498 HEX_INS_RDD___VASRH__RSS___U4___RAW, 1499 HEX_INS_RD___VASRHUB__RSS___U4___RAW, 1500 HEX_INS_RD___VASRHUB__RSS___U4___SAT, 1501 HEX_INS_RDD___VASRH__RSS__RT_, 1502 HEX_INS_RDD___VLSRH__RSS__RT_, 1503 HEX_INS_RDD___VASLH__RSS__RT_, 1504 HEX_INS_RDD___VLSLH__RSS__RT_, 1505 HEX_INS_RDD___VASRW__RSS___U5_, 1506 HEX_INS_RDD___VLSRW__RSS___U5_, 1507 HEX_INS_RDD___VASLW__RSS___U5_, 1508 HEX_INS_RDD___VASRW__RSS__RT_, 1509 HEX_INS_RDD___VLSRW__RSS__RT_, 1510 HEX_INS_RDD___VASLW__RSS__RT_, 1511 HEX_INS_RDD___VLSLW__RSS__RT_, 1512 HEX_INS_RD___VASRW__RSS___U5_, 1513 HEX_INS_RD___VASRW__RSS__RT_, 1514 HEX_INS_DUPLEX_RD_____1___ALLOCFRAME___U5_3_, 1515 HEX_INS_DUPLEX_RD_____1___DEALLOC_RETURN, 1516 HEX_INS_DUPLEX_RD_____1___DEALLOCFRAME, 1517 HEX_INS_DUPLEX_RD_____1___IF___NOT__P0__DEALLOC_RETURN, 1518 HEX_INS_DUPLEX_RD_____1___IF___NOT__P0__JUMPR_LR, 1519 HEX_INS_DUPLEX_RD_____1___IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1520 HEX_INS_DUPLEX_RD_____1___IF___NOT__P0_NEW__JUMPR_NT_LR, 1521 HEX_INS_DUPLEX_RD_____1___IF__P0__DEALLOC_RETURN, 1522 HEX_INS_DUPLEX_RD_____1___IF__P0__JUMPR_LR, 1523 HEX_INS_DUPLEX_RD_____1___IF__P0_NEW__DEALLOC_RETURN_NT, 1524 HEX_INS_DUPLEX_RD_____1___IF__P0_NEW__JUMPR_NT_LR, 1525 HEX_INS_DUPLEX_RD_____1___JUMPR_LR, 1526 HEX_INS_DUPLEX_RD_____1___MEMB__RS____U4_0_____0, 1527 HEX_INS_DUPLEX_RD_____1___MEMB__RS____U4_0_____1, 1528 HEX_INS_DUPLEX_RD_____1___MEMB__RS____U4_0____RT, 1529 HEX_INS_DUPLEX_RD_____1___MEMD__SP____S6_3____RTT, 1530 HEX_INS_DUPLEX_RD_____1___MEMH__RS____U3_1____RT, 1531 HEX_INS_DUPLEX_RD_____1___MEMW__RS____U4_2_____0, 1532 HEX_INS_DUPLEX_RD_____1___MEMW__RS____U4_2_____1, 1533 HEX_INS_DUPLEX_RD_____1___MEMW__RS____U4_2____RT, 1534 HEX_INS_DUPLEX_RD_____1___MEMW__SP____U5_2____RT, 1535 HEX_INS_DUPLEX_RD____U6___ALLOCFRAME___U5_3_, 1536 HEX_INS_DUPLEX_RD____U6___MEMB__RS____U4_0_____0, 1537 HEX_INS_DUPLEX_RD____U6___MEMB__RS____U4_0_____1, 1538 HEX_INS_DUPLEX_RD____U6___MEMB__RS____U4_0____RT, 1539 HEX_INS_DUPLEX_RD____U6___MEMD__SP____S6_3____RTT, 1540 HEX_INS_DUPLEX_RD____U6___MEMH__RS____U3_1____RT, 1541 HEX_INS_DUPLEX_RD____U6___MEMW__RS____U4_2_____0, 1542 HEX_INS_DUPLEX_RD____U6___MEMW__RS____U4_2_____1, 1543 HEX_INS_DUPLEX_RD____U6___MEMW__RS____U4_2____RT, 1544 HEX_INS_DUPLEX_RD____U6___MEMW__SP____U5_2____RT, 1545 HEX_INS_DUPLEX_RD____U6___P0___CMP_EQ__RS___U2_, 1546 HEX_INS_DUPLEX_RD____U6___RX___ADD__RS__RX_, 1547 HEX_INS_DUPLEX_RD____U6___RX___ADD__RX__RS_, 1548 HEX_INS_DUPLEX_RD____U6___DEALLOC_RETURN, 1549 HEX_INS_DUPLEX_RD____U6___DEALLOCFRAME, 1550 HEX_INS_DUPLEX_RD____U6___IF___NOT__P0__DEALLOC_RETURN, 1551 HEX_INS_DUPLEX_RD____U6___IF___NOT__P0__JUMPR_LR, 1552 HEX_INS_DUPLEX_RD____U6___IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1553 HEX_INS_DUPLEX_RD____U6___IF___NOT__P0_NEW__JUMPR_NT_LR, 1554 HEX_INS_DUPLEX_RD____U6___IF__P0__DEALLOC_RETURN, 1555 HEX_INS_DUPLEX_RD____U6___IF__P0__JUMPR_LR, 1556 HEX_INS_DUPLEX_RD____U6___IF__P0_NEW__DEALLOC_RETURN_NT, 1557 HEX_INS_DUPLEX_RD____U6___IF__P0_NEW__JUMPR_NT_LR, 1558 HEX_INS_DUPLEX_RD____U6___JUMPR_LR, 1559 HEX_INS_DUPLEX_RD___RS___ALLOCFRAME___U5_3_, 1560 HEX_INS_DUPLEX_RD___RS___DEALLOC_RETURN, 1561 HEX_INS_DUPLEX_RD___RS___DEALLOCFRAME, 1562 HEX_INS_DUPLEX_RD___RS___IF___NOT__P0__DEALLOC_RETURN, 1563 HEX_INS_DUPLEX_RD___RS___IF___NOT__P0__JUMPR_LR, 1564 HEX_INS_DUPLEX_RD___RS___IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1565 HEX_INS_DUPLEX_RD___RS___IF___NOT__P0_NEW__JUMPR_NT_LR, 1566 HEX_INS_DUPLEX_RD___RS___IF__P0__DEALLOC_RETURN, 1567 HEX_INS_DUPLEX_RD___RS___IF__P0__JUMPR_LR, 1568 HEX_INS_DUPLEX_RD___RS___IF__P0_NEW__DEALLOC_RETURN_NT, 1569 HEX_INS_DUPLEX_RD___RS___IF__P0_NEW__JUMPR_NT_LR, 1570 HEX_INS_DUPLEX_RD___RS___JUMPR_LR, 1571 HEX_INS_DUPLEX_RD___RS___MEMD__SP____S6_3____RTT, 1572 HEX_INS_DUPLEX_RD___RS___MEMW__SP____U5_2____RT, 1573 HEX_INS_DUPLEX_RD___RU___RX___ADD__RS__RX_, 1574 HEX_INS_DUPLEX_RD___RU___RX___ADD__RX__RS_, 1575 HEX_INS_DUPLEX_RD___RU___MEMB__RS____U4_0_____0, 1576 HEX_INS_DUPLEX_RD___RU___MEMB__RS____U4_0_____1, 1577 HEX_INS_DUPLEX_RD___RU___MEMB__RS____U4_0____RT, 1578 HEX_INS_DUPLEX_RD___RU___MEMH__RS____U3_1____RT, 1579 HEX_INS_DUPLEX_RD___RU___MEMW__RS____U4_2_____0, 1580 HEX_INS_DUPLEX_RD___RU___MEMW__RS____U4_2_____1, 1581 HEX_INS_DUPLEX_RD___RU___MEMW__RS____U4_2____RT, 1582 HEX_INS_DUPLEX_RD___RU___P0___CMP_EQ__RS___U2_, 1583 HEX_INS_DUPLEX_RD___ADD__RS____1____ALLOCFRAME___U5_3_, 1584 HEX_INS_DUPLEX_RD___ADD__RS____1____DEALLOC_RETURN, 1585 HEX_INS_DUPLEX_RD___ADD__RS____1____DEALLOCFRAME, 1586 HEX_INS_DUPLEX_RD___ADD__RS____1____IF___NOT__P0__DEALLOC_RETURN, 1587 HEX_INS_DUPLEX_RD___ADD__RS____1____IF___NOT__P0__JUMPR_LR, 1588 HEX_INS_DUPLEX_RD___ADD__RS____1____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1589 HEX_INS_DUPLEX_RD___ADD__RS____1____IF___NOT__P0_NEW__JUMPR_NT_LR, 1590 HEX_INS_DUPLEX_RD___ADD__RS____1____IF__P0__DEALLOC_RETURN, 1591 HEX_INS_DUPLEX_RD___ADD__RS____1____IF__P0__JUMPR_LR, 1592 HEX_INS_DUPLEX_RD___ADD__RS____1____IF__P0_NEW__DEALLOC_RETURN_NT, 1593 HEX_INS_DUPLEX_RD___ADD__RS____1____IF__P0_NEW__JUMPR_NT_LR, 1594 HEX_INS_DUPLEX_RD___ADD__RS____1____JUMPR_LR, 1595 HEX_INS_DUPLEX_RD___ADD__RS____1____MEMD__SP____S6_3____RTT, 1596 HEX_INS_DUPLEX_RD___ADD__RS____1____MEMW__SP____U5_2____RT, 1597 HEX_INS_DUPLEX_RD___ADD__RS___1____ALLOCFRAME___U5_3_, 1598 HEX_INS_DUPLEX_RD___ADD__RS___1____DEALLOC_RETURN, 1599 HEX_INS_DUPLEX_RD___ADD__RS___1____DEALLOCFRAME, 1600 HEX_INS_DUPLEX_RD___ADD__RS___1____IF___NOT__P0__DEALLOC_RETURN, 1601 HEX_INS_DUPLEX_RD___ADD__RS___1____IF___NOT__P0__JUMPR_LR, 1602 HEX_INS_DUPLEX_RD___ADD__RS___1____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1603 HEX_INS_DUPLEX_RD___ADD__RS___1____IF___NOT__P0_NEW__JUMPR_NT_LR, 1604 HEX_INS_DUPLEX_RD___ADD__RS___1____IF__P0__DEALLOC_RETURN, 1605 HEX_INS_DUPLEX_RD___ADD__RS___1____IF__P0__JUMPR_LR, 1606 HEX_INS_DUPLEX_RD___ADD__RS___1____IF__P0_NEW__DEALLOC_RETURN_NT, 1607 HEX_INS_DUPLEX_RD___ADD__RS___1____IF__P0_NEW__JUMPR_NT_LR, 1608 HEX_INS_DUPLEX_RD___ADD__RS___1____JUMPR_LR, 1609 HEX_INS_DUPLEX_RD___ADD__RS___1____MEMD__SP____S6_3____RTT, 1610 HEX_INS_DUPLEX_RD___ADD__RS___1____MEMW__SP____U5_2____RT, 1611 HEX_INS_DUPLEX_RD___ADD__RU____1____RX___ADD__RS__RX_, 1612 HEX_INS_DUPLEX_RD___ADD__RU____1____RX___ADD__RX__RS_, 1613 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMB__RS____U4_0_____0, 1614 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMB__RS____U4_0_____1, 1615 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMB__RS____U4_0____RT, 1616 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMH__RS____U3_1____RT, 1617 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMW__RS____U4_2_____0, 1618 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMW__RS____U4_2_____1, 1619 HEX_INS_DUPLEX_RD___ADD__RU____1____MEMW__RS____U4_2____RT, 1620 HEX_INS_DUPLEX_RD___ADD__RU____1____P0___CMP_EQ__RS___U2_, 1621 HEX_INS_DUPLEX_RD___ADD__RU___1____RX___ADD__RS__RX_, 1622 HEX_INS_DUPLEX_RD___ADD__RU___1____RX___ADD__RX__RS_, 1623 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMB__RS____U4_0_____0, 1624 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMB__RS____U4_0_____1, 1625 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMB__RS____U4_0____RT, 1626 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMH__RS____U3_1____RT, 1627 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMW__RS____U4_2_____0, 1628 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMW__RS____U4_2_____1, 1629 HEX_INS_DUPLEX_RD___ADD__RU___1____MEMW__RS____U4_2____RT, 1630 HEX_INS_DUPLEX_RD___ADD__RU___1____P0___CMP_EQ__RS___U2_, 1631 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____ALLOCFRAME___U5_3_, 1632 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMB__RS____U4_0_____0, 1633 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMB__RS____U4_0_____1, 1634 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMB__RS____U4_0____RT, 1635 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMD__SP____S6_3____RTT, 1636 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMH__RS____U3_1____RT, 1637 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMW__RS____U4_2_____0, 1638 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMW__RS____U4_2_____1, 1639 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMW__RS____U4_2____RT, 1640 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____MEMW__SP____U5_2____RT, 1641 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____P0___CMP_EQ__RS___U2_, 1642 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____RX___ADD__RS__RX_, 1643 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____RX___ADD__RX__RS_, 1644 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____DEALLOC_RETURN, 1645 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____DEALLOCFRAME, 1646 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF___NOT__P0__DEALLOC_RETURN, 1647 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF___NOT__P0__JUMPR_LR, 1648 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1649 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF___NOT__P0_NEW__JUMPR_NT_LR, 1650 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF__P0__DEALLOC_RETURN, 1651 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF__P0__JUMPR_LR, 1652 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF__P0_NEW__DEALLOC_RETURN_NT, 1653 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____IF__P0_NEW__JUMPR_NT_LR, 1654 HEX_INS_DUPLEX_RD___ADD__SP___U6_2____JUMPR_LR, 1655 HEX_INS_DUPLEX_RD___AND__RS___1____ALLOCFRAME___U5_3_, 1656 HEX_INS_DUPLEX_RD___AND__RS___1____DEALLOC_RETURN, 1657 HEX_INS_DUPLEX_RD___AND__RS___1____DEALLOCFRAME, 1658 HEX_INS_DUPLEX_RD___AND__RS___1____IF___NOT__P0__DEALLOC_RETURN, 1659 HEX_INS_DUPLEX_RD___AND__RS___1____IF___NOT__P0__JUMPR_LR, 1660 HEX_INS_DUPLEX_RD___AND__RS___1____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1661 HEX_INS_DUPLEX_RD___AND__RS___1____IF___NOT__P0_NEW__JUMPR_NT_LR, 1662 HEX_INS_DUPLEX_RD___AND__RS___1____IF__P0__DEALLOC_RETURN, 1663 HEX_INS_DUPLEX_RD___AND__RS___1____IF__P0__JUMPR_LR, 1664 HEX_INS_DUPLEX_RD___AND__RS___1____IF__P0_NEW__DEALLOC_RETURN_NT, 1665 HEX_INS_DUPLEX_RD___AND__RS___1____IF__P0_NEW__JUMPR_NT_LR, 1666 HEX_INS_DUPLEX_RD___AND__RS___1____JUMPR_LR, 1667 HEX_INS_DUPLEX_RD___AND__RS___1____MEMD__SP____S6_3____RTT, 1668 HEX_INS_DUPLEX_RD___AND__RS___1____MEMW__SP____U5_2____RT, 1669 HEX_INS_DUPLEX_RD___AND__RS___255____ALLOCFRAME___U5_3_, 1670 HEX_INS_DUPLEX_RD___AND__RS___255____DEALLOC_RETURN, 1671 HEX_INS_DUPLEX_RD___AND__RS___255____DEALLOCFRAME, 1672 HEX_INS_DUPLEX_RD___AND__RS___255____IF___NOT__P0__DEALLOC_RETURN, 1673 HEX_INS_DUPLEX_RD___AND__RS___255____IF___NOT__P0__JUMPR_LR, 1674 HEX_INS_DUPLEX_RD___AND__RS___255____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1675 HEX_INS_DUPLEX_RD___AND__RS___255____IF___NOT__P0_NEW__JUMPR_NT_LR, 1676 HEX_INS_DUPLEX_RD___AND__RS___255____IF__P0__DEALLOC_RETURN, 1677 HEX_INS_DUPLEX_RD___AND__RS___255____IF__P0__JUMPR_LR, 1678 HEX_INS_DUPLEX_RD___AND__RS___255____IF__P0_NEW__DEALLOC_RETURN_NT, 1679 HEX_INS_DUPLEX_RD___AND__RS___255____IF__P0_NEW__JUMPR_NT_LR, 1680 HEX_INS_DUPLEX_RD___AND__RS___255____JUMPR_LR, 1681 HEX_INS_DUPLEX_RD___AND__RS___255____MEMD__SP____S6_3____RTT, 1682 HEX_INS_DUPLEX_RD___AND__RS___255____MEMW__SP____U5_2____RT, 1683 HEX_INS_DUPLEX_RD___AND__RU___1____RX___ADD__RS__RX_, 1684 HEX_INS_DUPLEX_RD___AND__RU___1____RX___ADD__RX__RS_, 1685 HEX_INS_DUPLEX_RD___AND__RU___1____MEMB__RS____U4_0_____0, 1686 HEX_INS_DUPLEX_RD___AND__RU___1____MEMB__RS____U4_0_____1, 1687 HEX_INS_DUPLEX_RD___AND__RU___1____MEMB__RS____U4_0____RT, 1688 HEX_INS_DUPLEX_RD___AND__RU___1____MEMH__RS____U3_1____RT, 1689 HEX_INS_DUPLEX_RD___AND__RU___1____MEMW__RS____U4_2_____0, 1690 HEX_INS_DUPLEX_RD___AND__RU___1____MEMW__RS____U4_2_____1, 1691 HEX_INS_DUPLEX_RD___AND__RU___1____MEMW__RS____U4_2____RT, 1692 HEX_INS_DUPLEX_RD___AND__RU___1____P0___CMP_EQ__RS___U2_, 1693 HEX_INS_DUPLEX_RD___AND__RU___255____RX___ADD__RS__RX_, 1694 HEX_INS_DUPLEX_RD___AND__RU___255____RX___ADD__RX__RS_, 1695 HEX_INS_DUPLEX_RD___AND__RU___255____MEMB__RS____U4_0_____0, 1696 HEX_INS_DUPLEX_RD___AND__RU___255____MEMB__RS____U4_0_____1, 1697 HEX_INS_DUPLEX_RD___AND__RU___255____MEMB__RS____U4_0____RT, 1698 HEX_INS_DUPLEX_RD___AND__RU___255____MEMH__RS____U3_1____RT, 1699 HEX_INS_DUPLEX_RD___AND__RU___255____MEMW__RS____U4_2_____0, 1700 HEX_INS_DUPLEX_RD___AND__RU___255____MEMW__RS____U4_2_____1, 1701 HEX_INS_DUPLEX_RD___AND__RU___255____MEMW__RS____U4_2____RT, 1702 HEX_INS_DUPLEX_RD___AND__RU___255____P0___CMP_EQ__RS___U2_, 1703 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____ALLOCFRAME___U5_3_, 1704 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____MEMD__SP____S6_3____RTT, 1705 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____MEMW__SP____U5_2____RT, 1706 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____DEALLOC_RETURN, 1707 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____DEALLOCFRAME, 1708 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF___NOT__P0__DEALLOC_RETURN, 1709 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF___NOT__P0__JUMPR_LR, 1710 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1711 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF___NOT__P0_NEW__JUMPR_NT_LR, 1712 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF__P0__DEALLOC_RETURN, 1713 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF__P0__JUMPR_LR, 1714 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF__P0_NEW__DEALLOC_RETURN_NT, 1715 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____IF__P0_NEW__JUMPR_NT_LR, 1716 HEX_INS_DUPLEX_RD___MEMB__RS____U3_0____JUMPR_LR, 1717 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMB__RS____U4_0_____0, 1718 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMB__RS____U4_0_____1, 1719 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMB__RS____U4_0____RT, 1720 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMH__RS____U3_1____RT, 1721 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMW__RS____U4_2_____0, 1722 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMW__RS____U4_2_____1, 1723 HEX_INS_DUPLEX_RD___MEMB__RU____U3_0____MEMW__RS____U4_2____RT, 1724 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____ALLOCFRAME___U5_3_, 1725 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____MEMD__SP____S6_3____RTT, 1726 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____MEMW__SP____U5_2____RT, 1727 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____DEALLOC_RETURN, 1728 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____DEALLOCFRAME, 1729 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF___NOT__P0__DEALLOC_RETURN, 1730 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF___NOT__P0__JUMPR_LR, 1731 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1732 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF___NOT__P0_NEW__JUMPR_NT_LR, 1733 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF__P0__DEALLOC_RETURN, 1734 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF__P0__JUMPR_LR, 1735 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF__P0_NEW__DEALLOC_RETURN_NT, 1736 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____IF__P0_NEW__JUMPR_NT_LR, 1737 HEX_INS_DUPLEX_RD___MEMH__RS____U3_1____JUMPR_LR, 1738 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMB__RS____U4_0_____0, 1739 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMB__RS____U4_0_____1, 1740 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMB__RS____U4_0____RT, 1741 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMH__RS____U3_1____RT, 1742 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMW__RS____U4_2_____0, 1743 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMW__RS____U4_2_____1, 1744 HEX_INS_DUPLEX_RD___MEMH__RU____U3_1____MEMW__RS____U4_2____RT, 1745 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____ALLOCFRAME___U5_3_, 1746 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____MEMD__SP____S6_3____RTT, 1747 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____MEMW__SP____U5_2____RT, 1748 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____DEALLOC_RETURN, 1749 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____DEALLOCFRAME, 1750 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF___NOT__P0__DEALLOC_RETURN, 1751 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF___NOT__P0__JUMPR_LR, 1752 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1753 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF___NOT__P0_NEW__JUMPR_NT_LR, 1754 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF__P0__DEALLOC_RETURN, 1755 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF__P0__JUMPR_LR, 1756 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF__P0_NEW__DEALLOC_RETURN_NT, 1757 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____IF__P0_NEW__JUMPR_NT_LR, 1758 HEX_INS_DUPLEX_RD___MEMUB__RS____U4_0____JUMPR_LR, 1759 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMB__RS____U4_0_____0, 1760 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMB__RS____U4_0_____1, 1761 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMB__RS____U4_0____RT, 1762 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMH__RS____U3_1____RT, 1763 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMW__RS____U4_2_____0, 1764 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMW__RS____U4_2_____1, 1765 HEX_INS_DUPLEX_RD___MEMUB__RU____U4_0____MEMW__RS____U4_2____RT, 1766 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____ALLOCFRAME___U5_3_, 1767 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____MEMD__SP____S6_3____RTT, 1768 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____MEMW__SP____U5_2____RT, 1769 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____DEALLOC_RETURN, 1770 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____DEALLOCFRAME, 1771 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF___NOT__P0__DEALLOC_RETURN, 1772 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF___NOT__P0__JUMPR_LR, 1773 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1774 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF___NOT__P0_NEW__JUMPR_NT_LR, 1775 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF__P0__DEALLOC_RETURN, 1776 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF__P0__JUMPR_LR, 1777 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF__P0_NEW__DEALLOC_RETURN_NT, 1778 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____IF__P0_NEW__JUMPR_NT_LR, 1779 HEX_INS_DUPLEX_RD___MEMUH__RS____U3_1____JUMPR_LR, 1780 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMB__RS____U4_0_____0, 1781 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMB__RS____U4_0_____1, 1782 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMB__RS____U4_0____RT, 1783 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMH__RS____U3_1____RT, 1784 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMW__RS____U4_2_____0, 1785 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMW__RS____U4_2_____1, 1786 HEX_INS_DUPLEX_RD___MEMUH__RU____U3_1____MEMW__RS____U4_2____RT, 1787 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____ALLOCFRAME___U5_3_, 1788 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____MEMD__SP____S6_3____RTT, 1789 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____MEMW__SP____U5_2____RT, 1790 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____DEALLOC_RETURN, 1791 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____DEALLOCFRAME, 1792 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF___NOT__P0__DEALLOC_RETURN, 1793 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF___NOT__P0__JUMPR_LR, 1794 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1795 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF___NOT__P0_NEW__JUMPR_NT_LR, 1796 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF__P0__DEALLOC_RETURN, 1797 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF__P0__JUMPR_LR, 1798 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF__P0_NEW__DEALLOC_RETURN_NT, 1799 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____IF__P0_NEW__JUMPR_NT_LR, 1800 HEX_INS_DUPLEX_RD___MEMW__RS____U4_2____JUMPR_LR, 1801 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMB__RS____U4_0_____0, 1802 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMB__RS____U4_0_____1, 1803 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMB__RS____U4_0____RT, 1804 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMH__RS____U3_1____RT, 1805 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMW__RS____U4_2_____0, 1806 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMW__RS____U4_2_____1, 1807 HEX_INS_DUPLEX_RD___MEMW__RU____U4_2____MEMW__RS____U4_2____RT, 1808 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____ALLOCFRAME___U5_3_, 1809 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMB__RS____U4_0_____0, 1810 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMB__RS____U4_0_____1, 1811 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMB__RS____U4_0____RT, 1812 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMD__SP____S6_3____RTT, 1813 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMH__RS____U3_1____RT, 1814 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMW__RS____U4_2_____0, 1815 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMW__RS____U4_2_____1, 1816 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMW__RS____U4_2____RT, 1817 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____MEMW__SP____U5_2____RT, 1818 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____DEALLOC_RETURN, 1819 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____DEALLOCFRAME, 1820 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF___NOT__P0__DEALLOC_RETURN, 1821 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF___NOT__P0__JUMPR_LR, 1822 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1823 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF___NOT__P0_NEW__JUMPR_NT_LR, 1824 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF__P0__DEALLOC_RETURN, 1825 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF__P0__JUMPR_LR, 1826 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF__P0_NEW__DEALLOC_RETURN_NT, 1827 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____IF__P0_NEW__JUMPR_NT_LR, 1828 HEX_INS_DUPLEX_RD___MEMW__SP____U5_2____JUMPR_LR, 1829 HEX_INS_DUPLEX_RD___SXTB__RS____ALLOCFRAME___U5_3_, 1830 HEX_INS_DUPLEX_RD___SXTB__RS____DEALLOC_RETURN, 1831 HEX_INS_DUPLEX_RD___SXTB__RS____DEALLOCFRAME, 1832 HEX_INS_DUPLEX_RD___SXTB__RS____IF___NOT__P0__DEALLOC_RETURN, 1833 HEX_INS_DUPLEX_RD___SXTB__RS____IF___NOT__P0__JUMPR_LR, 1834 HEX_INS_DUPLEX_RD___SXTB__RS____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1835 HEX_INS_DUPLEX_RD___SXTB__RS____IF___NOT__P0_NEW__JUMPR_NT_LR, 1836 HEX_INS_DUPLEX_RD___SXTB__RS____IF__P0__DEALLOC_RETURN, 1837 HEX_INS_DUPLEX_RD___SXTB__RS____IF__P0__JUMPR_LR, 1838 HEX_INS_DUPLEX_RD___SXTB__RS____IF__P0_NEW__DEALLOC_RETURN_NT, 1839 HEX_INS_DUPLEX_RD___SXTB__RS____IF__P0_NEW__JUMPR_NT_LR, 1840 HEX_INS_DUPLEX_RD___SXTB__RS____JUMPR_LR, 1841 HEX_INS_DUPLEX_RD___SXTB__RS____MEMD__SP____S6_3____RTT, 1842 HEX_INS_DUPLEX_RD___SXTB__RS____MEMW__SP____U5_2____RT, 1843 HEX_INS_DUPLEX_RD___SXTB__RU____RX___ADD__RS__RX_, 1844 HEX_INS_DUPLEX_RD___SXTB__RU____RX___ADD__RX__RS_, 1845 HEX_INS_DUPLEX_RD___SXTB__RU____MEMB__RS____U4_0_____0, 1846 HEX_INS_DUPLEX_RD___SXTB__RU____MEMB__RS____U4_0_____1, 1847 HEX_INS_DUPLEX_RD___SXTB__RU____MEMB__RS____U4_0____RT, 1848 HEX_INS_DUPLEX_RD___SXTB__RU____MEMH__RS____U3_1____RT, 1849 HEX_INS_DUPLEX_RD___SXTB__RU____MEMW__RS____U4_2_____0, 1850 HEX_INS_DUPLEX_RD___SXTB__RU____MEMW__RS____U4_2_____1, 1851 HEX_INS_DUPLEX_RD___SXTB__RU____MEMW__RS____U4_2____RT, 1852 HEX_INS_DUPLEX_RD___SXTB__RU____P0___CMP_EQ__RS___U2_, 1853 HEX_INS_DUPLEX_RD___SXTH__RS____ALLOCFRAME___U5_3_, 1854 HEX_INS_DUPLEX_RD___SXTH__RS____DEALLOC_RETURN, 1855 HEX_INS_DUPLEX_RD___SXTH__RS____DEALLOCFRAME, 1856 HEX_INS_DUPLEX_RD___SXTH__RS____IF___NOT__P0__DEALLOC_RETURN, 1857 HEX_INS_DUPLEX_RD___SXTH__RS____IF___NOT__P0__JUMPR_LR, 1858 HEX_INS_DUPLEX_RD___SXTH__RS____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1859 HEX_INS_DUPLEX_RD___SXTH__RS____IF___NOT__P0_NEW__JUMPR_NT_LR, 1860 HEX_INS_DUPLEX_RD___SXTH__RS____IF__P0__DEALLOC_RETURN, 1861 HEX_INS_DUPLEX_RD___SXTH__RS____IF__P0__JUMPR_LR, 1862 HEX_INS_DUPLEX_RD___SXTH__RS____IF__P0_NEW__DEALLOC_RETURN_NT, 1863 HEX_INS_DUPLEX_RD___SXTH__RS____IF__P0_NEW__JUMPR_NT_LR, 1864 HEX_INS_DUPLEX_RD___SXTH__RS____JUMPR_LR, 1865 HEX_INS_DUPLEX_RD___SXTH__RS____MEMD__SP____S6_3____RTT, 1866 HEX_INS_DUPLEX_RD___SXTH__RS____MEMW__SP____U5_2____RT, 1867 HEX_INS_DUPLEX_RD___SXTH__RU____RX___ADD__RS__RX_, 1868 HEX_INS_DUPLEX_RD___SXTH__RU____RX___ADD__RX__RS_, 1869 HEX_INS_DUPLEX_RD___SXTH__RU____MEMB__RS____U4_0_____0, 1870 HEX_INS_DUPLEX_RD___SXTH__RU____MEMB__RS____U4_0_____1, 1871 HEX_INS_DUPLEX_RD___SXTH__RU____MEMB__RS____U4_0____RT, 1872 HEX_INS_DUPLEX_RD___SXTH__RU____MEMH__RS____U3_1____RT, 1873 HEX_INS_DUPLEX_RD___SXTH__RU____MEMW__RS____U4_2_____0, 1874 HEX_INS_DUPLEX_RD___SXTH__RU____MEMW__RS____U4_2_____1, 1875 HEX_INS_DUPLEX_RD___SXTH__RU____MEMW__RS____U4_2____RT, 1876 HEX_INS_DUPLEX_RD___SXTH__RU____P0___CMP_EQ__RS___U2_, 1877 HEX_INS_DUPLEX_RD___ZXTH__RS____ALLOCFRAME___U5_3_, 1878 HEX_INS_DUPLEX_RD___ZXTH__RS____DEALLOC_RETURN, 1879 HEX_INS_DUPLEX_RD___ZXTH__RS____DEALLOCFRAME, 1880 HEX_INS_DUPLEX_RD___ZXTH__RS____IF___NOT__P0__DEALLOC_RETURN, 1881 HEX_INS_DUPLEX_RD___ZXTH__RS____IF___NOT__P0__JUMPR_LR, 1882 HEX_INS_DUPLEX_RD___ZXTH__RS____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1883 HEX_INS_DUPLEX_RD___ZXTH__RS____IF___NOT__P0_NEW__JUMPR_NT_LR, 1884 HEX_INS_DUPLEX_RD___ZXTH__RS____IF__P0__DEALLOC_RETURN, 1885 HEX_INS_DUPLEX_RD___ZXTH__RS____IF__P0__JUMPR_LR, 1886 HEX_INS_DUPLEX_RD___ZXTH__RS____IF__P0_NEW__DEALLOC_RETURN_NT, 1887 HEX_INS_DUPLEX_RD___ZXTH__RS____IF__P0_NEW__JUMPR_NT_LR, 1888 HEX_INS_DUPLEX_RD___ZXTH__RS____JUMPR_LR, 1889 HEX_INS_DUPLEX_RD___ZXTH__RS____MEMD__SP____S6_3____RTT, 1890 HEX_INS_DUPLEX_RD___ZXTH__RS____MEMW__SP____U5_2____RT, 1891 HEX_INS_DUPLEX_RD___ZXTH__RU____RX___ADD__RS__RX_, 1892 HEX_INS_DUPLEX_RD___ZXTH__RU____RX___ADD__RX__RS_, 1893 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMB__RS____U4_0_____0, 1894 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMB__RS____U4_0_____1, 1895 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMB__RS____U4_0____RT, 1896 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMH__RS____U3_1____RT, 1897 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMW__RS____U4_2_____0, 1898 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMW__RS____U4_2_____1, 1899 HEX_INS_DUPLEX_RD___ZXTH__RU____MEMW__RS____U4_2____RT, 1900 HEX_INS_DUPLEX_RD___ZXTH__RU____P0___CMP_EQ__RS___U2_, 1901 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____ALLOCFRAME___U5_3_, 1902 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMB__RS____U4_0_____0, 1903 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMB__RS____U4_0_____1, 1904 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMB__RS____U4_0____RT, 1905 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMD__SP____S6_3____RTT, 1906 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMH__RS____U3_1____RT, 1907 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMW__RS____U4_2_____0, 1908 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMW__RS____U4_2_____1, 1909 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMW__RS____U4_2____RT, 1910 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____MEMW__SP____U5_2____RT, 1911 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____DEALLOC_RETURN, 1912 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____DEALLOCFRAME, 1913 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF___NOT__P0__DEALLOC_RETURN, 1914 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF___NOT__P0__JUMPR_LR, 1915 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1916 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF___NOT__P0_NEW__JUMPR_NT_LR, 1917 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF__P0__DEALLOC_RETURN, 1918 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF__P0__JUMPR_LR, 1919 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF__P0_NEW__DEALLOC_RETURN_NT, 1920 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____IF__P0_NEW__JUMPR_NT_LR, 1921 HEX_INS_DUPLEX_RDD___COMBINE___0___U2____JUMPR_LR, 1922 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____ALLOCFRAME___U5_3_, 1923 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____DEALLOC_RETURN, 1924 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____DEALLOCFRAME, 1925 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF___NOT__P0__DEALLOC_RETURN, 1926 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF___NOT__P0__JUMPR_LR, 1927 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1928 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF___NOT__P0_NEW__JUMPR_NT_LR, 1929 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF__P0__DEALLOC_RETURN, 1930 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF__P0__JUMPR_LR, 1931 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF__P0_NEW__DEALLOC_RETURN_NT, 1932 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____IF__P0_NEW__JUMPR_NT_LR, 1933 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____JUMPR_LR, 1934 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____MEMD__SP____S6_3____RTT, 1935 HEX_INS_DUPLEX_RDD___COMBINE___0__RS____MEMW__SP____U5_2____RT, 1936 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMB__RS____U4_0_____0, 1937 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMB__RS____U4_0_____1, 1938 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMB__RS____U4_0____RT, 1939 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMH__RS____U3_1____RT, 1940 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMW__RS____U4_2_____0, 1941 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMW__RS____U4_2_____1, 1942 HEX_INS_DUPLEX_RDD___COMBINE___0__RU____MEMW__RS____U4_2____RT, 1943 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____ALLOCFRAME___U5_3_, 1944 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMB__RS____U4_0_____0, 1945 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMB__RS____U4_0_____1, 1946 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMB__RS____U4_0____RT, 1947 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMD__SP____S6_3____RTT, 1948 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMH__RS____U3_1____RT, 1949 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMW__RS____U4_2_____0, 1950 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMW__RS____U4_2_____1, 1951 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMW__RS____U4_2____RT, 1952 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____MEMW__SP____U5_2____RT, 1953 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____DEALLOC_RETURN, 1954 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____DEALLOCFRAME, 1955 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF___NOT__P0__DEALLOC_RETURN, 1956 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF___NOT__P0__JUMPR_LR, 1957 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1958 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF___NOT__P0_NEW__JUMPR_NT_LR, 1959 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF__P0__DEALLOC_RETURN, 1960 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF__P0__JUMPR_LR, 1961 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF__P0_NEW__DEALLOC_RETURN_NT, 1962 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____IF__P0_NEW__JUMPR_NT_LR, 1963 HEX_INS_DUPLEX_RDD___COMBINE___1___U2____JUMPR_LR, 1964 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____ALLOCFRAME___U5_3_, 1965 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMB__RS____U4_0_____0, 1966 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMB__RS____U4_0_____1, 1967 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMB__RS____U4_0____RT, 1968 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMD__SP____S6_3____RTT, 1969 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMH__RS____U3_1____RT, 1970 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMW__RS____U4_2_____0, 1971 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMW__RS____U4_2_____1, 1972 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMW__RS____U4_2____RT, 1973 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____MEMW__SP____U5_2____RT, 1974 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____DEALLOC_RETURN, 1975 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____DEALLOCFRAME, 1976 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF___NOT__P0__DEALLOC_RETURN, 1977 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF___NOT__P0__JUMPR_LR, 1978 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 1979 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF___NOT__P0_NEW__JUMPR_NT_LR, 1980 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF__P0__DEALLOC_RETURN, 1981 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF__P0__JUMPR_LR, 1982 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF__P0_NEW__DEALLOC_RETURN_NT, 1983 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____IF__P0_NEW__JUMPR_NT_LR, 1984 HEX_INS_DUPLEX_RDD___COMBINE___2___U2____JUMPR_LR, 1985 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____ALLOCFRAME___U5_3_, 1986 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMB__RS____U4_0_____0, 1987 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMB__RS____U4_0_____1, 1988 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMB__RS____U4_0____RT, 1989 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMD__SP____S6_3____RTT, 1990 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMH__RS____U3_1____RT, 1991 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMW__RS____U4_2_____0, 1992 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMW__RS____U4_2_____1, 1993 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMW__RS____U4_2____RT, 1994 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____MEMW__SP____U5_2____RT, 1995 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____DEALLOC_RETURN, 1996 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____DEALLOCFRAME, 1997 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF___NOT__P0__DEALLOC_RETURN, 1998 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF___NOT__P0__JUMPR_LR, 1999 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 2000 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF___NOT__P0_NEW__JUMPR_NT_LR, 2001 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF__P0__DEALLOC_RETURN, 2002 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF__P0__JUMPR_LR, 2003 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF__P0_NEW__DEALLOC_RETURN_NT, 2004 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____IF__P0_NEW__JUMPR_NT_LR, 2005 HEX_INS_DUPLEX_RDD___COMBINE___3___U2____JUMPR_LR, 2006 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____ALLOCFRAME___U5_3_, 2007 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____DEALLOC_RETURN, 2008 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____DEALLOCFRAME, 2009 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF___NOT__P0__DEALLOC_RETURN, 2010 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF___NOT__P0__JUMPR_LR, 2011 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 2012 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF___NOT__P0_NEW__JUMPR_NT_LR, 2013 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF__P0__DEALLOC_RETURN, 2014 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF__P0__JUMPR_LR, 2015 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF__P0_NEW__DEALLOC_RETURN_NT, 2016 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____IF__P0_NEW__JUMPR_NT_LR, 2017 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____JUMPR_LR, 2018 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____MEMD__SP____S6_3____RTT, 2019 HEX_INS_DUPLEX_RDD___COMBINE__RS___0____MEMW__SP____U5_2____RT, 2020 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMB__RS____U4_0_____0, 2021 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMB__RS____U4_0_____1, 2022 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMB__RS____U4_0____RT, 2023 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMH__RS____U3_1____RT, 2024 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMW__RS____U4_2_____0, 2025 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMW__RS____U4_2_____1, 2026 HEX_INS_DUPLEX_RDD___COMBINE__RU___0____MEMW__RS____U4_2____RT, 2027 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____ALLOCFRAME___U5_3_, 2028 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMB__RS____U4_0_____0, 2029 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMB__RS____U4_0_____1, 2030 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMB__RS____U4_0____RT, 2031 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMD__SP____S6_3____RTT, 2032 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMH__RS____U3_1____RT, 2033 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMW__RS____U4_2_____0, 2034 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMW__RS____U4_2_____1, 2035 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMW__RS____U4_2____RT, 2036 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____MEMW__SP____U5_2____RT, 2037 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____DEALLOC_RETURN, 2038 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____DEALLOCFRAME, 2039 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF___NOT__P0__DEALLOC_RETURN, 2040 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF___NOT__P0__JUMPR_LR, 2041 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 2042 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF___NOT__P0_NEW__JUMPR_NT_LR, 2043 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF__P0__DEALLOC_RETURN, 2044 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF__P0__JUMPR_LR, 2045 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF__P0_NEW__DEALLOC_RETURN_NT, 2046 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____IF__P0_NEW__JUMPR_NT_LR, 2047 HEX_INS_DUPLEX_RDD___MEMD__SP____U5_3____JUMPR_LR, 2048 HEX_INS_DUPLEX_RE_____1___RD_____1, 2049 HEX_INS_DUPLEX_RE_____1___RD___MEMB__RS____U3_0_, 2050 HEX_INS_DUPLEX_RE_____1___RD___MEMH__RS____U3_1_, 2051 HEX_INS_DUPLEX_RE_____1___RD___MEMUB__RS____U4_0_, 2052 HEX_INS_DUPLEX_RE_____1___RD___MEMUH__RS____U3_1_, 2053 HEX_INS_DUPLEX_RE_____1___RD___MEMW__RS____U4_2_, 2054 HEX_INS_DUPLEX_RE_____1___RD___MEMW__SP____U5_2_, 2055 HEX_INS_DUPLEX_RE_____1___RDD___COMBINE___0___U2_, 2056 HEX_INS_DUPLEX_RE_____1___RDD___COMBINE___0__RS_, 2057 HEX_INS_DUPLEX_RE_____1___RDD___COMBINE___1___U2_, 2058 HEX_INS_DUPLEX_RE_____1___RDD___COMBINE___2___U2_, 2059 HEX_INS_DUPLEX_RE_____1___RDD___COMBINE___3___U2_, 2060 HEX_INS_DUPLEX_RE_____1___RDD___COMBINE__RS___0_, 2061 HEX_INS_DUPLEX_RE_____1___RDD___MEMD__SP____U5_3_, 2062 HEX_INS_DUPLEX_RE_____1___IF___NOT__P0__RD____0, 2063 HEX_INS_DUPLEX_RE_____1___IF___NOT__P0_NEW__RD____0, 2064 HEX_INS_DUPLEX_RE_____1___IF__P0__RD____0, 2065 HEX_INS_DUPLEX_RE_____1___IF__P0_NEW__RD____0, 2066 HEX_INS_DUPLEX_RE____U6___RD_____1, 2067 HEX_INS_DUPLEX_RE____U6___RD____U6, 2068 HEX_INS_DUPLEX_RE____U6___RD___ADD__RS____1_, 2069 HEX_INS_DUPLEX_RE____U6___RD___ADD__RS___1_, 2070 HEX_INS_DUPLEX_RE____U6___RD___ADD__SP___U6_2_, 2071 HEX_INS_DUPLEX_RE____U6___RD___AND__RS___1_, 2072 HEX_INS_DUPLEX_RE____U6___RD___AND__RS___255_, 2073 HEX_INS_DUPLEX_RE____U6___RD___MEMB__RS____U3_0_, 2074 HEX_INS_DUPLEX_RE____U6___RD___MEMH__RS____U3_1_, 2075 HEX_INS_DUPLEX_RE____U6___RD___MEMUB__RS____U4_0_, 2076 HEX_INS_DUPLEX_RE____U6___RD___MEMUH__RS____U3_1_, 2077 HEX_INS_DUPLEX_RE____U6___RD___MEMW__RS____U4_2_, 2078 HEX_INS_DUPLEX_RE____U6___RD___MEMW__SP____U5_2_, 2079 HEX_INS_DUPLEX_RE____U6___RDD___COMBINE___0___U2_, 2080 HEX_INS_DUPLEX_RE____U6___RDD___COMBINE___0__RS_, 2081 HEX_INS_DUPLEX_RE____U6___RDD___COMBINE___1___U2_, 2082 HEX_INS_DUPLEX_RE____U6___RDD___COMBINE___2___U2_, 2083 HEX_INS_DUPLEX_RE____U6___RDD___COMBINE___3___U2_, 2084 HEX_INS_DUPLEX_RE____U6___RDD___COMBINE__RS___0_, 2085 HEX_INS_DUPLEX_RE____U6___RDD___MEMD__SP____U5_3_, 2086 HEX_INS_DUPLEX_RE____U6___IF___NOT__P0__RD____0, 2087 HEX_INS_DUPLEX_RE____U6___IF___NOT__P0_NEW__RD____0, 2088 HEX_INS_DUPLEX_RE____U6___IF__P0__RD____0, 2089 HEX_INS_DUPLEX_RE____U6___IF__P0_NEW__RD____0, 2090 HEX_INS_DUPLEX_RE____U6___RD___RS, 2091 HEX_INS_DUPLEX_RE____U6___RD___SXTB__RS_, 2092 HEX_INS_DUPLEX_RE____U6___RD___SXTH__RS_, 2093 HEX_INS_DUPLEX_RE____U6___RD___ZXTH__RS_, 2094 HEX_INS_DUPLEX_RE___RS___RD_____1, 2095 HEX_INS_DUPLEX_RE___RS___RD___MEMW__SP____U5_2_, 2096 HEX_INS_DUPLEX_RE___RS___RDD___COMBINE___0___U2_, 2097 HEX_INS_DUPLEX_RE___RS___RDD___COMBINE___1___U2_, 2098 HEX_INS_DUPLEX_RE___RS___RDD___COMBINE___2___U2_, 2099 HEX_INS_DUPLEX_RE___RS___RDD___COMBINE___3___U2_, 2100 HEX_INS_DUPLEX_RE___RS___RDD___MEMD__SP____U5_3_, 2101 HEX_INS_DUPLEX_RE___RS___IF___NOT__P0__RD____0, 2102 HEX_INS_DUPLEX_RE___RS___IF___NOT__P0_NEW__RD____0, 2103 HEX_INS_DUPLEX_RE___RS___IF__P0__RD____0, 2104 HEX_INS_DUPLEX_RE___RS___IF__P0_NEW__RD____0, 2105 HEX_INS_DUPLEX_RE___RU___RD___RS, 2106 HEX_INS_DUPLEX_RE___RU___RD___ADD__RS____1_, 2107 HEX_INS_DUPLEX_RE___RU___RD___ADD__RS___1_, 2108 HEX_INS_DUPLEX_RE___RU___RD___AND__RS___1_, 2109 HEX_INS_DUPLEX_RE___RU___RD___AND__RS___255_, 2110 HEX_INS_DUPLEX_RE___RU___RD___MEMB__RS____U3_0_, 2111 HEX_INS_DUPLEX_RE___RU___RD___MEMH__RS____U3_1_, 2112 HEX_INS_DUPLEX_RE___RU___RD___MEMUB__RS____U4_0_, 2113 HEX_INS_DUPLEX_RE___RU___RD___MEMUH__RS____U3_1_, 2114 HEX_INS_DUPLEX_RE___RU___RD___MEMW__RS____U4_2_, 2115 HEX_INS_DUPLEX_RE___RU___RD___SXTB__RS_, 2116 HEX_INS_DUPLEX_RE___RU___RD___SXTH__RS_, 2117 HEX_INS_DUPLEX_RE___RU___RD___ZXTH__RS_, 2118 HEX_INS_DUPLEX_RE___RU___RDD___COMBINE___0__RS_, 2119 HEX_INS_DUPLEX_RE___RU___RDD___COMBINE__RS___0_, 2120 HEX_INS_DUPLEX_RE___ADD__RS____1____RD_____1, 2121 HEX_INS_DUPLEX_RE___ADD__RS____1____RD___MEMW__SP____U5_2_, 2122 HEX_INS_DUPLEX_RE___ADD__RS____1____RDD___COMBINE___0___U2_, 2123 HEX_INS_DUPLEX_RE___ADD__RS____1____RDD___COMBINE___1___U2_, 2124 HEX_INS_DUPLEX_RE___ADD__RS____1____RDD___COMBINE___2___U2_, 2125 HEX_INS_DUPLEX_RE___ADD__RS____1____RDD___COMBINE___3___U2_, 2126 HEX_INS_DUPLEX_RE___ADD__RS____1____RDD___MEMD__SP____U5_3_, 2127 HEX_INS_DUPLEX_RE___ADD__RS____1____IF___NOT__P0__RD____0, 2128 HEX_INS_DUPLEX_RE___ADD__RS____1____IF___NOT__P0_NEW__RD____0, 2129 HEX_INS_DUPLEX_RE___ADD__RS____1____IF__P0__RD____0, 2130 HEX_INS_DUPLEX_RE___ADD__RS____1____IF__P0_NEW__RD____0, 2131 HEX_INS_DUPLEX_RE___ADD__RS___1____RD_____1, 2132 HEX_INS_DUPLEX_RE___ADD__RS___1____RD___MEMW__SP____U5_2_, 2133 HEX_INS_DUPLEX_RE___ADD__RS___1____RDD___COMBINE___0___U2_, 2134 HEX_INS_DUPLEX_RE___ADD__RS___1____RDD___COMBINE___1___U2_, 2135 HEX_INS_DUPLEX_RE___ADD__RS___1____RDD___COMBINE___2___U2_, 2136 HEX_INS_DUPLEX_RE___ADD__RS___1____RDD___COMBINE___3___U2_, 2137 HEX_INS_DUPLEX_RE___ADD__RS___1____RDD___MEMD__SP____U5_3_, 2138 HEX_INS_DUPLEX_RE___ADD__RS___1____IF___NOT__P0__RD____0, 2139 HEX_INS_DUPLEX_RE___ADD__RS___1____IF___NOT__P0_NEW__RD____0, 2140 HEX_INS_DUPLEX_RE___ADD__RS___1____IF__P0__RD____0, 2141 HEX_INS_DUPLEX_RE___ADD__RS___1____IF__P0_NEW__RD____0, 2142 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___ADD__RS____1_, 2143 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___AND__RS___255_, 2144 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___MEMB__RS____U3_0_, 2145 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___MEMH__RS____U3_1_, 2146 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___MEMUB__RS____U4_0_, 2147 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___MEMUH__RS____U3_1_, 2148 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___MEMW__RS____U4_2_, 2149 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___SXTB__RS_, 2150 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___SXTH__RS_, 2151 HEX_INS_DUPLEX_RE___ADD__RU____1____RD___ZXTH__RS_, 2152 HEX_INS_DUPLEX_RE___ADD__RU____1____RDD___COMBINE___0__RS_, 2153 HEX_INS_DUPLEX_RE___ADD__RU____1____RDD___COMBINE__RS___0_, 2154 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___ADD__RS____1_, 2155 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___ADD__RS___1_, 2156 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___AND__RS___1_, 2157 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___AND__RS___255_, 2158 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___MEMB__RS____U3_0_, 2159 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___MEMH__RS____U3_1_, 2160 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___MEMUB__RS____U4_0_, 2161 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___MEMUH__RS____U3_1_, 2162 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___MEMW__RS____U4_2_, 2163 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___SXTB__RS_, 2164 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___SXTH__RS_, 2165 HEX_INS_DUPLEX_RE___ADD__RU___1____RD___ZXTH__RS_, 2166 HEX_INS_DUPLEX_RE___ADD__RU___1____RDD___COMBINE___0__RS_, 2167 HEX_INS_DUPLEX_RE___ADD__RU___1____RDD___COMBINE__RS___0_, 2168 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD_____1, 2169 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___ADD__RS____1_, 2170 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___ADD__RS___1_, 2171 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___ADD__SP___U6_2_, 2172 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___AND__RS___1_, 2173 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___AND__RS___255_, 2174 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___MEMB__RS____U3_0_, 2175 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___MEMH__RS____U3_1_, 2176 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___MEMUB__RS____U4_0_, 2177 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___MEMUH__RS____U3_1_, 2178 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___MEMW__RS____U4_2_, 2179 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___MEMW__SP____U5_2_, 2180 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___COMBINE___0___U2_, 2181 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___COMBINE___0__RS_, 2182 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___COMBINE___1___U2_, 2183 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___COMBINE___2___U2_, 2184 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___COMBINE___3___U2_, 2185 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___COMBINE__RS___0_, 2186 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RDD___MEMD__SP____U5_3_, 2187 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____IF___NOT__P0__RD____0, 2188 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____IF___NOT__P0_NEW__RD____0, 2189 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____IF__P0__RD____0, 2190 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____IF__P0_NEW__RD____0, 2191 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___RS, 2192 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___SXTB__RS_, 2193 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___SXTH__RS_, 2194 HEX_INS_DUPLEX_RE___ADD__SP___U6_2____RD___ZXTH__RS_, 2195 HEX_INS_DUPLEX_RE___AND__RS___1____RD_____1, 2196 HEX_INS_DUPLEX_RE___AND__RS___1____RD___MEMW__SP____U5_2_, 2197 HEX_INS_DUPLEX_RE___AND__RS___1____RDD___COMBINE___0___U2_, 2198 HEX_INS_DUPLEX_RE___AND__RS___1____RDD___COMBINE___1___U2_, 2199 HEX_INS_DUPLEX_RE___AND__RS___1____RDD___COMBINE___2___U2_, 2200 HEX_INS_DUPLEX_RE___AND__RS___1____RDD___COMBINE___3___U2_, 2201 HEX_INS_DUPLEX_RE___AND__RS___1____RDD___MEMD__SP____U5_3_, 2202 HEX_INS_DUPLEX_RE___AND__RS___1____IF___NOT__P0__RD____0, 2203 HEX_INS_DUPLEX_RE___AND__RS___1____IF___NOT__P0_NEW__RD____0, 2204 HEX_INS_DUPLEX_RE___AND__RS___1____IF__P0__RD____0, 2205 HEX_INS_DUPLEX_RE___AND__RS___1____IF__P0_NEW__RD____0, 2206 HEX_INS_DUPLEX_RE___AND__RS___255____RD_____1, 2207 HEX_INS_DUPLEX_RE___AND__RS___255____RD___MEMW__SP____U5_2_, 2208 HEX_INS_DUPLEX_RE___AND__RS___255____RDD___COMBINE___0___U2_, 2209 HEX_INS_DUPLEX_RE___AND__RS___255____RDD___COMBINE___1___U2_, 2210 HEX_INS_DUPLEX_RE___AND__RS___255____RDD___COMBINE___2___U2_, 2211 HEX_INS_DUPLEX_RE___AND__RS___255____RDD___COMBINE___3___U2_, 2212 HEX_INS_DUPLEX_RE___AND__RS___255____RDD___MEMD__SP____U5_3_, 2213 HEX_INS_DUPLEX_RE___AND__RS___255____IF___NOT__P0__RD____0, 2214 HEX_INS_DUPLEX_RE___AND__RS___255____IF___NOT__P0_NEW__RD____0, 2215 HEX_INS_DUPLEX_RE___AND__RS___255____IF__P0__RD____0, 2216 HEX_INS_DUPLEX_RE___AND__RS___255____IF__P0_NEW__RD____0, 2217 HEX_INS_DUPLEX_RE___AND__RU___1____RD___ADD__RS____1_, 2218 HEX_INS_DUPLEX_RE___AND__RU___1____RD___AND__RS___1_, 2219 HEX_INS_DUPLEX_RE___AND__RU___1____RD___AND__RS___255_, 2220 HEX_INS_DUPLEX_RE___AND__RU___1____RD___MEMB__RS____U3_0_, 2221 HEX_INS_DUPLEX_RE___AND__RU___1____RD___MEMH__RS____U3_1_, 2222 HEX_INS_DUPLEX_RE___AND__RU___1____RD___MEMUB__RS____U4_0_, 2223 HEX_INS_DUPLEX_RE___AND__RU___1____RD___MEMUH__RS____U3_1_, 2224 HEX_INS_DUPLEX_RE___AND__RU___1____RD___MEMW__RS____U4_2_, 2225 HEX_INS_DUPLEX_RE___AND__RU___1____RD___SXTB__RS_, 2226 HEX_INS_DUPLEX_RE___AND__RU___1____RD___SXTH__RS_, 2227 HEX_INS_DUPLEX_RE___AND__RU___1____RD___ZXTH__RS_, 2228 HEX_INS_DUPLEX_RE___AND__RU___1____RDD___COMBINE___0__RS_, 2229 HEX_INS_DUPLEX_RE___AND__RU___1____RDD___COMBINE__RS___0_, 2230 HEX_INS_DUPLEX_RE___AND__RU___255____RD___AND__RS___255_, 2231 HEX_INS_DUPLEX_RE___AND__RU___255____RD___MEMB__RS____U3_0_, 2232 HEX_INS_DUPLEX_RE___AND__RU___255____RD___MEMH__RS____U3_1_, 2233 HEX_INS_DUPLEX_RE___AND__RU___255____RD___MEMUB__RS____U4_0_, 2234 HEX_INS_DUPLEX_RE___AND__RU___255____RD___MEMUH__RS____U3_1_, 2235 HEX_INS_DUPLEX_RE___AND__RU___255____RD___MEMW__RS____U4_2_, 2236 HEX_INS_DUPLEX_RE___AND__RU___255____RDD___COMBINE___0__RS_, 2237 HEX_INS_DUPLEX_RE___AND__RU___255____RDD___COMBINE__RS___0_, 2238 HEX_INS_DUPLEX_RE___MEMB__RS____U3_0____RD___MEMW__SP____U5_2_, 2239 HEX_INS_DUPLEX_RE___MEMB__RS____U3_0____RDD___MEMD__SP____U5_3_, 2240 HEX_INS_DUPLEX_RE___MEMB__RU____U3_0____RD___MEMB__RS____U3_0_, 2241 HEX_INS_DUPLEX_RE___MEMH__RS____U3_1____RD___MEMW__SP____U5_2_, 2242 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HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMB__RS____U4_0_____0, 2515 HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMB__RS____U4_0_____1, 2516 HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMB__RS____U4_0____RT, 2517 HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMH__RS____U3_1____RT, 2518 HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMW__RS____U4_2_____0, 2519 HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMW__RS____U4_2_____1, 2520 HEX_INS_DUPLEX_RX___ADD__RX__RU____MEMW__RS____U4_2____RT, 2521 HEX_INS_DUPLEX_RX___ADD__RX__RU____P0___CMP_EQ__RS___U2_, 2522 HEX_INS_DUPLEX_RY___ADD__RU__RY____RX___ADD__RS__RX_, 2523 HEX_INS_DUPLEX_RY___ADD__RU__RY____RX___ADD__RX__RS_, 2524 HEX_INS_DUPLEX_RY___ADD__RY___S7____RX___ADD__RX___S7_, 2525 HEX_INS_DUPLEX_RY___ADD__RY___S7____RX___ADD__RS__RX_, 2526 HEX_INS_DUPLEX_RY___ADD__RY___S7____RX___ADD__RX__RS_, 2527 HEX_INS_DUPLEX_RY___ADD__RY__RU____RX___ADD__RS__RX_, 2528 HEX_INS_DUPLEX_RY___ADD__RY__RU____RX___ADD__RX__RS_, 2529 HEX_INS_DUPLEX_DEALLOCFRAME___IF___NOT__P0__JUMPR_LR, 2530 HEX_INS_DUPLEX_DEALLOCFRAME___IF___NOT__P0_NEW__JUMPR_NT_LR, 2531 HEX_INS_DUPLEX_DEALLOCFRAME___IF__P0__JUMPR_LR, 2532 HEX_INS_DUPLEX_DEALLOCFRAME___IF__P0_NEW__JUMPR_NT_LR, 2533 HEX_INS_DUPLEX_DEALLOCFRAME___JUMPR_LR, 2534 HEX_INS_DUPLEX_DEALLOCFRAME___MEMB__RS____U4_0_____0, 2535 HEX_INS_DUPLEX_DEALLOCFRAME___MEMB__RS____U4_0_____1, 2536 HEX_INS_DUPLEX_DEALLOCFRAME___MEMB__RS____U4_0____RT, 2537 HEX_INS_DUPLEX_DEALLOCFRAME___MEMD__SP____S6_3____RTT, 2538 HEX_INS_DUPLEX_DEALLOCFRAME___MEMH__RS____U3_1____RT, 2539 HEX_INS_DUPLEX_DEALLOCFRAME___MEMW__RS____U4_2_____0, 2540 HEX_INS_DUPLEX_DEALLOCFRAME___MEMW__RS____U4_2_____1, 2541 HEX_INS_DUPLEX_DEALLOCFRAME___MEMW__RS____U4_2____RT, 2542 HEX_INS_DUPLEX_DEALLOCFRAME___MEMW__SP____U5_2____RT, 2543 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___ALLOCFRAME___U5_3_, 2544 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___DEALLOC_RETURN, 2545 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___DEALLOCFRAME, 2546 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF___NOT__P0__DEALLOC_RETURN, 2547 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF___NOT__P0__JUMPR_LR, 2548 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 2549 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF___NOT__P0_NEW__JUMPR_NT_LR, 2550 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF__P0__DEALLOC_RETURN, 2551 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF__P0__JUMPR_LR, 2552 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF__P0_NEW__DEALLOC_RETURN_NT, 2553 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___IF__P0_NEW__JUMPR_NT_LR, 2554 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___JUMPR_LR, 2555 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___MEMB__RS____U4_0_____0, 2556 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___MEMB__RS____U4_0_____1, 2557 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___MEMB__RS____U4_0____RT, 2558 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___MEMD__SP____S6_3____RTT, 2559 HEX_INS_DUPLEX_IF___NOT__P0__RD____0___MEMH__RS____U3_1____RT, 2560 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HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___COMBINE___0___U2_, 2679 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___COMBINE___0__RS_, 2680 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___COMBINE___1___U2_, 2681 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___COMBINE___2___U2_, 2682 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___COMBINE___3___U2_, 2683 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___COMBINE__RS___0_, 2684 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___RDD___MEMD__SP____U5_3_, 2685 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___IF___NOT__P0__RD____0, 2686 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___IF___NOT__P0_NEW__RD____0, 2687 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___IF__P0__RD____0, 2688 HEX_INS_DUPLEX_IF__P0_NEW__RE____0___IF__P0_NEW__RD____0, 2689 HEX_INS_DUPLEX_MEMB__RS____U4_0_____0___ALLOCFRAME___U5_3_, 2690 HEX_INS_DUPLEX_MEMB__RS____U4_0_____0___MEMD__SP____S6_3____RTT, 2691 HEX_INS_DUPLEX_MEMB__RS____U4_0_____0___MEMW__SP____U5_2____RT, 2692 HEX_INS_DUPLEX_MEMB__RS____U4_0_____1___ALLOCFRAME___U5_3_, 2693 HEX_INS_DUPLEX_MEMB__RS____U4_0_____1___MEMD__SP____S6_3____RTT, 2694 HEX_INS_DUPLEX_MEMB__RS____U4_0_____1___MEMW__SP____U5_2____RT, 2695 HEX_INS_DUPLEX_MEMB__RS____U4_0____RT___ALLOCFRAME___U5_3_, 2696 HEX_INS_DUPLEX_MEMB__RS____U4_0____RV___MEMD__SP____S6_3____RTT, 2697 HEX_INS_DUPLEX_MEMB__RS____U4_0____RV___MEMW__SP____U5_2____RT, 2698 HEX_INS_DUPLEX_MEMB__RU____U4_0_____0___MEMB__RS____U4_0_____0, 2699 HEX_INS_DUPLEX_MEMB__RU____U4_0_____0___MEMB__RS____U4_0_____1, 2700 HEX_INS_DUPLEX_MEMB__RU____U4_0_____0___MEMH__RS____U3_1____RT, 2701 HEX_INS_DUPLEX_MEMB__RU____U4_0_____0___MEMW__RS____U4_2_____0, 2702 HEX_INS_DUPLEX_MEMB__RU____U4_0_____0___MEMW__RS____U4_2_____1, 2703 HEX_INS_DUPLEX_MEMB__RU____U4_0_____1___MEMB__RS____U4_0_____0, 2704 HEX_INS_DUPLEX_MEMB__RU____U4_0_____1___MEMB__RS____U4_0_____1, 2705 HEX_INS_DUPLEX_MEMB__RU____U4_0_____1___MEMH__RS____U3_1____RT, 2706 HEX_INS_DUPLEX_MEMB__RU____U4_0_____1___MEMW__RS____U4_2_____0, 2707 HEX_INS_DUPLEX_MEMB__RU____U4_0_____1___MEMW__RS____U4_2_____1, 2708 HEX_INS_DUPLEX_MEMB__RU____U4_0____RT___MEMB__RS____U4_0_____0, 2709 HEX_INS_DUPLEX_MEMB__RU____U4_0____RT___MEMB__RS____U4_0_____1, 2710 HEX_INS_DUPLEX_MEMB__RU____U4_0____RT___MEMW__RS____U4_2_____0, 2711 HEX_INS_DUPLEX_MEMB__RU____U4_0____RT___MEMW__RS____U4_2_____1, 2712 HEX_INS_DUPLEX_MEMB__RU____U4_0____RV___MEMB__RS____U4_0____RT, 2713 HEX_INS_DUPLEX_MEMB__RU____U4_0____RV___MEMH__RS____U3_1____RT, 2714 HEX_INS_DUPLEX_MEMB__RU____U4_0____RV___MEMW__RS____U4_2____RT, 2715 HEX_INS_DUPLEX_MEMD__SP____S6_3____RTT___ALLOCFRAME___U5_3_, 2716 HEX_INS_DUPLEX_MEMD__SP____S6_3____RTT___MEMB__RS____U4_0_____0, 2717 HEX_INS_DUPLEX_MEMD__SP____S6_3____RTT___MEMB__RS____U4_0_____1, 2718 HEX_INS_DUPLEX_MEMD__SP____S6_3____RTT___MEMW__RS____U4_2_____0, 2719 HEX_INS_DUPLEX_MEMD__SP____S6_3____RTT___MEMW__RS____U4_2_____1, 2720 HEX_INS_DUPLEX_MEMD__SP____S6_3____RVV___MEMD__SP____S6_3____RTT, 2721 HEX_INS_DUPLEX_MEMD__SP____S6_3____RVV___MEMH__RS____U3_1____RT, 2722 HEX_INS_DUPLEX_MEMD__SP____S6_3____RVV___MEMW__SP____U5_2____RT, 2723 HEX_INS_DUPLEX_MEMH__RS____U3_1____RT___ALLOCFRAME___U5_3_, 2724 HEX_INS_DUPLEX_MEMH__RS____U3_1____RV___MEMD__SP____S6_3____RTT, 2725 HEX_INS_DUPLEX_MEMH__RS____U3_1____RV___MEMW__SP____U5_2____RT, 2726 HEX_INS_DUPLEX_MEMH__RU____U3_1____RT___MEMB__RS____U4_0_____0, 2727 HEX_INS_DUPLEX_MEMH__RU____U3_1____RT___MEMB__RS____U4_0_____1, 2728 HEX_INS_DUPLEX_MEMH__RU____U3_1____RT___MEMW__RS____U4_2_____0, 2729 HEX_INS_DUPLEX_MEMH__RU____U3_1____RT___MEMW__RS____U4_2_____1, 2730 HEX_INS_DUPLEX_MEMH__RU____U3_1____RV___MEMH__RS____U3_1____RT, 2731 HEX_INS_DUPLEX_MEMW__RS____U4_2_____0___ALLOCFRAME___U5_3_, 2732 HEX_INS_DUPLEX_MEMW__RS____U4_2_____0___MEMD__SP____S6_3____RTT, 2733 HEX_INS_DUPLEX_MEMW__RS____U4_2_____0___MEMW__SP____U5_2____RT, 2734 HEX_INS_DUPLEX_MEMW__RS____U4_2_____1___ALLOCFRAME___U5_3_, 2735 HEX_INS_DUPLEX_MEMW__RS____U4_2_____1___MEMD__SP____S6_3____RTT, 2736 HEX_INS_DUPLEX_MEMW__RS____U4_2_____1___MEMW__SP____U5_2____RT, 2737 HEX_INS_DUPLEX_MEMW__RS____U4_2____RT___ALLOCFRAME___U5_3_, 2738 HEX_INS_DUPLEX_MEMW__RS____U4_2____RV___MEMD__SP____S6_3____RTT, 2739 HEX_INS_DUPLEX_MEMW__RS____U4_2____RV___MEMW__SP____U5_2____RT, 2740 HEX_INS_DUPLEX_MEMW__RU____U4_2_____0___MEMB__RS____U4_0_____0, 2741 HEX_INS_DUPLEX_MEMW__RU____U4_2_____0___MEMB__RS____U4_0_____1, 2742 HEX_INS_DUPLEX_MEMW__RU____U4_2_____0___MEMH__RS____U3_1____RT, 2743 HEX_INS_DUPLEX_MEMW__RU____U4_2_____0___MEMW__RS____U4_2_____0, 2744 HEX_INS_DUPLEX_MEMW__RU____U4_2_____0___MEMW__RS____U4_2_____1, 2745 HEX_INS_DUPLEX_MEMW__RU____U4_2_____1___MEMB__RS____U4_0_____0, 2746 HEX_INS_DUPLEX_MEMW__RU____U4_2_____1___MEMB__RS____U4_0_____1, 2747 HEX_INS_DUPLEX_MEMW__RU____U4_2_____1___MEMH__RS____U3_1____RT, 2748 HEX_INS_DUPLEX_MEMW__RU____U4_2_____1___MEMW__RS____U4_2_____0, 2749 HEX_INS_DUPLEX_MEMW__RU____U4_2_____1___MEMW__RS____U4_2_____1, 2750 HEX_INS_DUPLEX_MEMW__RU____U4_2____RT___MEMB__RS____U4_0_____0, 2751 HEX_INS_DUPLEX_MEMW__RU____U4_2____RT___MEMB__RS____U4_0_____1, 2752 HEX_INS_DUPLEX_MEMW__RU____U4_2____RT___MEMW__RS____U4_2_____0, 2753 HEX_INS_DUPLEX_MEMW__RU____U4_2____RT___MEMW__RS____U4_2_____1, 2754 HEX_INS_DUPLEX_MEMW__RU____U4_2____RV___MEMB__RS____U4_0____RT, 2755 HEX_INS_DUPLEX_MEMW__RU____U4_2____RV___MEMH__RS____U3_1____RT, 2756 HEX_INS_DUPLEX_MEMW__RU____U4_2____RV___MEMW__RS____U4_2____RT, 2757 HEX_INS_DUPLEX_MEMW__SP____U5_2____RT___ALLOCFRAME___U5_3_, 2758 HEX_INS_DUPLEX_MEMW__SP____U5_2____RT___MEMB__RS____U4_0_____0, 2759 HEX_INS_DUPLEX_MEMW__SP____U5_2____RT___MEMB__RS____U4_0_____1, 2760 HEX_INS_DUPLEX_MEMW__SP____U5_2____RT___MEMW__RS____U4_2_____0, 2761 HEX_INS_DUPLEX_MEMW__SP____U5_2____RT___MEMW__RS____U4_2_____1, 2762 HEX_INS_DUPLEX_MEMW__SP____U5_2____RV___MEMD__SP____S6_3____RTT, 2763 HEX_INS_DUPLEX_MEMW__SP____U5_2____RV___MEMH__RS____U3_1____RT, 2764 HEX_INS_DUPLEX_MEMW__SP____U5_2____RV___MEMW__SP____U5_2____RT, 2765 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RD_____1, 2766 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RD___MEMW__SP____U5_2_, 2767 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RDD___COMBINE___0___U2_, 2768 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RDD___COMBINE___1___U2_, 2769 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RDD___COMBINE___2___U2_, 2770 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RDD___COMBINE___3___U2_, 2771 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____RDD___MEMD__SP____U5_3_, 2772 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____ALLOCFRAME___U5_3_, 2773 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF___NOT__P0__RD____0, 2774 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF___NOT__P0_NEW__RD____0, 2775 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF__P0__RD____0, 2776 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF__P0_NEW__RD____0, 2777 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____MEMD__SP____S6_3____RTT, 2778 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____MEMW__SP____U5_2____RT, 2779 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____DEALLOC_RETURN, 2780 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____DEALLOCFRAME, 2781 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF___NOT__P0__DEALLOC_RETURN, 2782 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF___NOT__P0__JUMPR_LR, 2783 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF___NOT__P0_NEW__DEALLOC_RETURN_NT, 2784 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF___NOT__P0_NEW__JUMPR_NT_LR, 2785 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF__P0__DEALLOC_RETURN, 2786 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF__P0__JUMPR_LR, 2787 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF__P0_NEW__DEALLOC_RETURN_NT, 2788 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____IF__P0_NEW__JUMPR_NT_LR, 2789 HEX_INS_DUPLEX_P0___CMP_EQ__RS___U2____JUMPR_LR, 2790 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RD___MEMB__RS____U3_0_, 2791 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RD___MEMH__RS____U3_1_, 2792 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RD___MEMUB__RS____U4_0_, 2793 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RD___MEMUH__RS____U3_1_, 2794 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RD___MEMW__RS____U4_2_, 2795 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RDD___COMBINE___0__RS_, 2796 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____RDD___COMBINE__RS___0_, 2797 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMB__RS____U4_0_____0, 2798 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMB__RS____U4_0_____1, 2799 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMB__RS____U4_0____RT, 2800 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMH__RS____U3_1____RT, 2801 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMW__RS____U4_2_____0, 2802 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMW__RS____U4_2_____1, 2803 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____MEMW__RS____U4_2____RT, 2804 HEX_INS_DUPLEX_P0___CMP_EQ__RU___U2____P0___CMP_EQ__RS___U2_, 2805 }; 2806 2807 #endif 2808