| /dports/emulators/qemu60/qemu-6.0.0/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/misc/seabios/seabios-1.14.0/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/seabios/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/seabios-hppa/src/fw/ |
| H A D | dev-q35.h | 42 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu42/qemu-4.2.1/include/hw/i386/ |
| H A D | ich9.h | 203 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu/qemu-6.2.0/include/hw/i386/ |
| H A D | ich9.h | 203 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu60/qemu-6.0.0/include/hw/i386/ |
| H A D | ich9.h | 203 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/include/hw/i386/ |
| H A D | ich9.h | 203 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/i386/ |
| H A D | ich9.h | 206 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu5/qemu-5.2.0/include/hw/i386/ |
| H A D | ich9.h | 203 #define ICH9_PMIO_GPE0_STS 0x20 macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/i386/ |
| H A D | topology.h | 202 * 'cpu_index' is a sequential, contiguous ID for the CPU.
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/i386/ |
| H A D | ich9.h | 202 #define ICH9_PMIO_GPE0_STS 0x20 macro
|