1 /* 2 * Copyright � 2009 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 22 * SOFTWAR 23 * 24 * Authors: 25 * Zhou Chang <chang.zhou@intel.com> 26 * 27 */ 28 29 #ifndef _GEN6_VME_H_ 30 #define _GEN6_VME_H_ 31 32 #include <xf86drm.h> 33 #include <drm.h> 34 #include <i915_drm.h> 35 #include <intel_bufmgr.h> 36 37 #include "i965_gpe_utils.h" 38 39 #define INTRA_VME_OUTPUT_IN_BYTES 16 /* in bytes */ 40 #define INTRA_VME_OUTPUT_IN_DWS (INTRA_VME_OUTPUT_IN_BYTES / 4) 41 #define INTER_VME_OUTPUT_IN_BYTES 160 /* the first 128 bytes for MVs and the last 32 bytes for other info */ 42 #define INTER_VME_OUTPUT_IN_DWS (INTER_VME_OUTPUT_IN_BYTES / 4) 43 44 #define MAX_INTERFACE_DESC_GEN6 MAX_GPE_KERNELS 45 #define MAX_MEDIA_SURFACES_GEN6 34 46 47 #define GEN6_VME_KERNEL_NUMBER 3 48 49 #define INTEL_COST_TABLE_OFFSET 8 50 51 struct encode_state; 52 struct intel_encoder_context; 53 54 struct gen6_vme_context { 55 struct i965_gpe_context gpe_context; 56 57 struct { 58 dri_bo *bo; 59 } vme_state; 60 61 struct i965_buffer_surface vme_output; 62 struct i965_buffer_surface vme_batchbuffer; 63 64 65 void (*vme_surface2_setup)(VADriverContextP ctx, 66 struct i965_gpe_context *gpe_context, 67 struct object_surface *obj_surface, 68 unsigned long binding_table_offset, 69 unsigned long surface_state_offset); 70 void (*vme_media_rw_surface_setup)(VADriverContextP ctx, 71 struct i965_gpe_context *gpe_context, 72 struct object_surface *obj_surface, 73 unsigned long binding_table_offset, 74 unsigned long surface_state_offset, 75 int write_enabled); 76 void (*vme_buffer_suface_setup)(VADriverContextP ctx, 77 struct i965_gpe_context *gpe_context, 78 struct i965_buffer_surface *buffer_surface, 79 unsigned long binding_table_offset, 80 unsigned long surface_state_offset); 81 void (*vme_media_chroma_surface_setup)(VADriverContextP ctx, 82 struct i965_gpe_context *gpe_context, 83 struct object_surface *obj_surface, 84 unsigned long binding_table_offset, 85 unsigned long surface_state_offset, 86 int write_enabled); 87 void *vme_state_message; 88 unsigned int h264_level; 89 unsigned int hevc_level; 90 unsigned int video_coding_type; 91 unsigned int vme_kernel_sum; 92 unsigned int mpeg2_level; 93 94 struct object_surface *used_reference_objects[2]; 95 void *used_references[2]; 96 unsigned int ref_index_in_mb[2]; 97 98 dri_bo *i_qp_cost_table; 99 dri_bo *p_qp_cost_table; 100 dri_bo *b_qp_cost_table; 101 int cost_table_size; 102 103 /* one buffer define qp per mb. one byte for every mb. 104 * If it needs to be accessed by GPU, it will be changed to dri_bo. 105 */ 106 bool roi_enabled; 107 char *qp_per_mb; 108 int saved_width_mbs, saved_height_mbs; 109 }; 110 111 #define MPEG2_PIC_WIDTH_HEIGHT 30 112 #define MPEG2_MV_RANGE 29 113 #define MPEG2_LEVEL_MASK 0x0f 114 #define MPEG2_LEVEL_LOW 0x0a 115 #define MPEG2_LEVEL_MAIN 0x08 116 #define MPEG2_LEVEL_HIGH 0x04 117 118 Bool gen6_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); 119 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); 120 121 extern void intel_vme_update_mbmv_cost(VADriverContextP ctx, 122 struct encode_state *encode_state, 123 struct intel_encoder_context *encoder_context); 124 125 void intel_vme_vp8_update_mbmv_cost(VADriverContextP ctx, 126 struct encode_state *encode_state, 127 struct intel_encoder_context *encoder_context); 128 129 Bool gen7_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); 130 131 #define MODE_INTRA_NONPRED 0 132 #define MODE_INTRA_16X16 1 133 #define MODE_INTRA_8X8 2 134 #define MODE_INTRA_4X4 3 135 #define MODE_INTER_16X8 4 136 #define MODE_INTER_8X16 4 137 #define MODE_INTER_8X8 5 138 #define MODE_INTER_8X4 6 139 #define MODE_INTER_4X8 6 140 #define MODE_INTER_4X4 7 141 #define MODE_INTER_16X16 8 142 #define MODE_INTER_BWD 9 143 #define MODE_REFID_COST 10 144 #define MODE_CHROMA_INTRA 11 145 146 #define MODE_INTER_MV0 12 147 #define MODE_INTER_MV1 13 148 #define MODE_INTER_MV2 14 149 150 #define MODE_INTER_MV3 15 151 #define MODE_INTER_MV4 16 152 #define MODE_INTER_MV5 17 153 #define MODE_INTER_MV6 18 154 #define MODE_INTER_MV7 19 155 156 #define INTRA_PRED_AVAIL_FLAG_AE 0x60 157 #define INTRA_PRED_AVAIL_FLAG_B 0x10 158 #define INTRA_PRED_AVAIL_FLAG_C 0x8 159 #define INTRA_PRED_AVAIL_FLAG_D 0x4 160 #define INTRA_PRED_AVAIL_FLAG_BCD_MASK 0x1C 161 162 extern void 163 gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, 164 struct encode_state *encode_state, 165 int mb_width, int mb_height, 166 int kernel, 167 int transform_8x8_mode_flag, 168 struct intel_encoder_context *encoder_context); 169 170 extern void 171 gen7_vme_scoreboard_init(VADriverContextP ctx, struct gen6_vme_context *vme_context); 172 173 extern void 174 intel_vme_mpeg2_state_setup(VADriverContextP ctx, 175 struct encode_state *encode_state, 176 struct intel_encoder_context *encoder_context); 177 178 extern void 179 gen7_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, 180 struct encode_state *encode_state, 181 int mb_width, int mb_height, 182 int kernel, 183 struct intel_encoder_context *encoder_context); 184 185 void 186 intel_avc_vme_reference_state(VADriverContextP ctx, 187 struct encode_state *encode_state, 188 struct intel_encoder_context *encoder_context, 189 int list_index, 190 int surface_index, 191 void (* vme_source_surface_state)( 192 VADriverContextP ctx, 193 int index, 194 struct object_surface *obj_surface, 195 struct intel_encoder_context *encoder_context)); 196 197 /* HEVC */ 198 void 199 intel_hevc_vme_reference_state(VADriverContextP ctx, 200 struct encode_state *encode_state, 201 struct intel_encoder_context *encoder_context, 202 int list_index, 203 int surface_index, 204 void (* vme_source_surface_state)( 205 VADriverContextP ctx, 206 int index, 207 struct object_surface *obj_surface, 208 struct intel_encoder_context *encoder_context)); 209 210 void intel_vme_hevc_update_mbmv_cost(VADriverContextP ctx, 211 struct encode_state *encode_state, 212 struct intel_encoder_context *encoder_context); 213 214 215 extern Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); 216 217 extern Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); 218 219 extern void 220 intel_h264_initialize_mbmv_cost(VADriverContextP ctx, 221 struct encode_state *encode_state, 222 struct intel_encoder_context *encoder_context); 223 224 extern void 225 intel_h264_setup_cost_surface(VADriverContextP ctx, 226 struct encode_state *encode_state, 227 struct intel_encoder_context *encoder_context, 228 unsigned long binding_table_offset, 229 unsigned long surface_state_offset); 230 231 extern void 232 intel_h264_enc_roi_config(VADriverContextP ctx, 233 struct encode_state *encode_state, 234 struct intel_encoder_context *encoder_context); 235 236 #endif /* _GEN6_VME_H_ */ 237