| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCInstPrinter.cpp | 460 int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printBranchOperand() local
487 uint64_t Imm = static_cast<uint64_t>(MI->getOperand(OpNo).getImm()) << 2; in printAbsBranchOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 110 ImmOp Imm; member
305 int64_t Imm = 0; in addExpr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 149 uint64_t Imm = ExpectedElt.getZExtValue(); in getExtMask() local
423 uint64_t Imm; in matchEXT() local
542 int64_t &Imm) { in matchVAshrLshrImm()
552 int64_t &Imm) { in applyVAshrLshrImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86EncodingOptimization.cpp | 253 int64_t Imm = LastOp.getImm(); in optimizeVPCMPWithImmediateOneOrSix() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 114 static DecodeStatus DecodeImm32(MCInst &Inst, uint64_t Imm, uint64_t Address, in DecodeImm32()
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
| H A D | RuntimeDyldCOFFAArch64.h | 57 uint64_t Imm = (s >> shift) - (p >> shift); in write32AArch64Addr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 258 unsigned Imm = Ctx.getRegisterInfo()->getEncodingValue(Rz) - in getRegSeqImmOpValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 890 uint64_t Imm = static_cast<uint64_t>(MI.getOperand(1).getImm()); in isCheapImmediate() local
935 unsigned Imm = MI.getOperand(3).getImm(); in isFalkorShiftExtFast() local
948 unsigned Imm = MI.getOperand(3).getImm(); in isFalkorShiftExtFast() local
962 unsigned Imm = MI.getOperand(3).getImm(); in isFalkorShiftExtFast() local
970 unsigned Imm = MI.getOperand(3).getImm(); in isFalkorShiftExtFast() local
982 unsigned Imm = MI.getOperand(3).getImm(); in isFalkorShiftExtFast() local
4149 unsigned Imm = MI.getOperand(0).getImm(); in hasBTISemantics() local
5376 int Imm = (int)(ThisVal << LocalShiftSize); in emitFrameOffsetAdj() local
7008 uint64_t Imm = Root.getOperand(2).getImm(); in genAlternativeCodeSequence() local
7118 uint64_t Imm = Root.getOperand(2).getImm(); in genAlternativeCodeSequence() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 914 int64_t Imm = MI.getOperand(1).getImm(); in expandPostRAPseudo() local
967 int64_t Imm = MI.getOperand(2).getImm(); in expandPostRAPseudo() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 864 int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm()); in eliminateFrameIndex() local
944 int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm()); in eliminateFrameIndex() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 217 bool isLegalAddImmediate(int64_t Imm) const { return false; } in isLegalAddImmediate()
219 bool isLegalICmpImmediate(int64_t Imm) const { return false; } in isLegalICmpImmediate()
417 const APInt &Imm, Type *Ty) const { in getIntImmCodeSizeCost()
421 InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, in getIntImmCost()
434 const APInt &Imm, Type *Ty, in getIntImmCostIntrin()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.cpp | 183 uint64_t Imm = MO.getImm(); in printUImm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 147 int64_t Imm = BBI->getOperand(1).getImm(); in removeRedundantLIs() local
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| H A D | PPCInstrInfo.h | 61 unsigned Imm : 16; member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCTargetDesc.cpp | 194 int64_t Imm; in evaluateBranch() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertWriteVXRM.cpp | 65 void setVXRMImm(unsigned Imm) { in setVXRMImm()
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| H A D | RISCVInstrInfo.cpp | 1202 auto isLoadImm = [](const MachineInstr *MI, int64_t &Imm) -> bool { in optimizeCondBranch()
1211 auto isFromLoadImm = [&](const MachineOperand &Op, int64_t &Imm) -> bool { in optimizeCondBranch()
1231 int64_t Imm; in optimizeCondBranch() local
1964 int64_t Imm = MO.getImm(); in verifyInstruction() local
2587 unsigned Imm = MI.getOperand(OpIdx).getImm(); in createMIROperandComment() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 94 struct ImmField Imm; ///< Characteristics of immediate field member
308 static bool GetImm(MachineInstr *MI, unsigned Op, int64_t &Imm) { in GetImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 643 unsigned Imm = MI->getOperand(2).getImm(); in ReduceSpecial() local
788 unsigned Imm = MI->getOperand(2).getImm(); in ReduceTo2Addr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 2142 APInt Imm(64, SrcOp.getImm()); in expandPostRAPseudo() local
2197 APInt Imm(64, SrcOp.getImm()); in expandPostRAPseudo() local
2628 APInt Imm(64, SrcOp.getImm()); in expandMovDPP64() local
3379 int64_t Imm = ImmOp->getImm(); in FoldImmediate() local
3413 APInt Imm(Is64Bit ? 64 : 32, getImmFor(UseMI.getOperand(1))); in FoldImmediate() local
3890 int64_t Imm; in convertToThreeAddress() local
4142 int64_t Imm = MO.getImm(); in isInlineConstant() local
4920 uint64_t Imm = Op->getImm(); in verifyInstruction() local
5701 uint64_t Imm = MO->getImm(); in isOperandLegal() local
7322 uint32_t Imm = OffsetWidthOp.getImm(); in moveToVALUImpl() local
[all …]
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| H A D | AMDGPUInsertDelayAlu.cpp | 269 unsigned Imm = 0; in emitDelayAlu() local
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| H A D | AMDGPUISelDAGToDAG.cpp | 418 MachineSDNode *AMDGPUDAGToDAGISel::buildSMovImm64(SDLoc &DL, uint64_t Imm, in buildSMovImm64()
590 uint64_t Imm; in Select() local
1455 int64_t Imm = CAddr->getSExtValue(); in SelectMUBUFScratchOffen() local
3295 unsigned Imm = C->getAPIntValue().getSExtValue(); in SelectWMMAVISrc() local
3300 unsigned Imm = C->getValueAPF().bitcastToAPInt().getSExtValue(); in SelectWMMAVISrc() local
3319 int64_t Imm = C->getValueAPF().bitcastToAPInt().getSExtValue(); in SelectWMMAVISrc() local
3330 int64_t Imm = F32Value.getSExtValue(); in SelectWMMAVISrc() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 126 const MCExpr *Imm; member
134 const MCExpr *Imm; member
141 const MCExpr *Imm; member
206 createImmTLS(const MCExpr *Imm, const MCExpr *Sym, in createImmTLS()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVUtils.cpp | 79 void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB) { in addNumImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 462 Register Imm = createResultReg(&WebAssembly::I32RegClass); in zeroExtendToI32() local
492 Register Imm = createResultReg(&WebAssembly::I32RegClass); in signExtendToI32() local
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