| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 133 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; in encodeInstruction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 171 MCRegister Imm = MI.getOperand(2).getImm(); in expandTLSDESCCall() local
548 auto Imm = MO.getImm(); in getRlistOpValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUExportClustering.cpp | 35 unsigned Imm = TII->getNamedOperand(*MI, AMDGPU::OpName::tgt)->getImm(); in isPositionExport() local
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| H A D | SIPeepholeSDWA.cpp | 540 auto Imm = foldToImm(*Src0); in matchSDWAOperand() local
581 auto Imm = foldToImm(*Src0); in matchSDWAOperand() local
669 auto Imm = foldToImm(*Src0); in matchSDWAOperand() local
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| H A D | SIFoldOperands.cpp | 269 uint32_t Imm = (static_cast<uint32_t>(ImmHi) << 16) | ImmLo; in tryFoldImmWithOpSel() local
274 auto tryFoldToInline = [&](uint32_t Imm) -> bool { in tryFoldImmWithOpSel()
730 int32_t Imm; in tryToFoldACImm() local
909 int64_t Imm = Def->getImm(); in foldOperand() local
1071 APInt Imm(64, OpToFold.getImm()); in foldOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 597 uint32_t Imm = support::endian::read32le(PltContents.data() + Byte + 2); in findX86PltEntries() local
603 uint32_t Imm = support::endian::read32le(PltContents.data() + Byte + 2); in findX86PltEntries() local
621 uint32_t Imm = support::endian::read32le(PltContents.data() + Byte + 2); in findX86_64PltEntries() local
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| H A D | X86IntelInstPrinter.cpp | 65 int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); in printVecCompareInstr() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 101 InstructionCost RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, in getIntImmCost()
118 static bool canUseShiftPair(Instruction *Inst, const APInt &Imm) { in canUseShiftPair()
143 const APInt &Imm, Type *Ty, in getIntImmCostInst()
230 const APInt &Imm, Type *Ty, in getIntImmCostIntrin()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 188 ImmOp Imm; member
245 int64_t Imm; in isUImm() local
254 int64_t Imm; in isOImm() local
263 int64_t Imm; in isSImm() local
315 int64_t Imm; in isPSRFlag() local
388 int64_t Imm; in isExtImm6() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 157 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm, in selectVSplat()
247 auto IsInlineConstant = [](const APInt &Imm) { return Imm.isIntN(5); }; in selectVecAddAsVecSubIfProfitable()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | aarch64.h | 476 uint32_t Imm = (static_cast<uint32_t>(Value) & ((1 << 28) - 1)) >> 2; in applyFixup() local
490 uint32_t Imm = (TargetOffset >> ImmShift) & 0xffff; in applyFixup() local
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.cpp | 330 uint8_t Imm = OC[Offset] & 0x7f; in opcode_0xxxxxxx() local
420 uint16_t Imm = ((OC[Offset + 0] & 0x03) << 8) | ((OC[Offset + 1] & 0xff) << 0); in opcode_111010xx() local
511 uint32_t Imm = (OC[Offset + 1] << 8) | (OC[Offset + 2] << 0); in opcode_11110111() local
524 uint32_t Imm = (OC[Offset + 1] << 16) in opcode_11111000() local
539 uint32_t Imm = (OC[Offset + 1] << 8) | (OC[Offset + 2] << 0); in opcode_11111001() local
552 uint32_t Imm = (OC[Offset + 1] << 16) in opcode_11111010() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 173 int64_t Imm = MO.getImm(); in getCGImmOpValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 195 APInt Imm; in selectShiftMask() local
552 int64_t Imm = MI.getOperand(1).getCImm()->getSExtValue(); in select() local
565 APInt Imm = FPimm.bitcastToAPInt(); in select() local
905 bool RISCVInstructionSelector::materializeImm(Register DstReg, int64_t Imm, in materializeImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCTargetDesc.cpp | 135 int64_t Imm = Inst.getOperand(0).getImm(); in evaluateBranch() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 296 int64_t Imm = MI.getOperand(1).getImm() & 0x3FF; in expandToVectorLDI() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.h | 149 const APInt &Imm = N->getValueAPF().bitcastToAPInt(); in getFpImmVal() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/ |
| H A D | SPIRVBaseInfo.h | 254 const uint32_t Imm = Op.getImm(); // Each i32 word is up to 4 characters. in getSPIRVStringOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelDAGToDAG.cpp | 293 inline SDValue getI8Imm(int64_t Imm, const SDLoc &DL) { in getI8Imm()
298 inline SDValue getI16Imm(int64_t Imm, const SDLoc &DL) { in getI16Imm()
303 inline SDValue getI32Imm(int64_t Imm, const SDLoc &DL) { in getI32Imm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 407 inline SDValue getI8Imm(unsigned Imm, const SDLoc &DL) { in getI8Imm()
412 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { in getI32Imm()
417 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &DL) { in getI64Imm()
668 if (auto *Imm = dyn_cast<ConstantSDNode>(Op1)) { in IsProfitableToFold() local
863 static bool isEndbrImm64(uint64_t Imm) { in isEndbrImm64()
1212 unsigned Imm; in PreprocessISelDAG() local
4159 SDValue Imm = Node->getOperand(2); in emitPCMPISTR() local
4192 SDValue Imm = Node->getOperand(4); in emitPCMPESTR() local
4461 uint8_t Imm) { in matchVPTERNLOG()
4650 uint8_t Imm; in tryVPTERNLOG() local
[all …]
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| H A D | X86InstrInfo.cpp | 1003 unsigned Imm = MI.getOperand(ShiftAmtOperandIdx).getImm(); in getTruncatedShiftCount() local
1637 int64_t Imm = MI.getOperand(2).getImm(); in convertToThreeAddress() local
1667 int64_t Imm = MI.getOperand(2).getImm(); in convertToThreeAddress() local
2427 int8_t Imm = MI.getOperand(3).getImm() & Mask; in commuteInstructionImpl() local
2508 unsigned Imm = MI.getOperand(3).getImm(); in commuteInstructionImpl() local
2861 unsigned Imm = MI.getOperand(3 + OpOffset).getImm() & 0x7; in findCommutedOpIndices() local
3359 unsigned X86::getSwappedVPCMPImm(unsigned Imm) { in getSwappedVPCMPImm()
3386 unsigned X86::getSwappedVPCOMImm(unsigned Imm) { in getSwappedVPCOMImm()
3413 unsigned X86::getSwappedVCMPImm(unsigned Imm) { in getSwappedVCMPImm()
5896 int64_t Imm = MIB->getOperand(1).getImm(); in ExpandMOVImmSExti8() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 94 uint64_t Imm = MI.getOperand(1).getImm(); in shortenIIF() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 277 static uint32_t findContiguousZerosAtLeast(uint64_t Imm, unsigned Num) { in findContiguousZerosAtLeast()
605 int64_t Imm = I.getOperand(1).getCImm()->getValue().getZExtValue(); in selectI64Imm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 165 InstructionCost PPCTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, in getIntImmCost()
196 const APInt &Imm, Type *Ty, in getIntImmCostIntrin()
231 const APInt &Imm, Type *Ty, in getIntImmCostInst()
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| H A D | PPCMIPeephole.cpp | 241 uint16_t Imm = MI->getOperand(2).getImm(); in getKnownLeadingZeroCount() local
1395 uint64_t Imm = CMPI->getOperand(2).getImm(); in getPredicateToDecImm() local
1414 uint64_t Imm = CMPI->getOperand(2).getImm(); in getPredicateToIncImm() local
1674 int16_t Imm = (int16_t)I->getOperand(2).getImm(); in eliminateRedundantCompare() local
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