xref: /openbsd/sys/arch/armv7/include/machine_reg.h (revision 4bab9ed1)
1 /*	$OpenBSD: machine_reg.h,v 1.3 2019/05/06 03:34:43 mlarkin Exp $	*/
2 
3 /*
4  * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
5  * Written by Hiroyuki Bessho for Genetec Corporation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of Genetec Corporation may not be used to endorse or
16  *    promote products derived from this software without specific prior
17  *    written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 
33 #ifndef _MACHINE_REG_H
34 #define _MACHINE_REG_H
35 
36 /*
37  * Logical mapping for onboard/integrated peripherals
38  */
39 #define	MACHINE_IO_AREA_VBASE	0xfd000000
40 #define MACHINE_GPIO_VBASE	0xfd000000
41 #define MACHINE_CLKMAN_VBASE 	0xfd100000
42 #define MACHINE_INTCTL_VBASE 	0xfd200000
43 #define MACHINE_AGPIO_VBASE	0xfd300000
44 #define MACHINE_VBASE_FREE	0xfd400000
45 /* FFUART and/or BTUART are mapped to this area when
46    used for console */
47 
48 #define ioreg_read(a)  (*(volatile unsigned *)(a))
49 #define ioreg_write(a,v)  (*(volatile unsigned *)(a)=(v))
50 
51 #define ioreg16_read(a)  (*(volatile uint16_t *)(a))
52 #define ioreg16_write(a,v)  (*(volatile uint16_t *)(a)=(v))
53 
54 #define ioreg8_read(a)  (*(volatile uint8_t *)(a))
55 #define ioreg8_write(a,v)  (*(volatile uint8_t *)(a)=(v))
56 
57 #endif /* _MACHINE_REG_H */
58