1 #ifndef	DEVICES_H
2 #define	DEVICES_H
3 
4 /*
5  *  Copyright (C) 2003-2018  Anders Gavare.  All rights reserved.
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions are met:
9  *
10  *  1. Redistributions of source code must retain the above copyright
11  *     notice, this list of conditions and the following disclaimer.
12  *  2. Redistributions in binary form must reproduce the above copyright
13  *     notice, this list of conditions and the following disclaimer in the
14  *     documentation and/or other materials provided with the distribution.
15  *  3. The name of the author may not be used to endorse or promote products
16  *     derived from this software without specific prior written permission.
17  *
18  *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  *  SUCH DAMAGE.
29  *
30  *
31  *  _LEGACY_ memory mapped devices.
32  *
33  *  NOTE:  Many of these devices are legacy devices, that are here for one
34  *         of these two reasons:
35  *
36  *		A)  Devices introduced before the DEVINIT system had to
37  *		    be declared somewhere.
38  *
39  *		B)  The way interrupt controllers and such were implemented
40  *		    up until release 0.4.3 requires that several parts of
41  *		    the program access internal fields of interrupt
42  *		    controllers' structs.
43  *
44  *         Both A and B need to be solved.
45  */
46 
47 #include <sys/types.h>
48 #include <inttypes.h>
49 
50 #include "interrupt.h"
51 
52 struct cpu;
53 struct machine;
54 struct memory;
55 struct pci_data;
56 struct timer;
57 
58 /* #ifdef WITH_X11
59 #include <X11/Xlib.h>
60 #endif */
61 
62 /*  dev_8259.c:  */
63 struct pic8259_data {
64 	struct interrupt irq;
65 
66 	int		irq_base;
67 	int		current_command;
68 
69 	int		init_state;
70 
71 	int		priority_reg;
72 	uint8_t		irr;		/*  interrupt request register  */
73 	uint8_t		isr;		/*  interrupt in-service register  */
74 	uint8_t		ier;		/*  interrupt enable register  */
75 };
76 
77 /*  dev_dec_ioasic.c:  */
78 #define	DEV_DEC_IOASIC_LENGTH		0xc0000
79 #define	MAX_IOASIC_DMA_FUNCTIONS	8
80 struct dec_ioasic_data {
81 	uint32_t	scsi_dmaptr;		/*  0x000  */
82 	uint32_t	scsi_nextptr;		/*  0x010  */
83 	uint32_t	lance_dmaptr;		/*  0x020  */
84 	uint32_t	floppy_dmaptr;		/*  0x070  */
85 	uint32_t	isdn_x_dmaptr;		/*  0x080  */
86 	uint32_t	isdn_x_nextptr;		/*  0x090  */
87 	uint32_t	isdn_r_dmaptr;		/*  0x0a0  */
88 	uint32_t	isdn_r_nextptr;		/*  0x0b0  */
89 	uint32_t	csr;			/*  0x100  */
90 	uint32_t	intr;			/*  0x110  */
91 	uint32_t	imsk;			/*  0x120  */
92 	uint32_t	isdn_x_data;		/*  0x140  */
93 	uint32_t	isdn_r_data;		/*  0x150  */
94 	uint32_t	lance_decode;		/*  0x160  */
95 	uint32_t	scsi_decode;		/*  0x170  */
96 	uint32_t	scc0_decode;		/*  0x180  */
97 	uint32_t	scc1_decode;		/*  0x190  */
98 	uint32_t	floppy_decode;		/*  0x1a0  */
99 	uint32_t	scsi_scr;		/*  0x1b0  */
100 	uint32_t	scsi_sdr0;		/*  0x1c0  */
101 	uint32_t	scsi_sdr1;		/*  0x1d0  */
102 
103 	int		(*dma_func[MAX_IOASIC_DMA_FUNCTIONS])(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
104 	void		*dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
105 	int		rackmount_flag;
106 	struct interrupt *irq;
107 	int		int_asserted;
108 };
109 void dec_ioasic_reassert(struct dec_ioasic_data*);
110 int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
111 struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag, struct interrupt* irq);
112 
113 /*  dev_asc.c:  */
114 #define	DEV_ASC_DEC_LENGTH		0x40000
115 #define	DEV_ASC_PICA_LENGTH		0x1000
116 #define	DEV_ASC_DEC		1
117 #define	DEV_ASC_PICA		2
118 int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
119 void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
120 	const char *irq_path, void *turbochannel, int mode,
121 	size_t (*dma_controller)(void *dma_controller_data,
122 		unsigned char *data, size_t len, int writeflag),
123 	void *dma_controller_data);
124 
125 /*  dev_bt431.c:  */
126 #define	DEV_BT431_LENGTH		0x20
127 #define	DEV_BT431_NREGS			0x800	/*  ?  */
128 int dev_bt431_access(struct cpu *cpu, struct memory *mem,
129 	uint64_t relative_addr, unsigned char *data, size_t len,
130 	int writeflag, void *);
131 struct vfb_data;
132 void dev_bt431_init(struct memory *mem, uint64_t baseaddr,
133 	struct vfb_data *vfb_data, int color_fb_flag);
134 
135 /*  dev_bt455.c:  */
136 #define	DEV_BT455_LENGTH		0x20
137 int dev_bt455_access(struct cpu *cpu, struct memory *mem,
138 	uint64_t relative_addr, unsigned char *data, size_t len,
139 	int writeflag, void *);
140 struct vfb_data;
141 void dev_bt455_init(struct memory *mem, uint64_t baseaddr,
142 	struct vfb_data *vfb_data);
143 
144 /*  dev_bt459.c:  */
145 #define	DEV_BT459_LENGTH		0x20
146 #define	DEV_BT459_NREGS			0x1000
147 #define	BT459_PX		1	/*  px[g]  */
148 #define	BT459_BA		2	/*  cfb  */
149 #define	BT459_BBA		3	/*  sfb  */
150 int dev_bt459_access(struct cpu *cpu, struct memory *mem,
151 	uint64_t relative_addr, unsigned char *data, size_t len,
152 	int writeflag, void *);
153 struct vfb_data;
154 void dev_bt459_init(struct machine *machine, struct memory *mem,
155 	uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
156 	int color_fb_flag, const char *irq_path, int type);
157 
158 /*  dev_colorplanemask.c:  */
159 #define	DEV_COLORPLANEMASK_LENGTH	0x0000000000000010
160 int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
161 	uint64_t relative_addr, unsigned char *data, size_t len,
162 	int writeflag, void *);
163 void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
164 	unsigned char *color_plane_mask);
165 
166 /*  dev_dc7085.c:  */
167 #define	DEV_DC7085_LENGTH		0x0000000000000080
168 /*  see dc7085.h for more info  */
169 void dev_dc7085_tick(struct cpu *cpu, void *);
170 int dev_dc7085_access(struct cpu *cpu, struct memory *mem,
171 	uint64_t relative_addr, unsigned char *data, size_t len,
172 	int writeflag, void *);
173 int dev_dc7085_init(struct machine *machine, struct memory *mem,
174 	uint64_t baseaddr, char *irq_path, int use_fb);
175 
176 /*  dev_dec5800.c:  */
177 #define	DEV_DECCCA_LENGTH			0x10000	/*  ?  */
178 #define	DEC_DECCCA_BASEADDR			0x19000000	/*  ?  I just made this up  */
179 int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
180 void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
181 #define	DEV_DECXMI_LENGTH			0x800000
182 int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
183 void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
184 
185 /*  dev_fb.c:  */
186 #define	DEV_FB_LENGTH		0x3c0000	/*  3c0000 to not colide with */
187 						/*  turbochannel rom,         */
188 						/*  otherwise size = 4MB      */
189 /*  Type:  */
190 #define	VFB_GENERIC		0
191 #define	VFB_HPC			1
192 #define	VFB_DEC_VFB01		2
193 #define	VFB_DEC_VFB02		3
194 #define	VFB_DEC_MAXINE		4
195 #define	VFB_PLAYSTATION2	5
196 /*  Extra flags:  */
197 #define	VFB_REVERSE_START	0x10000
198 struct vfb_data {
199 	struct memory	*memory;
200 	int		vfb_type;
201 
202 	int		vfb_scaledown;
203 
204 	int		xsize;
205 	int		ysize;
206 	int		bit_depth;
207 	int		color32k;	/*  hack for 16-bit HPCmips  */
208 	int		psp_15bit;	/*  playstation portable hack  */
209 
210 	unsigned char	color_plane_mask;
211 
212 	int		bytes_per_line;		/*  cached  */
213 
214 	int		visible_xsize;
215 	int		visible_ysize;
216 
217 	size_t		framebuffer_size;
218 	int		x11_xsize, x11_ysize;
219 
220 	int		update_x1, update_y1, update_x2, update_y2;
221 
222 	/*  RGB palette for <= 8 bit modes:  (r,g,b bytes for each)  */
223 	unsigned char	rgb_palette[256 * 3];
224 
225 	char		*name;
226 	char		title[100];
227 
228 	void (*redraw_func)(struct vfb_data *, int, int);
229 
230 	/*  These should always be in sync:  */
231 	unsigned char	*framebuffer;
232 	struct fb_window *fb_window;
233 };
234 #define	VFB_MFB_BT455			0x100000
235 #define	VFB_MFB_BT431			0x180000
236 #define	VFB_MFB_VRAM			0x200000
237 #define	VFB_CFB_BT459			0x200000
238 void set_grayscale_palette(struct vfb_data *d, int ncolors);
239 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
240 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
241         int cursor_xsize, int cursor_ysize);
242 void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
243 	int fill_g, int fill_b, int x1, int y1, int x2, int y2,
244 	int from_x, int from_y);
245 void dev_fb_tick(struct cpu *, void *);
246 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
247 	unsigned char *data, size_t len, int writeflag, void *);
248 struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
249 	uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
250 	int xsize, int ysize, int bit_depth, const char *name);
251 
252 /*  dev_gt.c:  */
253 #define	DEV_GT_LENGTH			0x1000
254 int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
255 	unsigned char *data, size_t len, int writeflag, void *);
256 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
257 	uint64_t baseaddr, const char *timer_irq_path, const char *isa_irq_path, int type);
258 
259 /*  dev_jazz.c:  */
260 size_t dev_jazz_dma_controller(void *dma_controller_data,
261 	unsigned char *data, size_t len, int writeflag);
262 
263 /*  dev_kn01.c:  */
264 #define	DEV_KN01_LENGTH			4
265 int dev_kn01_access(struct cpu *cpu, struct memory *mem,
266 	uint64_t relative_addr, unsigned char *data, size_t len,
267 	int writeflag, void *);
268 void dev_kn01_init(struct memory *mem, uint64_t baseaddr, int color_fb);
269 #define	DEV_VDAC_LENGTH			0x20
270 #define	DEV_VDAC_MAPWA			    0x00
271 #define	DEV_VDAC_MAP			    0x04
272 #define	DEV_VDAC_MASK			    0x08
273 #define	DEV_VDAC_MAPRA			    0x0c
274 #define	DEV_VDAC_OVERWA			    0x10
275 #define	DEV_VDAC_OVER			    0x14
276 #define	DEV_VDAC_OVERRA			    0x1c
277 int dev_vdac_access(struct cpu *cpu, struct memory *mem,
278 	uint64_t relative_addr, unsigned char *data, size_t len,
279 	int writeflag, void *);
280 void dev_vdac_init(struct memory *mem, uint64_t baseaddr,
281 	unsigned char *rgb_palette, int color_fb_flag);
282 
283 /*  dev_kn220.c:  */
284 #define	DEV_DEC5500_IOBOARD_LENGTH		0x100000
285 int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
286 struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
287 #define	DEV_SGEC_LENGTH		0x1000
288 int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
289 void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
290 
291 /*  dev_le.c:  */
292 #define	DEV_LE_LENGTH			0x1c0200
293 int dev_le_access(struct cpu *cpu, struct memory *mem,
294 	uint64_t relative_addr, unsigned char *data, size_t len,
295 	int writeflag, void *);
296 void dev_le_init(struct machine *machine, struct memory *mem,
297 	uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
298 	const char *irq_path, int len);
299 
300 /*  dev_mc146818.c:  */
301 #define	DEV_MC146818_LENGTH		0x0000000000000100
302 #define	MC146818_DEC		0
303 #define	MC146818_PC_CMOS	1
304 #define	MC146818_ARC_NEC	2
305 #define	MC146818_ARC_JAZZ	3
306 #define	MC146818_SGI		4
307 #define	MC146818_CATS		5
308 #define	MC146818_ALGOR		6
309 #define	MC146818_PMPPC		7
310 /*  see mc146818reg.h for more info  */
311 void dev_mc146818_tick(struct cpu *cpu, void *);
312 int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
313 	uint64_t relative_addr, unsigned char *data, size_t len,
314 	int writeflag, void *);
315 void dev_mc146818_init(struct machine *machine, struct memory *mem,
316 	uint64_t baseaddr, char *irq_path, int access_style, int addrdiv);
317 
318 /*  dev_pckbc.c:  */
319 #define	DEV_PCKBC_LENGTH		0x10
320 #define	PCKBC_8042		0
321 #define	PCKBC_8242		1
322 #define	PCKBC_JAZZ		3
323 int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
324 	uint64_t relative_addr, unsigned char *data, size_t len,
325 	int writeflag, void *);
326 int dev_pckbc_init(struct machine *machine, struct memory *mem,
327 	uint64_t baseaddr, int type, char *keyboard_irqpath,
328 	char *mouse_irqpath, int in_use, int pc_style_flag);
329 
330 /*  dev_pmagja.c:  */
331 #define	DEV_PMAGJA_LENGTH		0x3c0000
332 int dev_pmagja_access(struct cpu *cpu, struct memory *mem,
333 	uint64_t relative_addr, unsigned char *data, size_t len,
334 	int writeflag, void *);
335 void dev_pmagja_init(struct machine *machine, struct memory *mem,
336 	uint64_t baseaddr, const char *irq_path);
337 
338 /*  dev_px.c:  */
339 struct px_data {
340 	struct memory		*fb_mem;
341 	struct vfb_data		*vfb_data;
342 	int			type;
343 	const char		*px_name;
344 	struct interrupt	irq;
345 	int			bitdepth;
346 	int			xconfig;
347 	int			yconfig;
348 
349 	uint32_t		intr;
350 	unsigned char		sram[128 * 1024];
351 };
352 /*  TODO: perhaps these types are wrong?  */
353 #define	DEV_PX_TYPE_PX			0
354 #define	DEV_PX_TYPE_PXG			1
355 #define	DEV_PX_TYPE_PXGPLUS		2
356 #define	DEV_PX_TYPE_PXGPLUSTURBO	3
357 #define	DEV_PX_LENGTH			0x3c0000
358 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
359 	unsigned char *data, size_t len, int writeflag, void *);
360 void dev_px_init(struct machine *machine, struct memory *mem,
361 	uint64_t baseaddr, int px_type, const char *irq_path);
362 
363 /*  dev_ram.c:  */
364 #define	DEV_RAM_RAM				0
365 #define	DEV_RAM_MIRROR				1
366 #define	DEV_RAM_MIGHT_POINT_TO_DEVICES		0x10
367 #define	DEV_RAM_TRACE_ALL_ACCESSES		0x20
368 int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
369 	unsigned char *data, size_t len, int writeflag, void *);
370 void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length,
371 	int mode, uint64_t otheraddr, const char* name = NULL);
372 
373 /*  dev_scc.c:  */
374 #define	DEV_SCC_LENGTH			0x1000
375 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
376 	unsigned char *data, size_t len, int writeflag, void *);
377 int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr,
378 	size_t dma_len, int tx);
379 void *dev_scc_init(struct machine *machine, struct memory *mem,
380 	uint64_t baseaddr, char* irq_path, int use_fb, int scc_nr, int addrmul);
381 
382 /*  dev_sfb.c:  */
383 #define	DEV_SFB_LENGTH		0x400000
384 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
385 	unsigned char *data, size_t len, int writeflag, void *);
386 void dev_sfb_init(struct machine *machine, struct memory *mem,
387 	uint64_t baseaddr, struct vfb_data *vfb_data);
388 
389 /*  dev_sgi_gbe.c:  */
390 #define	DEV_SGI_GBE_LENGTH		0x1000000
391 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem,
392 	uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
393 	void *);
394 void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
395 	uint64_t baseaddr);
396 
397 /*  dev_sgi_re.cc:  */
398 // SGI O2 Rendering Engine:
399 #define	DEV_SGI_RE_LENGTH		0x1000
400 int dev_sgi_re_access(struct cpu *cpu, struct memory *mem,
401 	uint64_t relative_addr, unsigned char *data, size_t len,
402 	int writeflag, void *);
403 void dev_sgi_re_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
404 // SGI O2 Drawing Engine:
405 #define	DEV_SGI_DE_LENGTH		0x1000
406 int dev_sgi_de_access(struct cpu *cpu, struct memory *mem,
407 	uint64_t relative_addr, unsigned char *data, size_t len,
408 	int writeflag, void *);
409 void dev_sgi_de_init(struct memory *mem, uint64_t baseaddr, struct sgi_re_data *);
410 // SGI O2 Memory Transfer Engine:
411 #define	DEV_SGI_MTE_LENGTH		0x1000
412 int dev_sgi_re_access(struct cpu *cpu, struct memory *mem,
413 	uint64_t relative_addr, unsigned char *data, size_t len,
414 	int writeflag, void *);
415 void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr, struct sgi_re_data *);
416 // SGI O2 Rendering Engine:
417 #define	DEV_SGI_DE_STATUS_LENGTH		0x1000
418 int dev_sgi_de_access(struct cpu *cpu, struct memory *mem,
419 	uint64_t relative_addr, unsigned char *data, size_t len,
420 	int writeflag, void *);
421 void dev_sgi_de_status_init(struct memory *mem, uint64_t baseaddr, struct sgi_re_data *);
422 
423 
424 /*  dev_sgi_ip20.c:  */
425 #define	DEV_SGI_IP20_LENGTH		0x40
426 #define	DEV_SGI_IP20_BASE		0x1fb801c0
427 struct sgi_ip20_data {
428 	int		dummy;
429 };
430 int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
431 struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
432 
433 /*  dev_sgi_ip22.c:  */
434 #define	DEV_SGI_IP22_LENGTH		0x100
435 #define	DEV_SGI_IP22_IMC_LENGTH		0x100
436 #define	DEV_SGI_IP22_UNKNOWN2_LENGTH	0x100
437 #define	IP22_IMC_BASE			0x1fa00000
438 #define	IP22_UNKNOWN2_BASE		0x1fb94000
439 struct sgi_ip22_data {
440 	int		guiness_flag;
441 	uint32_t	reg[DEV_SGI_IP22_LENGTH / 4];
442 	uint32_t	imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
443 	uint32_t	unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
444 	uint32_t	unknown_timer;
445 };
446 int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
447 struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
448 
449 /*  dev_sgi_ip32.c:  */
450 void dev_crime_init(struct machine *machine, struct memory *mem,
451 	uint64_t baseaddr, char *irq_path, int use_fb);
452 #define	DEV_MACEPCI_LENGTH		0x1000
453 int dev_macepci_access(struct cpu *cpu, struct memory *mem,
454 	uint64_t relative_addr, unsigned char *data, size_t len,
455 	int writeflag, void *);
456 struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem,
457 	uint64_t baseaddr, char *irq_path);
458 #define	DEV_SGI_MEC_LENGTH		0x1000
459 int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem,
460 	uint64_t relative_addr, unsigned char *data, size_t len,
461 	int writeflag, void *);
462 void dev_sgi_mec_init(struct machine *machine, struct memory *mem,
463 	uint64_t baseaddr, char *irq_path, unsigned char *macaddr);
464 #define	DEV_SGI_UST_LENGTH		0x10000
465 int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem,
466 	uint64_t relative_addr, unsigned char *data, size_t len,
467 	int writeflag, void *);
468 void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
469 
470 /*  dev_sii.c:  */
471 #define	DEV_SII_LENGTH			0x100
472 void dev_sii_tick(struct cpu *cpu, void *);
473 int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
474 	unsigned char *data, size_t len, int writeflag, void *);
475 void dev_sii_init(struct machine *machine, struct memory *mem,
476 	uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
477 	char *irq_path);
478 
479 /*  dev_ssc.c:  */
480 #define	DEV_SSC_LENGTH			0x1000
481 int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
482 	unsigned char *data, size_t len, int writeflag, void *);
483 void dev_ssc_init(struct machine *machine, struct memory *mem,
484 	uint64_t baseaddr, const char *irq_path, int use_fb);
485 
486 /*  dev_turbochannel.c:  */
487 #define	DEV_TURBOCHANNEL_LEN		0x0470
488 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
489 	uint64_t relative_addr, unsigned char *data, size_t len,
490 	int writeflag, void *);
491 void dev_turbochannel_init(struct machine *machine, struct memory *mem,
492 	int slot_nr, uint64_t baseaddr, uint64_t endaddr, const char *device_name,
493 	const char *irq_path);
494 
495 /*  dev_uninorth.c:  */
496 struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem,
497 	uint64_t addr, int irqbase, int pciirq);
498 
499 /*  dev_vga.c:  */
500 int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
501 	unsigned char *data, size_t len, int writeflag, void *);
502 void dev_vga_init(struct machine *machine, struct memory *mem,
503 	uint64_t videomem_base, uint64_t control_base, const char *name);
504 
505 /*  dev_vr41xx.c:  */
506 struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
507 	struct memory *mem, int cpumodel);
508 
509 /*  lk201.c:  */
510 struct lk201_data {
511         int                     use_fb;
512 	int			console_handle;
513 
514         void                    (*add_to_rx_queue)(void *,int,int);
515 	void			*add_data;
516 
517         unsigned char           keyb_buf[8];
518         int                     keyb_buf_pos;
519 
520         int                     mouse_mode;
521         int                     mouse_revision;         /*  0..15  */
522         int                     mouse_x, mouse_y, mouse_buttons;
523 };
524 void lk201_tick(struct machine *, struct lk201_data *);
525 void lk201_tx_data(struct lk201_data *, int port, int idata);
526 void lk201_init(struct lk201_data *d, int use_fb,
527 	void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
528 
529 
530 #endif	/*  DEVICES_H  */
531 
532