1 /* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Midhunchandra Kodiyath <midhunchandra.kodiyath@intel.com> 26 * 27 */ 28 29 #ifndef _MEDIA__DRIVER_UTILS_H 30 #define _MEDIA__DRIVER_UTILS_H 31 #include "media_drv_defines.h" 32 #include "media_drv_util.h" 33 #include <intel_bufmgr.h> 34 #include <va/va.h> 35 #include <va/va_backend.h> 36 #define MAX_GPE_KERNELS 32 37 typedef struct media_resource 38 { 39 dri_bo *bo; 40 UINT bo_size; 41 UINT pitch; 42 UINT tiling; 43 UINT swizzle; 44 UINT width; 45 UINT height; 46 BYTE *buf; 47 UINT surface_array_spacing; //move this out of this struct later 48 UINT cb_cr_pitch; 49 UINT x_cb_offset; 50 UINT y_cb_offset; 51 } MEDIA_RESOURCE; 52 53 typedef struct _media_kernel 54 { 55 BYTE *name; 56 INT interface; 57 const UINT *bin; 58 UINT size; 59 dri_bo *bo; 60 UINT kernel_offset; 61 } MEDIA_KERNEL; 62 typedef struct _instruction_state 63 { 64 MEDIA_RESOURCE buff_obj; 65 UINT end_offset; 66 } INSTRUCTION_TYPE; 67 68 typedef struct _surface_state_binding_table 69 { 70 MEDIA_RESOURCE res; /* in bytes */ 71 CHAR *table_name; 72 } SURFACE_STATE_BINDING_TABLE; 73 74 75 typedef struct _dynamic_state 76 { 77 MEDIA_RESOURCE res; 78 UINT end_offset; 79 } DYNAMIC_STATE; 80 typedef struct _idrt 81 { 82 MEDIA_RESOURCE buff_obj; 83 UINT max_entries; 84 UINT entry_size; /* in bytes */ 85 } IDRT; 86 87 typedef struct _curbe 88 { 89 MEDIA_RESOURCE buff_obj; 90 UINT length; /* in bytes */ 91 } CURBE; 92 typedef struct _vfe_state 93 { 94 UINT gpgpu_mode:1; 95 UINT pad0:7; 96 UINT max_num_threads:16; 97 UINT num_urb_entries:8; 98 UINT urb_entry_size:16; 99 UINT curbe_allocation_size:16; 100 101 /* vfe_desc5/6/7 is used to determine whether the HW scoreboard is used. 102 * If scoreboard is not used, don't touch them 103 */ 104 union 105 { 106 UINT dword; 107 struct 108 { 109 UINT mask:8; 110 UINT pad:22; 111 UINT type:1; 112 UINT enable:1; 113 } scoreboard0; 114 } vfe_desc5; 115 116 union 117 { 118 UINT dword; 119 struct 120 { 121 INT delta_x0:4; 122 INT delta_y0:4; 123 INT delta_x1:4; 124 INT delta_y1:4; 125 INT delta_x2:4; 126 INT delta_y2:4; 127 INT delta_x3:4; 128 INT delta_y3:4; 129 } scoreboard1; 130 } vfe_desc6; 131 132 union 133 { 134 UINT dword; 135 struct 136 { 137 INT delta_x4:4; 138 INT delta_y4:4; 139 INT delta_x5:4; 140 INT delta_y5:4; 141 INT delta_x6:4; 142 INT delta_y6:4; 143 INT delta_x7:4; 144 INT delta_y7:4; 145 } scoreboard2; 146 } vfe_desc7; 147 } VFE_STATE; 148 149 typedef struct _status_buffer 150 { 151 MEDIA_RESOURCE res; 152 } STATUS_BUFFER; 153 154 typedef struct _media_gpe_context 155 { 156 MEDIA_KERNEL kernels[MAX_GPE_KERNELS]; 157 UINT num_kernels; 158 INSTRUCTION_TYPE instruction_state; 159 SURFACE_STATE_BINDING_TABLE surface_state_binding_table; 160 DYNAMIC_STATE dynamic_state; 161 STATUS_BUFFER status_buffer; 162 IDRT idrt; 163 CURBE curbe; 164 VFE_STATE vfe_state; 165 UINT sampler_offset; 166 INT sampler_size; 167 UINT idrt_offset; 168 INT idrt_size; 169 UINT curbe_offset; 170 INT curbe_size; 171 } MEDIA_GPE_CTX; 172 VOID 173 media_gpe_context_init (VADriverContextP ctx, MEDIA_GPE_CTX * gpe_context); 174 VOID 175 media_gpe_load_kernels (VADriverContextP ctx, 176 MEDIA_GPE_CTX * gpe_context, 177 MEDIA_KERNEL * kernel_list, UINT num_kernels); 178 VOID media_gpe_context_destroy (MEDIA_GPE_CTX * gpe_context); 179 #endif 180