1 /* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Midhunchandra Kodiyath <midhunchandra.kodiyath@intel.com> 26 * 27 */ 28 29 30 #ifndef _MEDIA__DRIVER_KERNELS_H 31 #define _MEDIA__DRIVER_KERNELS_H 32 #include "media_drv_defines.h" 33 #define MEDIA_VP8_MBENC_I_SZ 0x5c40 34 extern const UINT MEDIA_VP8_MBENC_I[MEDIA_VP8_MBENC_I_SZ]; 35 36 #define MEDIA_VP8_MBENC_ICHROMA_SZ 0xa300 37 extern const UINT MEDIA_VP8_MBENC_ICHROMA[MEDIA_VP8_MBENC_ICHROMA_SZ]; 38 39 #define MEDIA_VP8_MBENC_FRM_P_SZ 0x6f40 //0x10750 40 extern const UINT MEDIA_VP8_MBENC_FRM_P[MEDIA_VP8_MBENC_FRM_P_SZ]; 41 42 43 #define MEDIA_VP8_MBENC_ILuma_SZ 0xb9f0 44 extern const UINT MEDIA_VP8_MBENC_ILuma[MEDIA_VP8_MBENC_ILuma_SZ]; 45 46 47 #define MEDIA_VP8_HME_P_SZ 0x1190 48 extern const UINT MEDIA_VP8_HME_P[MEDIA_VP8_HME_P_SZ]; 49 50 51 #define MEDIA_VP8_HME_DOWNSCALE_SZ 0xf10 52 extern const UINT MEDIA_VP8_HME_DOWNSCALE[MEDIA_VP8_HME_DOWNSCALE_SZ]; 53 54 #define MEDIA_VP8_PAK_PHASE1_SZ 0x78d0 55 extern const UINT MEDIA_VP8_PAK_PHASE1[MEDIA_VP8_PAK_PHASE1_SZ]; 56 57 #define MEDIA_VP8_PAK_PHASE2_SZ 0x9a80 58 extern const UINT MEDIA_VP8_PAK_PHASE2[MEDIA_VP8_PAK_PHASE2_SZ]; 59 60 61 #define MEDIA_VP8_INTRA_DIS_BRC_SZ 0xa10 62 extern const UINT MEDIA_VP8_INTRA_DIS_BRC[MEDIA_VP8_INTRA_DIS_BRC_SZ]; 63 64 #define MEDIA_VP8_BRC_INIT_SZ 0x17c0 65 extern const UINT MEDIA_VP8_BRC_INIT[MEDIA_VP8_BRC_INIT_SZ]; 66 67 68 #define MEDIA_VP8_BRC_RESET_SZ 0x19f0 69 extern const UINT MEDIA_VP8_BRC_RESET[MEDIA_VP8_BRC_RESET_SZ]; 70 71 #define MEDIA_VP8_BRC_UPDATE_SZ 0x9280 72 extern const UINT MEDIA_VP8_BRC_UPDATE[MEDIA_VP8_BRC_UPDATE_SZ]; 73 #endif 74