1 /* 2 * Copyright (c) 2014-2020, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_state_heap.h 24 //! \brief This modules implements HW interface layer to be used on all platforms on all operating systems/DDIs, across MHW components. 25 //! 26 #ifndef __MHW_STATE_HEAP_H__ 27 #define __MHW_STATE_HEAP_H__ 28 29 #include "mos_os.h" 30 #include "mhw_utilities.h" 31 #include "heap_manager.h" 32 33 typedef struct _MHW_STATE_HEAP_MEMORY_BLOCK MHW_STATE_HEAP_MEMORY_BLOCK, *PMHW_STATE_HEAP_MEMORY_BLOCK; 34 typedef struct _MHW_STATE_HEAP_INTERFACE MHW_STATE_HEAP_INTERFACE, *PMHW_STATE_HEAP_INTERFACE; 35 typedef class XMHW_STATE_HEAP_INTERFACE *PXMHW_STATE_HEAP_INTERFACE; 36 typedef struct _MHW_STATE_HEAP MHW_STATE_HEAP, *PMHW_STATE_HEAP; 37 typedef struct MHW_BLOCK_MANAGER *PMHW_BLOCK_MANAGER; 38 39 #define MHW_INDIRECT_HEAP_SIZE MHW_PAGE_SIZE 40 #define MHW_SURFACE_PITCH_ALIGNMENT 128 41 #define MHW_MAX_SURFACE_PLANES 3 42 43 #define MHW_NUM_HW_POLYPHASE_TABLES 17 44 #define MHW_NUM_HW_POLYPHASE_EXTRA_TABLES_G9 15 45 46 //! 47 //! \brief GSH Defaults and limits 48 //! 49 #define MHW_MEDIA_STATE_ALIGN 128 50 #define MHW_SCRATCH_SPACE_ALIGN 1024 51 #define MHW_SAMPLER_STATE_ALIGN 64 52 #define MHW_SAMPLER_STATE_VA_ALIGN 32 53 #define MHW_SAMPLER_STATE_AVS_ALIGN 1024 54 #define MHW_SAMPLER_STATE_AVS_ALIGN_G9 2048 55 56 #define MHW_SAMPLER_STATE_AVS_ALIGN_MEDIA 1024 // per old HWCMD files AVS samplers were aligned to 256. Not sure if this is needed 57 #define MHW_SURFACE_STATE_ALIGN 64 // (1 << MHW_BINDING_TABLE_OFFSET_SHIFT) 58 59 // Each increment in sampler index represents this increment in offset 60 #define MHW_SAMPLER_STATE_VA_INC 32 61 #define MHW_SAMPLER_STATE_CONV_1D_INC 128 62 #define MHW_AVS_SAMPLER_WIDTH_ALIGN_UNIT 2 63 #define MHW_SAMPLER_STATE_AVS_INC_LEGACY 512 64 #define MHW_AVS_SAMPLER_HEIGHT_ALIGN_UNIT 2 65 #define MHW_SAMPLER_STATE_CONV_INC_LEGACY 512 66 67 #define MHW_INVALID_BINDING_TABLE_IDX 0xFFFFFFFF 68 69 #define MHW_ASSERT_INVALID_BINDING_TABLE_IDX(index) \ 70 { \ 71 if ((index) == MHW_INVALID_BINDING_TABLE_IDX) \ 72 { \ 73 MHW_ASSERTMESSAGE("Invalid (nullptr) Pointer."); \ 74 eStatus = MOS_STATUS_UNKNOWN; \ 75 return eStatus; \ 76 } \ 77 } 78 79 #define MHW_INVALID_SYNC_TAG 0xFFFFFFFF 80 81 enum MW_RENDER_ENGINE_ADDRESS_SHIFT 82 { 83 MHW_STATE_HEAP_SURFACE_STATE_SHIFT = 0 84 }; 85 86 typedef enum _MHW_STATE_HEAP_PARAM_SHIFTS 87 { 88 MHW_SLM_SHIFT = 2, 89 MHW_BINDING_TABLE_OFFSET_SHIFT = 6, 90 MHW_BINDING_TABLE_ID_SHIFT = 5, 91 MHW_SAMPLER_SHIFT = 5, 92 MHW_CURBE_SHIFT = 5, 93 MHW_THRD_CON_DATA_RD_SHIFT = 5, 94 MHW_KERNEL_OFFSET_SHIFT = 6, 95 MHW_SAMPLER_INDIRECT_SHIFT = 6, 96 MHW_SCRATCH_SPACE_SHIFT = 10, 97 MHW_SSH_BASE_SHIFT = 12, 98 MHW_COMPUTE_INDIRECT_SHIFT = 6 99 } MHW_STATE_HEAP_PARAM_SHIFTS; 100 101 typedef enum _MHW_FRAME_FIELD_TYPE 102 { 103 MHW_FRAME = 0, 104 MHW_TOP_FIELD, 105 MHW_BOTTOM_FIELD, 106 MHW_NUM_FRAME_FIELD_TYPES, 107 } MHW_FRAME_FIELD_TYPE; 108 109 typedef enum _MHW_STATE_HEAP_TYPE 110 { 111 MHW_ISH_TYPE = 0, 112 MHW_DSH_TYPE, 113 MHW_SSH_TYPE //!< Note SSH is currently managed by MOS 114 } MHW_STATE_HEAP_TYPE; 115 116 typedef enum _MHW_STATE_HEAP_MODE 117 { 118 MHW_RENDER_HAL_MODE = 0, //!< 0 - RenderHal handles 119 MHW_DSH_MODE, //!< 1 - MDF dynamic heap management 120 MHW_DGSH_MODE //!< 2 - Ddynamic generic heap management 121 }MHW_STATE_HEAP_MODE; 122 123 typedef enum _MHW_PLANE 124 { 125 MHW_GENERIC_PLANE = 0, // 1D Surface: MHW_GENERIC_PLANE, 2D Surface: MHW_Y_PLANE 126 MHW_Y_PLANE = 0, 127 MHW_U_PLANE, 128 MHW_V_PLANE, 129 } MHW_PLANE; 130 131 //! 132 //! \brief MHW Rotation Mode enum 133 //! 134 typedef enum _MHW_ROTATION 135 { 136 MHW_ROTATION_IDENTITY = 0, //!< Rotation 0 degrees 137 MHW_ROTATION_90, //!< Rotation 90 degrees 138 MHW_ROTATION_180, //!< Rotation 180 degrees 139 MHW_ROTATION_270, //!< Rotation 270 degrees 140 MHW_MIRROR_HORIZONTAL, //!< Horizontal Mirror 141 MHW_MIRROR_VERTICAL, //!< Vertical Mirror 142 MHW_ROTATE_90_MIRROR_VERTICAL, //!< 90 + V Mirror 143 MHW_ROTATE_90_MIRROR_HORIZONTAL //!< 90 + H Mirror 144 } MHW_ROTATION; 145 146 //! 147 //! \brief Render chroma siting vertical value 148 //! 149 typedef enum _MHW_CHROMA_SITING_VDIRECTION 150 { 151 MHW_CHROMA_SITING_VDIRECTION_0 = 0x0, 152 MHW_CHROMA_SITING_VDIRECTION_1_4 = 0x1, 153 MHW_CHROMA_SITING_VDIRECTION_1_2 = 0x2, 154 MHW_CHROMA_SITING_VDIRECTION_3_4 = 0x3, 155 MHW_CHROMA_SITING_VDIRECTION_1 = 0x4 156 } MHW_CHROMA_SITING_VDIRECTION; 157 158 //! 159 //! \brief Chroma Siting enum 160 //! 161 typedef enum _MHW_CHROMA_SITING 162 { 163 MHW_CHROMA_SITING_NONE = 0, 164 MHW_CHROMA_SITING_HORZ_LEFT = 1 << 0, 165 MHW_CHROMA_SITING_HORZ_CENTER = 1 << 1, 166 MHW_CHROMA_SITING_HORZ_RIGHT = 1 << 2, 167 MHW_CHROMA_SITING_VERT_TOP = 1 << 4, 168 MHW_CHROMA_SITING_VERT_CENTER = 1 << 5, 169 MHW_CHROMA_SITING_VERT_BOTTOM = 1 << 6, 170 } MHW_CHROMA_SITING; 171 172 //! 173 //! \brief Scaling mode enum 174 //! 175 typedef enum _MHW_SCALING_MODE 176 { 177 MHW_SCALING_NEAREST = 0, 178 MHW_SCALING_BILINEAR, 179 MHW_SCALING_AVS 180 } MHW_SCALING_MODE; 181 182 //! 183 //! \brief AVS Params 184 //! 185 typedef struct _MHW_AVS_PARAMS 186 { 187 MOS_FORMAT Format; 188 float fScaleX; 189 float fScaleY; 190 int32_t *piYCoefsX; 191 int32_t *piYCoefsY; 192 int32_t *piUVCoefsX; 193 int32_t *piUVCoefsY; 194 bool bForcePolyPhaseCoefs; 195 bool bUse8x8Filter; 196 } MHW_AVS_PARAMS, *PMHW_AVS_PARAMS; 197 198 // Memory block state 199 typedef enum _MHW_BLOCK_STATE 200 { 201 MHW_BLOCK_STATE_POOL = 0, //!< Block belongs to the pool of memory block objects, it doesn't point to a valid memory block, most fields may be invalid. 202 MHW_BLOCK_STATE_FREE, //!< Block points to available memory in State Heap 203 MHW_BLOCK_STATE_ALLOCATED, //!< Block points to allocated area in State Heap (allocated but not in use by GPU) 204 MHW_BLOCK_STATE_SUBMITTED, //!< Block points to area in State Heap that was submitted for execution by GPU; memory cannot be overwritten or deleted before workload is finished. 205 MHW_BLOCK_STATE_DELETED, //!< Block is marked for deletion (State Heap is being deleted). 206 207 MHW_BLOCK_STATE_COUNT = 5 208 } MHW_BLOCK_STATE; 209 210 struct _MHW_STATE_HEAP_MEMORY_BLOCK 211 { 212 //! 213 //! \brief The sync tag ID for the memory block may be used to determine 214 //! whether or not the memory block is in use--if the ID is 215 //! invalid (+1 to the defined maximum number of sync tags), the 216 //! memory block is not in use and some or all of it may be used 217 //! for a new kernel state region. 218 //! 219 FrameTrackerTokenFlat trackerToken; 220 221 uint32_t dwBlockSize; 222 PMHW_STATE_HEAP pStateHeap; 223 uint32_t dwOffsetInStateHeap; 224 bool bStatic; //!< The kernel state region in this state heap is static and will not be removed during cleanup step. 225 226 _MHW_STATE_HEAP_MEMORY_BLOCK *pPrev; 227 _MHW_STATE_HEAP_MEMORY_BLOCK *pNext; 228 229 //! 230 //! \brief The following code is for the MHW dynamic state heap implementation by MDF. 231 //! Code is not yet unified across all media driver components 232 //! 233 MHW_BLOCK_STATE BlockState: 16; //!< Current block state (void, free, allocated, in use, completed, deleted) 234 uint32_t bDelete : 1; //!< Block is flagged for deletion upon completion 235 uint32_t Reserved : 15; //!< Reserved (uniq block ID used for tracking block utilization by system) 236 237 PMHW_STATE_HEAP_MEMORY_BLOCK pHeapNext; //!< Next block in same state heap (adjacent), null if last 238 PMHW_STATE_HEAP_MEMORY_BLOCK pHeapPrev; //!< Previous block in same state heap (adjacent), null if first 239 240 uint8_t *pDataPtr; //!< Pointer to aligned data 241 uint32_t dwDataOffset; //!< Offset of pDataPtr (from State Heap Base - used in state programming) 242 uint32_t dwDataSize; //!< Data size (>= requested size due to heap granularity) 243 uint32_t dwAlignment; //!< Offset alignment (offset from actual block start) 244 }; 245 246 typedef struct _MHW_KERNEL_PARAM 247 { 248 void *pExtra; //!< Kernel parameter 249 uint8_t *pBinary; //!< Pointer to kernel binary 250 int32_t iSize; //!< Kernel size 251 int32_t iGrfCount; //!< Number of registers 252 int32_t iBTCount; //!< Number of BT entries 253 int32_t iThreadCount; //!< Number of threads (max) 254 int32_t iGrfStartRegister; //!< Start register 255 int32_t iSamplerCount; //!< Sampler count 256 int32_t iSamplerLength; //!< Sampler length 257 int32_t iCurbeLength; //!< Constant URB length 258 int32_t iIdCount; //!< Num IDs used by kernel state 259 int32_t iInlineDataLength; //!< MEDIA_OBJECT inline data (aka URB length) 260 int32_t iBlockWidth; //!< Block width 261 int32_t iBlockHeight; //!< Block height 262 263 //! 264 //! \brief Dynamic kernel parameters may follow below if necessary. 265 //! 266 int32_t bLoaded; //!< Kernel Loaded flag 267 int32_t iKID; //!< Interface descriptor ID for the kernel 268 int32_t iKUID; //!< Kernel Unique ID 269 int32_t iKCID; //!< Kernel Cache ID 270 int32_t iAKBaseID; //!< Authenticated Kernel Base ID 271 272 bool bForceReload; //!< The flag to indicate if the kernel need to be reloaded forcibly 273 274 } MHW_KERNEL_PARAM, *PMHW_KERNEL_PARAM; 275 276 typedef struct MHW_KERNEL_STATE 277 { MHW_KERNEL_STATEMHW_KERNEL_STATE278 MHW_KERNEL_STATE() 279 { 280 m_dshRegion = MemoryBlock(); 281 m_ishRegion = MemoryBlock(); 282 } 283 ~MHW_KERNEL_STATEMHW_KERNEL_STATE284 virtual ~MHW_KERNEL_STATE() { MHW_FUNCTION_ENTER; } 285 //! 286 //! \brief Set when the kernel state is created 287 //! 288 MHW_KERNEL_PARAM KernelParams = {}; //!< Kernel parameters 289 290 //! 291 //! \brief Set when the kernel state region for the kernel state 292 //! is acquired. 293 //! Note: For state heaps other than the SSH it is possible to 294 //! make a kernel state region static, such that it belongs 295 //! to the kernel state and it is not necessary to acquire a 296 //! kernel state region for the DSH/ISH (whichever is 297 //! static). 298 //! 299 uint32_t dwSshOffset = 0; //!< Offset within SSH to the kernel state region 300 uint32_t dwBindingTableSize = 0; //!< The size of the binding table for this kernel state 301 uint32_t dwSshSize = 0; //!< Size of the kernel state region in the SSH 302 uint32_t dwIdOffset = 0; //!< Offset within DSH to ID(s) in kernel state region 303 uint32_t dwCurbeOffset = 0; //!< Offset within DSH to CURBE(s) in kernel state region 304 uint32_t dwSamplerOffset = 0; //!< Offset within DSH to Sampler(s) in kernel state region 305 uint32_t dwKernelBinaryOffset = 0; //!< Offset within ISH to the kernel state region 306 307 //! 308 //! \brief Descriptors of the DSH/ISH kernel state regions. Since there 309 //! may be multiple DSH/ISH buffers, it is necessary to store 310 //! which one is used. If one of the regions is static, the memory 311 //! block pointer is always expected to be valid. 312 //! 313 MemoryBlock m_dshRegion; 314 MemoryBlock m_ishRegion; 315 316 uint32_t m_currTrackerId = MemoryBlock::m_invalidTrackerId; //!< tracker ID for the current execution 317 } *PMHW_KERNEL_STATE; 318 319 typedef struct _MHW_BINDING_TABLE_PARAMS { 320 uint8_t *pBindingTableEntry; // Pointer to BT entry to setup 321 uint32_t dwSurfaceStateOffset; // Offset to Surface State (Indirect State) 322 bool bSurfaceStateAvs; // true if AVS surface 323 int32_t iBindingTableEntry; // Binding Table entry index 324 } MHW_BINDING_TABLE_PARAMS, *PMHW_BINDING_TABLE_PARAMS; 325 326 typedef struct _MHW_BINDING_TABLE_SEND_PARAMS { 327 uint8_t *pBindingTableSource; // Pointer to BT source 328 uint8_t *pBindingTableTarget; // Pointer to BT target 329 int32_t iSurfaceStateBase; // Offset to first Surface State in SSH 330 int32_t iSurfaceStateOffset; // [out] Offset to Surface State in SSH 331 int32_t iSurfaceState; // [out] Surface State index (-1 if Copy==0) 332 } MHW_BINDING_TABLE_SEND_PARAMS, *PMHW_BINDING_TABLE_SEND_PARAMS; 333 334 typedef struct _MHW_SURFACE_STATE_PARAMS { 335 uint8_t *pSurfaceState; 336 uint32_t dwCacheabilityControl; 337 uint32_t dwFormat; 338 uint32_t dwWidth; 339 uint32_t dwHeight; 340 uint32_t dwDepth; 341 uint32_t dwPitch; 342 uint32_t dwQPitch; 343 uint32_t bUseAdvState : 1; 344 uint32_t AddressControl : 1; 345 uint32_t SurfaceType3D : 3; 346 uint32_t bTiledSurface : 1; 347 uint32_t bTileWalk : 1; 348 uint32_t bVerticalLineStride : 1; 349 uint32_t bVerticalLineStrideOffset : 1; 350 uint32_t bCompressionEnabled : 1; 351 uint32_t bCompressionMode : 1; 352 uint32_t MmcState : 3; 353 uint32_t bInterleaveChroma : 1; 354 uint32_t bHalfPitchChroma : 1; 355 uint32_t bSeperateUVPlane : 1; 356 uint32_t UVPixelOffsetUDirection : 2; 357 uint32_t UVPixelOffsetVDirection : 2; 358 uint32_t RotationMode : 3; 359 uint32_t bSurfaceArraySpacing : 1; 360 uint32_t bBoardColorOGL : 1; 361 int32_t iXOffset; 362 int32_t iYOffset; 363 uint32_t dwXOffsetForU; // U or UV 364 uint32_t dwYOffsetForU; // U or UV 365 uint32_t dwXOffsetForV; 366 uint32_t dwYOffsetForV; 367 uint32_t dwCompressionFormat; // Memory Compression Format 368 uint32_t L1CacheConfig; 369 370 uint32_t *pdwCmd; // [out] Pointer for patching 371 uint32_t dwLocationInCmd; // [out] Offset in command for patching 372 MOS_TILE_MODE_GMM TileModeGMM; // Tile Type from GMM Definition 373 bool bGMMTileEnabled; //!< GMM defined tile mode flag 374 } MHW_SURFACE_STATE_PARAMS, *PMHW_SURFACE_STATE_PARAMS; 375 376 struct _MHW_STATE_HEAP 377 { 378 MOS_RESOURCE resHeap; //!< Graphics resource for state heap 379 void *pvLockedHeap; //!< System (logical) address for state heap 380 bool bKeepLocked; 381 uint32_t dwSize; //!< Size of the state heap 382 383 uint32_t dwUsed; //!< Used memory in state heap 384 uint32_t dwFree; //!< Free memory in state heap 385 bool bDeleted; //!< State heap is in process of being deleted 386 387 // State heap object points to its interface object and block manager 388 PMHW_BLOCK_MANAGER pBlockManager; 389 PXMHW_STATE_HEAP_INTERFACE pMhwStateHeapInterface; 390 391 //! 392 //! \brief The memory blocks will be managed in a linked list, each state 393 //! heap will have one linked list starting with pMemoryHead. The 394 //! memory blocks in this list will describe all available and 395 //! used space in the state heap. 396 //! 397 PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryHead; 398 399 PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryTail; //!< Last block in state heap memory (used to traverse pMemNext/pMemPrev) 400 PMHW_STATE_HEAP_MEMORY_BLOCK pDebugKernel; //!< Block associated to debug (SIP) kernel in the current ISH 401 PMHW_STATE_HEAP_MEMORY_BLOCK pScratchSpace; //!< Block associated with current active scratch space (older scratch spaces are removed) 402 uint32_t dwScratchSpace; //!< Active scratch space size 403 404 PMHW_STATE_HEAP pPrev; //!< The first state heap is considered primary (pPrev == nullptr) 405 PMHW_STATE_HEAP pNext; 406 407 uint32_t dwCurrOffset; //!< For simulated SSH to denote the current amount of space used 408 }; 409 410 typedef struct _MHW_SYNC_TAG 411 { 412 uint32_t dwCmdBufId; //!< Command buffer ID for this sync tag, 0 is available 413 uint32_t dwSshSizeUsed; 414 415 //! 416 //! \brief Memory blocks used during the clean up step. 417 //! 418 PMHW_STATE_HEAP_MEMORY_BLOCK pDshRegion; //!< Memory block for DSH 419 PMHW_STATE_HEAP_MEMORY_BLOCK pIshRegion; //!< Memory block for ISH 420 } MHW_SYNC_TAG, *PMHW_SYNC_TAG; 421 422 typedef struct _MHW_INTERFACE_DESCRIPTOR_PARAMS 423 { 424 PMHW_KERNEL_STATE pKernelState; 425 uint32_t dwKernelStartOffset; //!< Offset relative to the kernel state region binary start offset in the ISH 426 uint32_t dwIdIdx; //!< Index within the ID block of the kernel state region in the DSH of the ID to be added 427 uint32_t dwBtOffset; //!< Offset relative to SSH base of the BT start 428 uint32_t dwSamplerOffset; //!< Offset within the Sampler block of the kernel state region for the current sampler state 429 } MHW_INTERFACE_DESCRIPTOR_PARAMS, *PMHW_INTERFACE_DESCRIPTOR_PARAMS; 430 431 // Structure used to program media interface descriptor entry 432 typedef struct _MHW_ID_ENTRY_PARAMS 433 { 434 uint32_t dwMediaIdOffset; //! Offset of the first Media Interface Descriptor (in DSH) 435 uint32_t iMediaId; //! Media Interface Descriptor # 436 uint32_t dwKernelOffset; //! Kernel offset (in ISH) 437 uint32_t dwSamplerOffset; //! Sampler offset (in DSH) 438 uint32_t dwSamplerCount; //! Sample count 439 uint32_t dwBindingTableOffset; //! Binding table offset (in DSH) 440 uint32_t iCurbeOffset; //! Curbe offset (in DSH) 441 uint32_t iCurbeLength; //! Curbe lenght 442 bool bBarrierEnable; //! Enable Barrier 443 bool bGlobalBarrierEnable; //! Enable Global Barrier (SKL+) 444 uint32_t dwNumberofThreadsInGPGPUGroup; //! Number of threads per group 445 uint32_t dwSharedLocalMemorySize; //! Size of SharedLocalMemory (SLM) 446 int32_t iCrsThdConDataRdLn; //! 447 PMHW_STATE_HEAP pGeneralStateHeap; //! General state heap in use 448 MemoryBlock *memoryBlock; //! Memory block associated with the state heap 449 } MHW_ID_ENTRY_PARAMS, *PMHW_ID_ENTRY_PARAMS; 450 451 typedef struct _MHW_PLANE_SETTING 452 { 453 uint8_t ui8PlaneID; // Plane identifier 454 uint8_t ui8ScaleWidth; // X Scale (divider) 455 uint8_t ui8ScaleHeight; // Y Scale (divider) 456 uint8_t ui8AlignWidth; // X Alignment 457 uint8_t ui8AlignHeight; // Y Alignment 458 uint8_t ui8PixelsPerDword; // Pixels per Dword (for dataport read/write) 459 bool bAdvanced; // Advanced Surface State 460 uint32_t dwFormat; // Hardware Surface Format 461 } MHW_PLANE_SETTING, *PMHW_PLANE_SETTING; 462 463 typedef struct _MHW_SURFACE_PLANES 464 { 465 uint32_t dwNumPlanes; // Number of planes 466 MHW_PLANE_SETTING Plane[MHW_MAX_SURFACE_PLANES]; // Description of each plane 467 } MHW_SURFACE_PLANES, *PMHW_SURFACE_PLANES; 468 469 typedef const _MHW_PLANE_SETTING *PCMHW_PLANE_SETTING; 470 typedef const _MHW_SURFACE_PLANES *PCMHW_SURFACE_PLANES; 471 472 typedef struct _MHW_RCS_SURFACE_PARAMS 473 { 474 PMOS_SURFACE psSurface; 475 476 uint32_t bUseAdvState; //!< Indicates that SURFACE_STATE_ADV should be used 477 478 uint32_t dwNumPlanes; //!< Indicates the number of valid binding table offsets included 479 uint32_t dwPlaneType[MHW_MAX_SURFACE_PLANES]; //!< Indicates the plane type 480 uint32_t dwBindingTableOffset[MHW_MAX_SURFACE_PLANES]; //!< Binding table offset for all planes included in surface 481 uint32_t dwCacheabilityControl; 482 bool bRenderTarget; 483 bool bIsWritable; 484 485 uint32_t dwWidthToUse[MHW_MAX_SURFACE_PLANES]; //!< If non-zero, overrides value in psSurface 486 uint32_t dwHeightToUse[MHW_MAX_SURFACE_PLANES]; //!< If non-zero, overrides value in psSurface 487 uint32_t dwPitchToUse[MHW_MAX_SURFACE_PLANES]; //!< If non-zero, overrides value in psSurface 488 uint32_t dwBaseAddrOffset[MHW_MAX_SURFACE_PLANES]; 489 uint32_t dwYOffset[MHW_MAX_SURFACE_PLANES]; 490 uint32_t dwXOffset[MHW_MAX_SURFACE_PLANES]; 491 uint32_t ForceSurfaceFormat[MHW_MAX_SURFACE_PLANES]; //!< Of type GFX3DSTATE_SURFACEFORMAT 492 uint32_t dwSurfaceType; //!< of type GFX3DSTATE_SURFACETYPE 493 494 uint32_t bVertLineStride; 495 uint32_t bVertLineStrideOffs; 496 uint32_t bInterleaveChroma; 497 498 uint32_t dwAddressControl; 499 MHW_CHROMA_SITING_VDIRECTION Direction; 500 MHW_ROTATION Rotation; //!< 0: 0 degree, 1: 90 degree, 2: 180 degree, 3: 270 degree 501 uint32_t MediaBoundaryPixelMode; //!< Of type GFX3DSTATE_MEDIA_BOUNDARY_PIXEL_MODE 502 uint32_t dwOffsetInSSH; 503 } MHW_RCS_SURFACE_PARAMS, *PMHW_RCS_SURFACE_PARAMS; 504 505 typedef struct _MHW_SURFACE_TOKEN_PARAMS 506 { 507 PMOS_SURFACE pOsSurface; 508 uint32_t dwSurfaceOffset; 509 uint32_t YUVPlane : 2; 510 uint32_t bRenderTarget : 1; 511 uint32_t : 1; 512 uint32_t bSurfaceTypeAvs : 1; 513 uint32_t : 26; 514 } MHW_SURFACE_TOKEN_PARAMS, *PMHW_SURFACE_TOKEN_PARAMS; 515 516 //! 517 //! \brief Sampler Type 518 //! 519 typedef enum _MHW_SAMPLER_TYPE 520 { 521 MHW_SAMPLER_TYPE_INVALID = 0, 522 MHW_SAMPLER_NONE , 523 MHW_SAMPLER_TYPE_3D , // UNORM 524 MHW_SAMPLER_TYPE_AVS , // AVS (Avanced Video Sampler = 8x8, STE, IEF) 525 MHW_SAMPLER_TYPE_VME , // VME 526 MHW_SAMPLER_TYPE_MISC , // MISC 527 MHW_SAMPLER_TYPE_MINMAX , 528 MHW_SAMPLER_TYPE_ERODE , 529 MHW_SAMPLER_TYPE_DILATE , 530 MHW_SAMPLER_TYPE_CONV // CONVOLUTION (Gen8+) 531 } MHW_SAMPLER_TYPE, *PMHW_SAMPLER_TYPE; 532 533 typedef enum _MHW_SAMPLER_ELEMENTS_TYPE : unsigned int 534 { 535 MHW_Sampler1Element = 0, 536 MHW_Sampler2Elements, 537 MHW_Sampler4Elements, 538 MHW_Sampler8Elements, 539 MHW_Sampler64Elements, 540 MHW_Sampler128Elements, 541 542 MHW_SamplerTotalElements 543 }MHW_SAMPLER_ELEMENT_TYPE, *PMHW_SAMPLER_ELEMENT_TYPE; 544 545 //! 546 //! \brief Sampler Tap Mode 547 //! 548 typedef enum _MHW_SAMPLER_TAP_MODE 549 { 550 MHW_SAMPLER_FILTER_4_TAP = 0, 551 MHW_SAMPLER_FILTER_8_4_TAP, 552 MHW_SAMPLER_FILTER_8_TAP, 553 MHW_SAMPLER_FILTER_8_TAP_ADATIVE 554 } MHW_SAMPLER_TAP_MODE, *PMHW_SAMPLER_TAP_MODE; 555 556 //! 557 //! \brief Sampler Filter Mode 558 //! 559 typedef enum _MHW_SAMPLER_FILTER_MODE 560 { 561 MHW_SAMPLER_FILTER_CUSTOM = 0, 562 MHW_SAMPLER_FILTER_NEAREST, 563 MHW_SAMPLER_FILTER_BILINEAR 564 } MHW_SAMPLER_FILTER_MODE, *PMHW_SAMPLER_FILTER_MODE; 565 566 typedef enum _MHW_SAMPLER_TEXTADDR 567 { 568 MHW_SAMPLER_TEXTADDR_WRAP, 569 MHW_SAMPLER_TEXTADDR_MIRROR, 570 MHW_SAMPLER_TEXTADDR_CLAMP, 571 MHW_SAMPLER_TEXTADDR_CUBE, 572 MHW_SAMPLER_TEXTADDR_CLAMPBORDER, 573 MHW_SAMPLER_TEXTADDR_MIRROR_ONCE 574 } MHW_SAMPLER_TEXTADDR; 575 576 typedef struct _MHW_AVS_COEFFICIENT_PARAM 577 { 578 int8_t ZeroXFilterCoefficient[8]; 579 int8_t ZeroYFilterCoefficient[8]; 580 int8_t OneXFilterCoefficient[4]; //!< [0..3] maps to filter coefficients [2..5], in actual tabel [0..1] are reserved 581 int8_t OneYFilterCoefficient[4]; //!< [0..3] maps to filter coefficients [2..5], in actual tabel [0..1] are reserved 582 } MHW_AVS_COEFFICIENT_PARAM, *PMHW_AVS_COEFFICIENT_PARAM; 583 584 typedef struct _MHW_SAMPLER_AVS_TABLE_PARAM 585 { 586 MHW_AVS_COEFFICIENT_PARAM paMhwAvsCoeffParam[MHW_NUM_HW_POLYPHASE_TABLES]; 587 588 // sampler table control 589 uint8_t byteTransitionArea8Pixels; //!< only least 3-bits used 590 uint8_t byteTransitionArea4Pixels; //!< only least 3-bits used 591 uint8_t byteMaxDerivative8Pixels; 592 uint8_t byteMaxDerivative4Pixels; 593 uint8_t byteDefaultSharpnessLevel; 594 595 bool bEnableRGBAdaptive; 596 bool bAdaptiveFilterAllChannels; 597 bool bBypassYAdaptiveFiltering; 598 bool bBypassXAdaptiveFiltering; 599 600 bool b8TapAdaptiveEnable; 601 bool b4TapGY; 602 bool b4TapRBUV; 603 604 bool bIsCoeffExtraEnabled; 605 MHW_AVS_COEFFICIENT_PARAM paMhwAvsCoeffParamExtra[MHW_NUM_HW_POLYPHASE_EXTRA_TABLES_G9]; // only for gen9+ 606 607 } MHW_SAMPLER_AVS_TABLE_PARAM, *PMHW_SAMPLER_AVS_TABLE_PARAM; 608 609 //! 610 //! \brief Sampler States for 8x8 sampler 611 //! 612 typedef struct _MHW_SAMPLER_STATE_AVS_PARAM 613 { 614 int16_t stateID; 615 616 // STE params 617 bool bEnableSTDE; // a.k.a SkinToneTunedIEF 618 bool b8TapAdaptiveEnable; 619 bool bSkinDetailFactor; 620 bool bHdcDwEnable; // Gen9+ 621 bool bWritebackStandard; // set Writeback same as Original Sample_8x8 622 623 // IEF params 624 bool bEnableIEF; 625 uint16_t wIEFFactor; // 0 will disable IEF 626 uint16_t wR3xCoefficient; 627 uint16_t wR3cCoefficient; 628 uint16_t wR5xCoefficient; 629 uint16_t wR5cxCoefficient; 630 uint16_t wR5cCoefficient; 631 632 // AVS params 633 bool bEnableAVS; 634 bool AvsType; // 0 - Polyphase; 1 - nearest 635 bool EightTapAFEnable; 636 bool BypassIEF; // ignored for BWL, moved to sampler8x8 payload. 637 uint16_t GainFactor; 638 uint8_t GlobalNoiseEstm; 639 uint8_t StrongEdgeThr; 640 uint8_t WeakEdgeThr; 641 uint8_t StrongEdgeWght; 642 uint8_t RegularWght; 643 uint8_t NonEdgeWght; 644 bool b8TapLumaForYUV444; 645 646 // Additional overrides 647 uint16_t AdditionalOverridesUsed; 648 uint16_t YSlope2; 649 uint16_t S0L; 650 uint16_t YSlope1; 651 uint16_t S2U; 652 uint16_t S1U; 653 654 PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam; // pointer to AVS scaling 8x8 table params 655 656 int32_t iTable8x8_Index; // Table allocation index (not needed on Gen8+) 657 void *pTable8x8_Ptr; // Table data ptr in GSH 658 uint32_t dwTable8x8_Offset; // Table data offset in GSH 659 } MHW_SAMPLER_STATE_AVS_PARAM, *PMHW_SAMPLER_STATE_AVS_PARAM; 660 661 //! 662 //! \brief Structure to handle UNORM sampler states 663 //! 664 typedef enum _MHW_SAMPLER_SURFACE_PIXEL_TYPE 665 { 666 MHW_SAMPLER_SURFACE_PIXEL_UINT, 667 MHW_SAMPLER_SURFACE_PIXEL_SINT, 668 MHW_SAMPLER_SURFACE_PIXEL_OTHER 669 } MHW_SAMPLER_SURFACE_PIXEL_TYPE; 670 671 typedef enum _MHW_GFX3DSTATE_MAPFILTER 672 { 673 MHW_GFX3DSTATE_MAPFILTER_NEAREST = 0x0, 674 MHW_GFX3DSTATE_MAPFILTER_LINEAR = 0x1, 675 MHW_GFX3DSTATE_MAPFILTER_ANISOTROPIC = 0x2, 676 MHW_GFX3DSTATE_MAPFILTER_FLEXIBLE = 0x3, 677 MHW_GFX3DSTATE_MAPFILTER_MONO = 0x6 678 } MHW_GFX3DSTATE_MAPFILTER; 679 680 typedef enum _MHW_GFX3DSTATE_TEXCOORDMODE 681 { 682 MHW_GFX3DSTATE_TEXCOORDMODE_WRAP = 0, 683 MHW_GFX3DSTATE_TEXCOORDMODE_MIRROR = 1, 684 MHW_GFX3DSTATE_TEXCOORDMODE_CLAMP = 2, 685 MHW_GFX3DSTATE_TEXCOORDMODE_CUBE = 3, 686 MHW_GFX3DSTATE_TEXCOORDMODE_CLAMP_BORDER = 4, 687 MHW_GFX3DSTATE_TEXCOORDMODE_MIRROR_ONCE = 5 688 } MHW_GFX3DSTATE_TEXCOORDMODE; 689 690 typedef enum _MHW_CHROMAKEY_MODE 691 { 692 MHW_CHROMAKEY_MODE_KILL_ON_ANY_MATCH = 0, 693 MHW_CHROMAKEY_MODE_REPLACE_BLACK = 1 694 } MHW_CHROMAKEY_MODE; 695 696 typedef struct _MHW_SAMPLER_STATE_UNORM_PARAM 697 { 698 MHW_SAMPLER_FILTER_MODE SamplerFilterMode; 699 MHW_GFX3DSTATE_MAPFILTER MagFilter; 700 MHW_GFX3DSTATE_MAPFILTER MinFilter; 701 MHW_GFX3DSTATE_TEXCOORDMODE AddressU; 702 MHW_GFX3DSTATE_TEXCOORDMODE AddressV; 703 MHW_GFX3DSTATE_TEXCOORDMODE AddressW; 704 705 MHW_SAMPLER_SURFACE_PIXEL_TYPE SurfaceFormat; 706 union { 707 uint32_t BorderColorRedU; 708 int32_t BorderColorRedS; 709 float BorderColorRedF; 710 }; 711 712 union { 713 uint32_t BorderColorGreenU; 714 int32_t BorderColorGreenS; 715 float BorderColorGreenF; 716 }; 717 718 union { 719 uint32_t BorderColorBlueU; 720 int32_t BorderColorBlueS; 721 float BorderColorBlueF; 722 }; 723 724 union { 725 uint32_t BorderColorAlphaU; 726 int32_t BorderColorAlphaS; 727 float BorderColorAlphaF; 728 }; 729 730 uint32_t IndirectStateOffset; 731 void *pIndirectState; 732 bool bBorderColorIsValid; 733 734 bool bChromaKeyEnable; 735 uint32_t ChromaKeyIndex; 736 MHW_CHROMAKEY_MODE ChromaKeyMode; 737 } MHW_SAMPLER_STATE_UNORM_PARAM, *PMHW_SAMPLER_STATE_UNORM_PARAM; 738 739 //! 740 //! \brief Structure to capture sizes of HW engine commands and structures 741 //! 742 typedef struct _MHW_RENDER_STATE_SIZES 743 { 744 uint32_t dwSizeMediaObjectHeaderCmd; // Size of Media Object Header Command 745 uint32_t dwMaxSizeSurfaceState; // Max size of a surface state 746 uint32_t dwSizeSurfaceState; // Size of surface state 747 uint32_t dwSizeSurfaceStateAvs; // Size of AVS surface state 748 uint32_t dwSizeBindingTableState; // Size of binding table state entry 749 uint32_t dwSizeSamplerState; // Size of sampler state (unorm) 750 uint32_t dwSizeSamplerIndirectState; // Size of sampler indirect state (unorm) 751 uint32_t dwSizeSamplerStateAvs; // Size of sampler state (Avs) 752 uint32_t dwSizeSamplerStateVA; // Size of sampler state (va) 753 uint32_t dwSizeSamplerStateVAConvolve; // Size of sampler state (va convolve) 754 uint32_t dwSizeSamplerStateTable8x8; // Size of sampler state 8x8 table 755 uint32_t dwSizeSampler8x8Table; // Size of sampler 8x8 table 756 uint32_t dwSizeInterfaceDescriptor; // Size of interface descriptor 757 uint32_t dwSizeMediaWalkerBlock; // Size of Media Walker block 758 } MHW_RENDER_STATE_SIZES, *PMHW_RENDER_STATE_SIZES; 759 760 //! 761 //! \brief Structure to handle VME Sampler State 762 //! 763 typedef struct _MHW_SAMPLER_STATE_VME_PARAM 764 { 765 uint32_t *pdwLUTSearchPath; 766 uint32_t *pdwLUTMbMode; 767 uint32_t *pdwLUTMv; 768 } MHW_SAMPLER_STATE_VME_PARAM, *PMHW_SAMPLER_STATE_VME_PARAM; 769 770 typedef struct _MHW_SAMPLER_CONVOLVE_COEFF_TABLE 771 { 772 uint16_t wFilterCoeff[16]; 773 } MHW_SAMPLER_CONVOLVE_COEFF_TABLE; 774 775 typedef struct _MHW_SAMPLER_STATE_CONVOLVE_PARAM 776 { 777 uint8_t ui8ConvolveType; // 1d, 2d 778 uint8_t ui8Height; 779 uint8_t ui8Width; 780 uint8_t ui8ScaledDownValue; 781 uint8_t ui8SizeOfTheCoefficient; 782 uint8_t ui8MSBHeight; 783 uint8_t ui8MSBWidth; 784 bool skl_mode; 785 MHW_SAMPLER_CONVOLVE_COEFF_TABLE CoeffTable[62]; 786 } MHW_SAMPLER_STATE_CONVOLVE_PARAM, *PMHW_SAMPLER_STATE_CONVOLVE_PARAM; 787 788 typedef struct _MHW_SAMPLER_8x8_MISC_STATE { 789 uint8_t byteHeight; 790 uint8_t byteWidth; 791 uint16_t wRow[15]; 792 } MHW_SAMPLER_8x8_MISC_STATE, *PMHW_SAMPLER_8x8_MISC_STATE; 793 794 //! 795 //! \brief Structure to handle Sampler State 796 //! 797 typedef struct _MHW_SAMPLER_STATE_PARAM 798 { 799 bool bInUse; 800 PMHW_KERNEL_STATE pKernelState; 801 MHW_SAMPLER_TYPE SamplerType; 802 MHW_SAMPLER_ELEMENT_TYPE ElementType; 803 union 804 { 805 MHW_SAMPLER_STATE_UNORM_PARAM Unorm; 806 MHW_SAMPLER_STATE_AVS_PARAM Avs; 807 MHW_SAMPLER_STATE_VME_PARAM Vme; 808 MHW_SAMPLER_STATE_CONVOLVE_PARAM Convolve; 809 MHW_SAMPLER_8x8_MISC_STATE Misc; 810 }; 811 } MHW_SAMPLER_STATE_PARAM, *PMHW_SAMPLER_STATE_PARAM; 812 813 typedef struct _MHW_SURFACE_STATE_SEND_PARAMS { 814 uint8_t *pIndirectStateBase; 815 uint8_t *pSurfaceStateSource; 816 uint8_t *pSurfaceToken; 817 int32_t iIndirectStateBase; 818 int32_t iSurfaceStateOffset; 819 bool bNeedNullPatch; 820 } MHW_SURFACE_STATE_SEND_PARAMS, *PMHW_SURFACE_STATE_SEND_PARAMS; 821 822 struct MHW_STATE_HEAP_SETTINGS 823 { MHW_STATE_HEAP_SETTINGSMHW_STATE_HEAP_SETTINGS824 MHW_STATE_HEAP_SETTINGS() {} 825 ~MHW_STATE_HEAP_SETTINGSMHW_STATE_HEAP_SETTINGS826 virtual ~MHW_STATE_HEAP_SETTINGS() {} 827 828 uint32_t dwIshSize = 0; //!< Initial size of ISH 829 uint32_t dwDshSize = 0; //!< Initial size of DSH 830 uint32_t dwIshIncrement = 0; //!< ISH increment step 831 uint32_t dwDshIncrement = 0; //!< DSH increment step 832 uint32_t dwIshMaxSize = 0; //!< ISH max size 833 uint32_t dwDshMaxSize = 0; //!< DSH max size 834 835 bool m_keepIshLocked = false; //!< Keep ISH locked always 836 bool m_keepDshLocked = false; //!< Keep DSH locked always 837 838 HeapManager::Behavior m_ishBehavior = HeapManager::Behavior::wait; //!< ISH behavior 839 HeapManager::Behavior m_dshBehavior = HeapManager::Behavior::wait; //!< DSH behavior 840 841 uint32_t dwNumSyncTags = 0; //!< to be removed with old interfaces 842 }; 843 844 typedef struct _MHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS 845 { 846 int32_t *piSizes; //<! [in] array of block sizes to allocate 847 int32_t iCount; //<! [in] number of blocks to allocate 848 uint32_t dwAlignment; //<! [in] block alignment 849 bool bHeapAffinity; //<! [in] true if all blocks must be allocated in the same heap; false otherwize 850 PMHW_STATE_HEAP pHeapAffinity; //<! [in] Select a specific heap to allocate (nullptr if don't care) 851 uint32_t dwScratchSpace; //<! [in/out] Scratch space requested, scratch space allocated in same heap as the block 852 PMHW_STATE_HEAP_MEMORY_BLOCK pScratchSpace; //<! [out] Pointer to scratch space block used - needed for command buffer setup 853 bool bZeroAssignedMem; //<! [in] Zero memory blocks after allocation 854 bool bStatic; //<! [in] Block allocations are flaged as static 855 bool bGrow; //<! [in] Allow state heap to grow in order to satisfy the request 856 } MHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS, *PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS; 857 858 typedef MOS_STATUS ( *pfnAddResourceToCmd) (PMOS_INTERFACE , PMOS_COMMAND_BUFFER ,PMHW_RESOURCE_PARAMS); 859 860 class XMHW_STATE_HEAP_INTERFACE 861 { 862 public: 863 static const uint32_t m_mhwBindingTableOffsetShift = 6; 864 static const uint32_t m_mhwBindingTableSurfaceShift = 6; 865 static const uint32_t m_mhwGenericOffsetShift = 6; 866 static const uint32_t m_mhwBindingTableOffsetAlignment = (1 << m_mhwBindingTableOffsetShift); 867 static const uint32_t m_mhwNumBindingTableEntryOffset = (m_mhwBindingTableOffsetAlignment/4); 868 869 protected: 870 HeapManager m_ishManager; 871 HeapManager m_dshManager; 872 std::vector<MemoryBlock> m_blocks; 873 std::vector<uint32_t> m_blockSizes; 874 875 private: 876 MEDIA_WA_TABLE *m_pWaTable; 877 MHW_STATE_HEAP_SETTINGS m_StateHeapSettings; 878 879 // old heap management 880 MOS_RESOURCE m_resCmdBufIdGlobal; 881 uint32_t *m_pdwCmdBufIdGlobal; 882 uint32_t m_dwCurrCmdBufId; 883 PMHW_SYNC_TAG m_pSyncTags; 884 uint32_t m_dwCurrSyncTag; 885 uint32_t m_dwInvalidSyncTagId; //!< Passed in at creation by the client 886 bool m_bRegisteredBBCompleteNotifyEvent; 887 PMHW_STATE_HEAP m_pInstructionStateHeaps; 888 uint32_t m_dwNumIsh; 889 uint32_t m_dwNumDsh; 890 PMHW_STATE_HEAP m_pDynamicStateHeaps; 891 int8_t m_bDynamicMode; //!< To be deprecated, 0 - RenderHal handles, 1 - MDF heap management, 2 - generic hep 892 PMHW_BLOCK_MANAGER m_pIshBlockManager; //!< ISH block management object 893 PMHW_BLOCK_MANAGER m_pDshBlockManager; //!< DSH block management object 894 895 public: 896 PMOS_INTERFACE m_pOsInterface; 897 uint16_t m_wIdAlignment; 898 uint16_t m_wBtIdxAlignment; 899 uint16_t m_wCurbeAlignment; 900 uint16_t m_wSizeOfCmdSamplerState; 901 uint32_t m_dwMaxSurfaceStateSize; 902 pfnAddResourceToCmd m_pfnAddResourceToCmd; 903 MHW_STATE_HEAP m_SurfaceStateHeap; //!< Simulated SSH with MHW_STATE_HEAP. 904 uint16_t m_wSizeOfCmdInterfaceDescriptorData; 905 MHW_RENDER_STATE_SIZES m_HwSizes; 906 907 public: 908 //! 909 //! \brief Internal to MHW 910 //! 911 912 //! 913 //! \brief Constructor of the MI StateHeap interface 914 //! \details Internal MHW function to initialize all function pointers and some parameters 915 //! \param [in] pCpInterface 916 //! CP interface, must be valid 917 //! \param [in] pOsInterface 918 //! OS interface, must be valid 919 //! 920 XMHW_STATE_HEAP_INTERFACE(PMOS_INTERFACE pInputOSInterface, int8_t bDynamicMode=0); 921 922 XMHW_STATE_HEAP_INTERFACE(const XMHW_STATE_HEAP_INTERFACE&) = delete; 923 924 XMHW_STATE_HEAP_INTERFACE& operator=(const XMHW_STATE_HEAP_INTERFACE&) = delete; 925 926 virtual ~XMHW_STATE_HEAP_INTERFACE(); 927 GetDSHPointer()928 PMHW_STATE_HEAP GetDSHPointer(){ return m_pDynamicStateHeaps; }; 929 GetISHPointer()930 PMHW_STATE_HEAP GetISHPointer(){ return m_pInstructionStateHeaps;}; 931 GetNumDsh()932 uint32_t GetNumDsh(){return m_dwNumDsh;}; 933 GetNumIsh()934 uint32_t GetNumIsh(){return m_dwNumIsh;}; 935 GetResCmdBufIdGlobal()936 PMOS_RESOURCE GetResCmdBufIdGlobal(){return &m_resCmdBufIdGlobal;}; 937 GetSycnTags()938 PMHW_SYNC_TAG GetSycnTags(){return m_pSyncTags;}; 939 GetIdAlignment()940 uint16_t GetIdAlignment(){return m_wIdAlignment;}; 941 GetSizeofCmdSampleState()942 uint16_t GetSizeofCmdSampleState(){return m_wSizeOfCmdSamplerState;}; 943 GetSizeofCmdInterfaceDescriptorData()944 uint16_t GetSizeofCmdInterfaceDescriptorData(){ return m_wSizeOfCmdInterfaceDescriptorData;}; 945 GetCurbeAlignment()946 uint16_t GetCurbeAlignment(){ return m_wCurbeAlignment;}; 947 GetBtIdxAlignment()948 uint16_t GetBtIdxAlignment(){ return m_wBtIdxAlignment;}; 949 GetCurrCmdBufId()950 uint32_t GetCurrCmdBufId(){ return m_dwCurrCmdBufId;}; 951 GetCmdBufIdGlobal()952 uint32_t GetCmdBufIdGlobal(){ return *m_pdwCmdBufIdGlobal;}; 953 GetCmdBufIdGlobalPointer()954 uint32_t *GetCmdBufIdGlobalPointer(){ return m_pdwCmdBufIdGlobal; }; 955 GetHwSizesPointer()956 PMHW_RENDER_STATE_SIZES GetHwSizesPointer() { return & m_HwSizes;}; 957 GetSizeofSamplerStateAvs()958 uint32_t GetSizeofSamplerStateAvs() { return m_HwSizes.dwSizeSamplerStateAvs;}; 959 960 //! 961 //! \brief Initializes the MI StateHeap interface 962 //! \details Internal MHW function to initialize all function pointers and some parameters 963 //! Assumes that the caller has checked pointer validity and whether or not an 964 //! addressing method has been selected in the OS interface (bUsesGfxAddress or 965 //! bUsesPatchList). 966 //! \param [in] StateHeapSettings 967 //! StateHeap setting passed from caller 968 //! \return MOS_STATUS 969 //! MOS_STATUS_SUCCESS if success else fail reason 970 MOS_STATUS InitializeInterface(MHW_STATE_HEAP_SETTINGS StateHeapSettings); 971 972 //! 973 //! \brief Assigns space in a state heap to a kernel state 974 //! \details Client facing function to assign as space in a state heap a kernel state; 975 //! if no space is available, a clean up is attempted 976 //! \param MHW_STATE_HEAP_TYPE StateHeapType 977 //! [in] The state heap type requested (ISH/DSH) 978 //! \param PMHW_KERNEL_STATE pKernelState 979 //! [in] Kernel state to which a state heap space will be assigned 980 //! \param uint32_t dwSpaceRequested 981 //! [in] The amount of space requested from the state heap 982 //! \param bool bStatic 983 //! [in] Whether or not the space requested is static 984 //! \param bool bZeroAssignedMem 985 //! [in] Whether or not acquired memory should be zeroed 986 //! \return MOS_STATUS 987 //! MOS_STATUS_SUCCESS if success, MOS_STATUS_CLIENT_AR_NO_SPACE if no space 988 //! is available but it is possible for the client to wait, else fail reason 989 //! 990 MOS_STATUS AssignSpaceInStateHeap( 991 MHW_STATE_HEAP_TYPE StateHeapType, 992 PMHW_KERNEL_STATE pKernelState, 993 uint32_t dwSpaceRequested, 994 bool bStatic, 995 bool bZeroAssignedMem); 996 997 //! 998 //! \brief Submits all non-static blocks in kernel state 999 //! \param [in] pKernelState 1000 //! Kernel state containing all memory blocks to submit 1001 //! \return MOS_STATUS 1002 //! MOS_STATUS_SUCCESS if success 1003 //! 1004 MOS_STATUS SubmitBlocks(PMHW_KERNEL_STATE pKernelState); 1005 1006 //! 1007 //! \brief Locks requested state heap 1008 //! \details Client facing function to lock a state heap 1009 //! \param PMHW_STATE_HEAP pStateHeap 1010 //! [in] The state heap to be locked 1011 //! \return MOS_STATUS 1012 //! MOS_STATUS_SUCCESS if success 1013 //! 1014 MOS_STATUS LockStateHeap( 1015 PMHW_STATE_HEAP pStateHeap); 1016 1017 //! 1018 //! \brief Unlocks requested state heap 1019 //! \details Client facing function to unlock a state heap 1020 //! \param PMHW_STATE_HEAP pStateHeap 1021 //! [in] The state heap to be locked 1022 //! \return MOS_STATUS 1023 //! MOS_STATUS_SUCCESS if success 1024 //! 1025 MOS_STATUS UnLockStateHeap( 1026 PMHW_STATE_HEAP pStateHeap); 1027 1028 //! 1029 //! \brief Allocates a state heap of the requested type 1030 //! \details Client facing function to extend a state heap of the requested time, which 1031 //! involves allocating state heap and added it to the state heap liked list. 1032 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1033 //! [in] The state heap type requested (ISH/DSH) 1034 //! \param uint32_t dwSizeRequested 1035 //! [in] The size of the state heap 1036 //! \return MOS_STATUS 1037 //! MOS_STATUS_SUCCESS if success, else fail reason 1038 //! 1039 MOS_STATUS ExtendStateHeap( 1040 MHW_STATE_HEAP_TYPE StateHeapType, 1041 uint32_t dwSizeRequested); 1042 1043 //! 1044 //! \brief Update CmdBufIdGlobal 1045 //! \details Client facing function to update CmdBufIdGlobal 1046 //! reset current offset to zero 1047 //! \return MOS_STATUS 1048 //! MOS_STATUS_SUCCESS if success, else fail reason 1049 //! 1050 MOS_STATUS UpdateGlobalCmdBufId(); 1051 1052 //! 1053 //! \brief Set command buffer status pointer 1054 //! \details Client facing function to set command buffer status pointer 1055 //! \param void *pvCmdBufStatus 1056 //! [in] command buffer status pointer 1057 //! \return MOS_STATUS 1058 //! MOS_STATUS_SUCCESS if success, else fail reason 1059 //! 1060 MOS_STATUS SetCmdBufStatusPtr(void *pvCmdBufStatus); 1061 1062 //! 1063 //! \brief Calculate the space needed in the SSH 1064 //! \details Client facing function to calculate the space needed in the SSH 1065 //! given the number of binding table entries 1066 //! \param uint32_t dwBtEntriesRequested 1067 //! [in] Binding table entries requested in the SSH 1068 //! \param uint32_t *pdwSshSize 1069 //! [out] The size needed in the SSH 1070 //! \return MOS_STATUS 1071 //! MOS_STATUS_SUCCESS if success, else fail reason 1072 //! 1073 MOS_STATUS CalculateSshAndBtSizesRequested( 1074 uint32_t dwBtEntriesRequested, 1075 uint32_t *pdwSshSize, 1076 uint32_t *pdwBtSize); 1077 1078 //! 1079 //! \brief Request SSH space for a command buffer. 1080 //! \details Client facing function to request SSH space for a command buffer, if not enough 1081 //! space is available, more will be requested. 1082 //! \param uint32_t dwBtEntriesRequested 1083 //! [in] Binding table entries requested in the SSH 1084 //! \return MOS_STATUS 1085 //! MOS_STATUS_SUCCESS if success, else fail reason 1086 //! 1087 MOS_STATUS RequestSshSpaceForCmdBuf( 1088 uint32_t dwBtEntriesRequested); 1089 1090 //! 1091 //! \brief Calculates the amount of space needed 1092 //! \details Tells if there is enough space available in heap to load an array of blocks 1093 // Returns how much is missing (needs to be freed, 0 if none) 1094 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1095 //! [in] State heap type (DSH/ISH) 1096 //! \param PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS pParams 1097 //! [in] Dynamic state heap parameters 1098 //! \return uint32_t 1099 //! Amount of space needed in bytes 1100 //! 1101 uint32_t CalculateSpaceNeededDyn( 1102 MHW_STATE_HEAP_TYPE StateHeapType, 1103 PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS pParams); 1104 1105 //Virtual Interfaces 1106 1107 //! 1108 //! \brief Adds INTERFACE_DESCRIPTOR command(s) to the DSH 1109 //! \details Client facing function to add INTERFACE_DESCRIPTOR(s) to the DSH 1110 //! \param uint32_t dwNumIdsToSet 1111 //! [in] The number of pParams 1112 //! \param PMHW_INTERFACE_DESCRIPTOR_PARAMS pParams 1113 //! [in] Parameters used to set the INTERFACE_DESCRIPTOR(s) 1114 //! \return MOS_STATUS 1115 //! MOS_STATUS_SUCCESS if success, else fail reason 1116 //! 1117 virtual MOS_STATUS SetInterfaceDescriptor( 1118 uint32_t dwNumIdsToSet, 1119 PMHW_INTERFACE_DESCRIPTOR_PARAMS pParams) = 0; 1120 1121 //! 1122 //! \brief Setup Media Interface Descriptor Entry in DSH 1123 //! \details Setup Single Media Interface Descriptor Entry 1124 //! \param PMHW_ID_ENTRY_PARAMS pParams 1125 //! [in] Interface Descriptor Parameters 1126 //! \param PMOS_COMMAND_BUFFER pCmdBuffer 1127 //! [in] Pointer to Command Buffer 1128 //! \return MOS_STATUS 1129 //! 1130 virtual MOS_STATUS SetInterfaceDescriptorEntry( 1131 PMHW_ID_ENTRY_PARAMS pParams) = 0; 1132 1133 //! 1134 //! \brief Adds media interface descriptor data to dynamic GSH 1135 //! \param PMHW_ID_ENTRY_PARAMS pParams 1136 //! [in] Interface descriptor parameters 1137 //! \return MOS_STATUS 1138 //! 1139 virtual MOS_STATUS AddInterfaceDescriptorData( 1140 PMHW_ID_ENTRY_PARAMS pParams) = 0; 1141 1142 //! 1143 //! \brief Adds a binding table to the SSH 1144 //! \details Client facing function to add binding table to SSH 1145 //! \param PMHW_KERNEL_STATE pKernelState 1146 //! [in] Kernel state to construct the binding table for 1147 //! \param void *pvHwInterface 1148 //! [in] Temporary input parameter until SSH setup occurs in MHW 1149 //! \return MOS_STATUS 1150 //! MOS_STATUS_SUCCESS if success, else fail reason 1151 //! 1152 virtual MOS_STATUS SetBindingTable( 1153 PMHW_KERNEL_STATE pKernelState)= 0; 1154 1155 //! 1156 //! \brief Sets binding table entry in SSH 1157 //! \details TO BE REMOVED! Client facing function to add binding table to SSH 1158 //! \param PMHW_BINDING_TABLE_PARAMS pParams 1159 //! [in] Surface binding parameters 1160 //! 1161 virtual MOS_STATUS SetBindingTableEntry( 1162 PMHW_BINDING_TABLE_PARAMS pParams) = 0; 1163 1164 //! 1165 //! \brief Sends binding table entry to Command Buffer (indirect state) 1166 //! \details TO BE REMOVED! Sends binding table entry to indirect state heap in Cmd buffer, 1167 //! retrieving associated surface state offset and index 1168 //! \param PMHW_BINDING_TABLE_PARAMS pParams 1169 //! [in] Surface binding parameters - returns surface state pointer and index 1170 //! 1171 virtual MOS_STATUS SendBindingTableEntry( 1172 PMHW_BINDING_TABLE_SEND_PARAMS pParams) = 0; 1173 1174 //! 1175 //! \brief set surface state entry 1176 //! \details TO BE REMOVED! set surface state entry 1177 //! \param PMHW_BINDING_TABLE_PARAMS pParams 1178 //! [in] Surface state parameters 1179 //! 1180 virtual MOS_STATUS SetSurfaceStateEntry( 1181 PMHW_SURFACE_STATE_PARAMS pParams) = 0; 1182 1183 //! 1184 //! \brief Set surface state in ssh 1185 //! \details Set sampler state in ssh 1186 //! \param PMOS_COMMAND_BUFFER pCmdBuffer 1187 //! [in] command buffer pointer 1188 //! \param uint32_t dwNumSurfaceStatesToSet 1189 //! [in] number of surface states need to set 1190 //! \param PMHW_RCS_SURFACE_PARAMS pParams 1191 //! [in] render surface state parameters 1192 //! 1193 virtual MOS_STATUS SetSurfaceState( 1194 PMHW_KERNEL_STATE pKernelState, 1195 PMOS_COMMAND_BUFFER pCmdBuffer, 1196 uint32_t dwNumSurfaceStatesToSet, 1197 PMHW_RCS_SURFACE_PARAMS pParams) = 0; 1198 1199 //! 1200 //! \brief Set sampler state 1201 //! \details Set sampler state 1202 //! \param PMHW_SAMPLER_STATE_PARAM pParams 1203 //! [in] Sampler state parameters 1204 //! 1205 virtual MOS_STATUS SetSamplerState( 1206 void *pSampler, 1207 PMHW_SAMPLER_STATE_PARAM pParam) = 0; 1208 1209 //! 1210 //! \brief Adds sampler state data to dynamic GSH 1211 //! \param uint32_t samplerOffset 1212 //! [in] sampler offset 1213 //! \param MemoryBlock memoryBlock 1214 //! [in,out] Pointer to memory block 1215 //! \param PMHW_SAMPLER_STATE_PARAM pParam 1216 //! [in] sampler state parameters 1217 //! \return MOS_STATUS 1218 //! 1219 virtual MOS_STATUS AddSamplerStateData( 1220 uint32_t samplerOffset, 1221 MemoryBlock *memoryBlock, 1222 PMHW_SAMPLER_STATE_PARAM pParam) = 0; 1223 1224 //! 1225 //! \brief Initialize sampler states 1226 //! \details Initialize sampler states 1227 //! \param void *pSamplerStates 1228 //! [in] Pointer to sampler states to reset 1229 //! \param int32_t iSamplers 1230 //! [in] Number of sampler entries to reset 1231 //! \return MOS_STATUS 1232 //! MOS_STATUS_SUCCESS if success, else fail reason 1233 //! 1234 virtual MOS_STATUS InitSamplerStates( 1235 void *pSamplerStates, 1236 int32_t iSamplers) = 0; 1237 1238 //! 1239 //! \brief Init HwSizes 1240 //! \details Init HwSizes 1241 //! \return MOS_STATUS 1242 //! MOS_STATUS_SUCCESS if success else fail reason 1243 //! 1244 virtual MOS_STATUS InitHwSizes() = 0; 1245 1246 //! 1247 //! \brief Releases the dynamic state heap 1248 //! \details Releases the dynamic state heap. If all blocks 1249 //! are completed, free the resource. If there are some blocks still in 1250 //! the submitted state, then mark blocks for deletion. This function will be 1251 //! called again to free the resource when the last block is released. 1252 //! \param PMHW_STATE_HEAP pStateHeap 1253 //! [in] Pointer to the state heap to be released 1254 //! \return MOS_STATUS 1255 //! SUCCESS if state heap was either marked for deletion or actually freed 1256 //! 1257 MOS_STATUS ReleaseStateHeapDyn(PMHW_STATE_HEAP pStateHeap); 1258 1259 //! 1260 //! \brief Allocates a dynamic block 1261 //! \details Allocates either a single dynamic block or multiple blocks in ISH/DSH 1262 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1263 //! [in] State heap type (DSH/ISH) 1264 //! \param PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS pParams 1265 //! [in] Dynamic state heap parameters 1266 //! \return PMHW_STATE_HEAP_MEMORY_BLOCK 1267 //! Pointer to the allocated memory block(s) 1268 //! 1269 PMHW_STATE_HEAP_MEMORY_BLOCK AllocateDynamicBlockDyn( 1270 MHW_STATE_HEAP_TYPE StateHeapType, 1271 PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS pParams); 1272 1273 //! 1274 //! \brief Submits a dynamic block 1275 //! \details Submits a dynamic block. Detaches the block from current list and adds to to 1276 //! submitted list. Updates block with provided sync tag. 1277 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1278 //! [in] State heap type (DSH/ISH) 1279 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pBlock 1280 //! [in] Pointer to memory block to be submitted 1281 //! \param uint32_t dwSyncTag 1282 //! [in] Sync Tag 1283 //! \return MOS_STATUS 1284 //! SUCCESS if submission was successful 1285 //! 1286 MOS_STATUS SubmitDynamicBlockDyn( 1287 MHW_STATE_HEAP_TYPE StateHeapType, 1288 PMHW_STATE_HEAP_MEMORY_BLOCK pBlock, 1289 const FrameTrackerTokenFlat *trackerToken); 1290 1291 //! 1292 //! \brief Frees a dynamic block 1293 //! \details Detaches the block from current list if block has completed (based on provided dwSyncTag) 1294 //! and adds it to deleted list. Otherwise, marks for deletion upon completion. 1295 //! submitted list. Updates block with provided sync tag. 1296 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1297 //! [in] State heap type (DSH/ISH) 1298 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pBlock 1299 //! [in] Pointer to memory block to be freed 1300 //! \return MOS_STATUS 1301 //! SUCCESS if operation was successful 1302 //! 1303 MOS_STATUS FreeDynamicBlockDyn( 1304 MHW_STATE_HEAP_TYPE StateHeapType, 1305 PMHW_STATE_HEAP_MEMORY_BLOCK pBlock); 1306 1307 //! 1308 //! \brief Refresh the dynamic heap 1309 //! \details Updates block states based on last executed tag 1310 //! submitted unlocked blocks are released; 1311 //! move to allocated 1312 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1313 //! [in] State heap type (DSH/ISH) 1314 //! \param uint32_t dwSyncTag 1315 //! [in] Sync Tag 1316 //! \return MOS_STATUS 1317 //! SUCCESS if operation was successful 1318 //! 1319 MOS_STATUS RefreshDynamicHeapDyn ( 1320 MHW_STATE_HEAP_TYPE StateHeapType); 1321 1322 private: 1323 1324 //! 1325 //! \brief Insert a node into a memory block linked list 1326 //! \details MHW private function which maintains the memory block linked list 1327 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pStartNode 1328 //! [in] The memory block from which to start the insertion 1329 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pNodeToAdd 1330 //! [in] The memory block to insert 1331 //! \return MOS_STATUS 1332 //! MOS_STATUS_SUCCESS if success else fail reason 1333 //! 1334 MOS_STATUS InsertLinkedList( 1335 PMHW_STATE_HEAP_MEMORY_BLOCK pStartNode, 1336 PMHW_STATE_HEAP_MEMORY_BLOCK pNodeToAdd); 1337 1338 //! 1339 //! \brief Allocate and initialize a memory block based on input parameters 1340 //! \details MHW private function which creates memory blocks 1341 //! \param PMHW_STATE_HEAP pStateHeap 1342 //! [in] The state heap which the memory block belongs to 1343 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK ppMemoryBlock 1344 //! [in/out] The node to insert. 1345 //! \param uint32_t dwRequestedSize 1346 //! [in] The size of the memory that the memory block references. 1347 //! \param bool bStatic 1348 //! [in] If the memory block is static 1349 //! \return MOS_STATUS 1350 //! MOS_STATUS_SUCCESS if success else fail reason 1351 //! 1352 MOS_STATUS InitMemoryBlock( 1353 PMHW_STATE_HEAP pStateHeap, 1354 PMHW_STATE_HEAP_MEMORY_BLOCK *ppMemoryBlock, 1355 uint32_t dwRequestedSize, 1356 bool bStatic); 1357 1358 //! 1359 //! \brief Inserts a new memory block into an existing available memory block 1360 //! \details MHW private function to insert new memory blocks into available memory blocks 1361 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlockFree 1362 //! [in] Available memory block 1363 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlockToAdd 1364 //! [in] New memory block to be inserted 1365 //! \return MOS_STATUS 1366 //! MOS_STATUS_SUCCESS if success else fail reason 1367 //! 1368 MOS_STATUS InsertMemoryBlock( 1369 PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlockFree, 1370 PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlockToAdd); 1371 1372 //! 1373 //! \brief Returns the space of the memory block to the state heap 1374 //! \details MHW private function to return the memory block space to the state heap 1375 //! by marking it as available and merging it with adjacent memory blocks 1376 1377 //! \param PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlock 1378 //! [in] Memory block to return to the state heap 1379 //! \return MOS_STATUS 1380 //! MOS_STATUS_SUCCESS if success else fail reason 1381 //! 1382 MOS_STATUS ReturnSpaceMemoryBlock( 1383 PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlock); 1384 1385 //Interfaces different cross static and dynmaic mode 1386 1387 //! 1388 //! \brief Extends the dynamic state heap 1389 //! \details Allocates a dynamic state heap (ISH/DSH) with requested size 1390 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1391 //! [in] State heap type (i.e. ISH/DSH) 1392 //! \param uint32_t dwSizeRequested 1393 //! [in] Size of requested state heap 1394 //! \return MOS_STATUS 1395 //! SUCCESS if state heap was successfully allocated 1396 //! 1397 MOS_STATUS ExtendStateHeapDyn( 1398 MHW_STATE_HEAP_TYPE StateHeapType, 1399 uint32_t dwSizeRequested); 1400 1401 //! 1402 //! \brief Extends the dynamic state heap 1403 //! \details Allocates a dynamic state heap (ISH/DSH) with requested size 1404 //! \param MHW_STATE_HEAP_TYPE StateHeapType 1405 //! [in] State heap type (i.e. ISH/DSH) 1406 //! \param uint32_t dwSizeRequested 1407 //! [in] Size of requested state heap 1408 //! \return MOS_STATUS 1409 //! SUCCESS if state heap was successfully allocated 1410 //! 1411 MOS_STATUS ExtendStateHeapSta( 1412 MHW_STATE_HEAP_TYPE StateHeapType, 1413 uint32_t dwSizeRequested); 1414 1415 }; 1416 1417 struct _MHW_STATE_HEAP_INTERFACE 1418 { 1419 1420 XMHW_STATE_HEAP_INTERFACE *pStateHeapInterface; 1421 1422 //! 1423 //! \brief Internal to MHW 1424 //! 1425 1426 MOS_STATUS (*pfnCreate) ( 1427 PMHW_STATE_HEAP_INTERFACE *ppStateHeapInterface, 1428 MHW_STATE_HEAP_SETTINGS StateHeapSettings); 1429 1430 MOS_STATUS (*pfnDestroy) ( 1431 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface); 1432 1433 //! 1434 //! \brief Primarily a state heap interface private function to be 1435 //! called as a pair in any state heap interface function which 1436 //! accesses the graphics resource like AddDataToStateHeap. 1437 //! 1438 MOS_STATUS (*pfnLockStateHeap) ( 1439 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1440 PMHW_STATE_HEAP pStateHeap); 1441 1442 MOS_STATUS (*pfnUnlockStateHeap) ( 1443 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1444 PMHW_STATE_HEAP pStateHeap); 1445 1446 //! 1447 //! \brief Client facing functions 1448 //! 1449 MOS_STATUS (*pfnAssignSpaceInStateHeap) ( 1450 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1451 MHW_STATE_HEAP_TYPE StateHeapType, 1452 PMHW_KERNEL_STATE pKernelState, 1453 uint32_t dwSpaceRequested, 1454 bool bStatic, 1455 bool bZeroAssignedMem); 1456 1457 MOS_STATUS(*pfnSubmitBlocks) ( 1458 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1459 PMHW_KERNEL_STATE pKernelState); 1460 1461 MOS_STATUS (*pfnExtendStateHeap) ( 1462 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1463 MHW_STATE_HEAP_TYPE StateHeapType, 1464 uint32_t dwSizeRequested); 1465 1466 MOS_STATUS (*pfnSetInterfaceDescriptor) ( 1467 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1468 uint32_t dwNumIdsToSet, 1469 PMHW_INTERFACE_DESCRIPTOR_PARAMS pParams); 1470 1471 MOS_STATUS (*pfnSetInterfaceDescriptorEntry) ( 1472 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1473 PMHW_ID_ENTRY_PARAMS pParams); 1474 1475 MOS_STATUS(*pfnSetBindingTable) ( 1476 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1477 PMHW_KERNEL_STATE pKernelState); 1478 1479 MOS_STATUS (*pfnSetSurfaceState) ( 1480 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1481 PMHW_KERNEL_STATE pKernelState, 1482 PMOS_COMMAND_BUFFER pCmdBuffer, 1483 uint32_t dwNumSurfaceStatesToSet, 1484 PMHW_RCS_SURFACE_PARAMS pParams); 1485 1486 MOS_STATUS (*pfnSetSurfaceStateBuffer) ( 1487 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1488 PMHW_RCS_SURFACE_PARAMS pParams, 1489 void *pSurfaceState); 1490 1491 MOS_STATUS (*pfnSetBindingTableEntry) ( 1492 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1493 PMHW_BINDING_TABLE_PARAMS pParams); 1494 1495 MOS_STATUS (*pfnSendBindingTableEntry) ( 1496 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1497 PMHW_BINDING_TABLE_SEND_PARAMS pParams); 1498 1499 MOS_STATUS (* pfnSetSurfaceStateToken) ( 1500 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1501 PMHW_SURFACE_TOKEN_PARAMS pParams, 1502 void *pSurfaceStateToken); 1503 1504 MOS_STATUS (*pfnSetSurfaceStateEntry) ( 1505 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1506 PMHW_SURFACE_STATE_PARAMS pParams); 1507 1508 MOS_STATUS (*pfnSendSurfaceStateEntry) ( 1509 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1510 PMOS_COMMAND_BUFFER pCmdBuffer, 1511 PMHW_SURFACE_STATE_SEND_PARAMS pParams); 1512 1513 //! 1514 //! \brief May only operate on the primary state heap. 1515 //! 1516 MOS_STATUS (*pfnCompactStateHeap) ( 1517 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1518 MHW_STATE_HEAP_TYPE StateHeapType); 1519 1520 //! 1521 //! \brief Must be called by the client directly to provide 1522 //! pointer for command buffer status for tracking purposes. 1523 //! 1524 MOS_STATUS(*pfnSetCmdBufStatusPtr) ( 1525 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1526 void *pvCmdBufStatus); 1527 1528 //! 1529 //! \brief Must be called by the client directly after a command 1530 //! buffer containing a kernel workload is submitted. 1531 //! 1532 MOS_STATUS(*pfnUpdateGlobalCmdBufId) ( 1533 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface); 1534 1535 //! 1536 //! \brief Must be called by the client before the client gets a 1537 //! command buffer for a kernel workload from MOS. This function 1538 //! will resize the SSH the current size is < dwBtEntriesRequested, 1539 //! otherwise it does nothing. In the future when SSHes are 1540 //! managed entirely in UMD this function may be deprecated and 1541 //! the SSH may be treated like the 1542 //! other state heaps. 1543 //! 1544 MOS_STATUS (*pfnRequestSshSpaceForCmdBuf) ( 1545 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1546 uint32_t dwBtEntriesRequested); 1547 1548 MOS_STATUS (*pfnCalculateSshAndBtSizesRequested) ( 1549 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1550 uint32_t dwBtEntriesRequested, 1551 uint32_t *pdwSshSize, 1552 uint32_t *pdwBtSize); 1553 1554 MOS_STATUS(* pfnInitSamplerStates) ( 1555 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1556 void *pSampler, 1557 int32_t iSamplers); 1558 1559 MOS_STATUS (* pfnSetSamplerState) ( 1560 PMHW_STATE_HEAP_INTERFACE pCommonStateHeapInterface, 1561 void *pSampler, 1562 PMHW_SAMPLER_STATE_PARAM pParams); 1563 1564 //Interfaces in dynamic mode 1565 uint32_t (*pfnCalculateDynamicSpaceNeeded) ( 1566 PMHW_STATE_HEAP_INTERFACE pStateHeapInterface, 1567 MHW_STATE_HEAP_TYPE StateHeapType, 1568 PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS pParams); 1569 1570 PMHW_STATE_HEAP_MEMORY_BLOCK (*pfnAllocateDynamicBlock) ( 1571 PMHW_STATE_HEAP_INTERFACE pStateHeapInterface, 1572 MHW_STATE_HEAP_TYPE StateHeapType, 1573 PMHW_STATE_HEAP_DYNAMIC_ALLOC_PARAMS pParams); 1574 1575 MOS_STATUS (*pfnSubmitDynamicBlock) ( 1576 PMHW_STATE_HEAP_INTERFACE pStateHeapInterface, 1577 MHW_STATE_HEAP_TYPE StateHeapType, 1578 PMHW_STATE_HEAP_MEMORY_BLOCK pBlock, 1579 FrameTrackerTokenFlat *trackerToken); 1580 1581 MOS_STATUS (*pfnFreeDynamicBlock) ( 1582 PMHW_STATE_HEAP_INTERFACE pStateHeapInterface, 1583 MHW_STATE_HEAP_TYPE StateHeapType, 1584 PMHW_STATE_HEAP_MEMORY_BLOCK pBlock); 1585 1586 MOS_STATUS (*pfnRefreshDynamicHeap) ( 1587 PMHW_STATE_HEAP_INTERFACE pStateHeapInterface, 1588 MHW_STATE_HEAP_TYPE StateHeapType); 1589 1590 MOS_STATUS (*pfnReleaseStateHeap) ( 1591 PMHW_STATE_HEAP_INTERFACE pStateHeapInterface, 1592 PMHW_STATE_HEAP pStateHeap); 1593 1594 }; 1595 1596 MOS_STATUS Mhw_StateHeapInterface_InitInterface( 1597 PMHW_STATE_HEAP_INTERFACE *ppCommonStateHeapInterface, 1598 PMOS_INTERFACE pOsInterface, 1599 uint8_t bDynamicMode 1600 ); 1601 1602 extern const uint8_t g_cMhw_VDirection[MHW_NUM_FRAME_FIELD_TYPES]; 1603 1604 #endif // __MHW_STATE_HEAP_H__ 1605