Home
last modified time | relevance | path

Searched defs:MI_STATE_INSTRUCTION_CACHE_FLUSH (Results 1 – 9 of 9) sorted by relevance

/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/sna/
H A Dsna_reg.h12 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/graphics/cairo/cairo-1.17.4/src/drm/
H A Dcairo-drm-intel-command-private.h52 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/www/firefox-esr/firefox-91.8.0/gfx/cairo/cairo/src/drm/
H A Dcairo-drm-intel-command-private.h52 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/www/firefox/firefox-99.0/gfx/cairo/cairo/src/drm/
H A Dcairo-drm-intel-command-private.h52 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/mail/thunderbird/thunderbird-91.8.0/gfx/cairo/cairo/src/drm/
H A Dcairo-drm-intel-command-private.h52 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/xvmc/
H A Di830_reg.h41 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/
H A Di830_reg.h41 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/legacy/i810/
H A Di810_reg.h2545 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro
/dports/graphics/intel-backlight/intel_backlight_fbsd-a6c0e39/
H A Dintel_reg.h2778 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) macro