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Searched defs:MMC_TIMING_MMC_DDR52 (Results 1 – 25 of 71) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c62 #define MMC_TIMING_MMC_DDR52 7 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c62 #define MMC_TIMING_MMC_DDR52 7 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c62 #define MMC_TIMING_MMC_DDR52 7 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c62 #define MMC_TIMING_MMC_DDR52 7 macro
/dports/sysutils/u-boot-tools/u-boot-2020.07/board/xilinx/zynqmp/
H A Dtap_delays.c63 #define MMC_TIMING_MMC_DDR52 7 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c62 #define MMC_TIMING_MMC_DDR52 7 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/mmc/
H A Dxenon_sdhci.c104 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/mmc/
H A Dxenon_sdhci.c104 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/mmc/
H A Dxenon_sdhci.c104 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/mmc/
H A Dxenon_sdhci.c104 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-tools/u-boot-2020.07/drivers/mmc/
H A Dxenon_sdhci.c106 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/mmc/
H A Dxenon_sdhci.c104 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/multimedia/libv4l/linux-5.13-rc2/include/linux/mmc/
H A Dhost.h61 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/mmc/
H A Dhost.h61 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/mmc/
H A Dhost.h61 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/
H A Dmmc.h373 #define MMC_TIMING_MMC_DDR52 8 macro

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