xref: /openbsd/sys/arch/armv7/marvell/mvahci.c (revision 9fdf0c62)
1 /* $OpenBSD: mvahci.c,v 1.2 2021/10/24 17:52:27 mpi Exp $ */
2 /*
3  * Copyright (c) 2013,2017 Patrick Wildt <patrick@blueri.se>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #include <sys/types.h>
19 #include <sys/systm.h>
20 #include <sys/device.h>
21 #include <sys/mutex.h>
22 
23 #include <machine/bus.h>
24 #include <machine/fdt.h>
25 
26 #include <armv7/marvell/mvmbusvar.h>
27 
28 #include <dev/ic/ahcireg.h>
29 #include <dev/ic/ahcivar.h>
30 
31 #include <dev/ofw/openfirm.h>
32 #include <dev/ofw/ofw_clock.h>
33 #include <dev/ofw/fdt.h>
34 
35 #define MVAHCI_READ(sc, reg) \
36 	bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))
37 #define MVAHCI_WRITE(sc, reg, val) \
38 	bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
39 
40 #define MVAHCI_NWINDOW			4
41 #define MVAHCI_WINDOW_CTRL(x)		(0x60 + ((x) << 4))
42 #define MVAHCI_WINDOW_BASE(x)		(0x64 + ((x) << 4))
43 #define MVAHCI_WINDOW_SIZE(x)		(0x68 + ((x) << 4))
44 
45 #define MVAHCI_TARGET(target)		(((target) & 0xf) << 4)
46 #define MVAHCI_ATTR(attr)		(((attr) & 0xff) << 8)
47 #define MVAHCI_BASEADDR(base)		((base) >> 16)
48 #define MVAHCI_SIZE(size)		(((size) - 1) & 0xffff0000)
49 #define MVAHCI_WINEN			(1 << 0)
50 
51 void	mvahci_wininit(struct ahci_softc *);
52 
53 int	mvahci_match(struct device *, void *, void *);
54 void	mvahci_attach(struct device *, struct device *, void *);
55 int	mvahci_detach(struct device *, int);
56 int	mvahci_activate(struct device *, int);
57 
58 extern int ahci_intr(void *);
59 
60 const struct cfattach mvahci_ca = {
61 	sizeof(struct ahci_softc),
62 	mvahci_match,
63 	mvahci_attach,
64 	mvahci_detach,
65 	mvahci_activate
66 };
67 
68 struct cfdriver mvahci_cd = {
69 	NULL, "mvahci", DV_DULL
70 };
71 
72 void
mvahci_wininit(struct ahci_softc * sc)73 mvahci_wininit(struct ahci_softc *sc)
74 {
75 	int i;
76 
77 	if (mvmbus_dram_info == NULL)
78 		panic("%s: mbus dram information not set up", __func__);
79 
80 	for (i = 0; i < MVAHCI_NWINDOW; i++) {
81 		MVAHCI_WRITE(sc, MVAHCI_WINDOW_CTRL(i), 0);
82 		MVAHCI_WRITE(sc, MVAHCI_WINDOW_BASE(i), 0);
83 		MVAHCI_WRITE(sc, MVAHCI_WINDOW_SIZE(i), 0);
84 	}
85 
86 	for (i = 0; i < mvmbus_dram_info->numcs; i++) {
87 		struct mbus_dram_window *win = &mvmbus_dram_info->cs[i];
88 
89 		MVAHCI_WRITE(sc, MVAHCI_WINDOW_CTRL(i),
90 		    MVAHCI_WINEN |
91 		    MVAHCI_TARGET(mvmbus_dram_info->targetid) |
92 		    MVAHCI_ATTR(win->attr));
93 		MVAHCI_WRITE(sc, MVAHCI_WINDOW_BASE(i),
94 		    MVAHCI_BASEADDR(win->base));
95 		MVAHCI_WRITE(sc, MVAHCI_WINDOW_SIZE(i),
96 		    MVAHCI_SIZE(win->size));
97 	}
98 }
99 
100 int
mvahci_match(struct device * parent,void * match,void * aux)101 mvahci_match(struct device *parent, void *match, void *aux)
102 {
103 	struct fdt_attach_args *faa = aux;
104 
105 	return OF_is_compatible(faa->fa_node, "marvell,armada-380-ahci");
106 }
107 
108 void
mvahci_attach(struct device * parent,struct device * self,void * aux)109 mvahci_attach(struct device *parent, struct device *self, void *aux)
110 {
111 	struct ahci_softc *sc = (struct ahci_softc *)self;
112 	struct fdt_attach_args *faa = aux;
113 
114 	if (faa->fa_nreg < 1)
115 		return;
116 
117 	sc->sc_iot = faa->fa_iot;
118 	sc->sc_ios = faa->fa_reg[0].size;
119 	sc->sc_dmat = faa->fa_dmat;
120 
121 	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
122 	    faa->fa_reg[0].size, 0, &sc->sc_ioh))
123 		panic("mvahci_attach: bus_space_map failed!");
124 
125 	clock_enable_all(faa->fa_node);
126 	reset_deassert_all(faa->fa_node);
127 
128 	sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_BIO,
129 	    ahci_intr, sc, sc->sc_dev.dv_xname);
130 	if (sc->sc_ih == NULL) {
131 		printf(": unable to establish interrupt\n");
132 		goto unmap;
133 	}
134 
135 	/* Set up MBUS windows. */
136 	mvahci_wininit(sc);
137 
138 	printf(":");
139 
140 	if (ahci_attach(sc) != 0) {
141 		/* error printed by ahci_attach */
142 		goto irq;
143 	}
144 
145 	return;
146 irq:
147 	arm_intr_disestablish_fdt(sc->sc_ih);
148 unmap:
149 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
150 }
151 
152 int
mvahci_detach(struct device * self,int flags)153 mvahci_detach(struct device *self, int flags)
154 {
155 	struct ahci_softc *sc = (struct ahci_softc *)self;
156 
157 	ahci_detach(sc, flags);
158 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
159 	return 0;
160 }
161 
162 int
mvahci_activate(struct device * self,int act)163 mvahci_activate(struct device *self, int act)
164 {
165 	struct ahci_softc *sc = (struct ahci_softc *)self;
166 
167 	return ahci_activate((struct device *)sc, act);
168 }
169