Searched defs:MatchInfo (Results 1 – 10 of 10) sorted by relevance
/openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 835 MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo) { in matchSextInRegOfLoad() 887 MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo) { in applySextInRegOfLoad() 1040 IndexedLoadStoreMatchInfo MatchInfo; in tryCombineIndexedLoadStore() local 1070 MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo) { in applyCombineIndexedLoadStore() 2235 MachineInstr &MI, std::pair<Register, unsigned> &MatchInfo) { in matchCombineTruncOfExt() 2646 MachineInstr &MI, SmallVectorImpl<Register> &MatchInfo) { in matchCombineInsertVecElts() 2687 MachineInstr &MI, SmallVectorImpl<Register> &MatchInfo) { in applyCombineInsertVecElts() 2715 MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo) { in matchHoistLogicOpWithSameOpcodeHands() 2806 MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo) { in applyBuildInstructionSteps() 4667 BuildFnTy &MatchInfo) { in matchReassocPtrAdd() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerLowering.cpp | 223 ShuffleVectorPseudo &MatchInfo) { in matchREV() 252 ShuffleVectorPseudo &MatchInfo) { in matchTRN() 273 ShuffleVectorPseudo &MatchInfo) { in matchUZP() 289 ShuffleVectorPseudo &MatchInfo) { in matchZip() 346 ShuffleVectorPseudo &MatchInfo) { in matchDupFromBuildVector() 361 ShuffleVectorPseudo &MatchInfo) { in matchDup() 407 ShuffleVectorPseudo &MatchInfo) { in matchEXT() 439 ShuffleVectorPseudo &MatchInfo) { in applyShuffleVectorPseudo() 449 static bool applyEXT(MachineInstr &MI, ShuffleVectorPseudo &MatchInfo) { in applyEXT() 660 std::pair<uint64_t, CmpInst::Predicate> &MatchInfo) { in matchAdjustICmpImmAndPred() [all …]
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H A D | AArch64PreLegalizerCombiner.cpp | 66 GISelKnownBits *KB, Register &MatchInfo) { in matchICmpRedundantTrunc() 118 std::pair<uint64_t, uint64_t> &MatchInfo) { in matchFoldGlobalOffset() argument 187 std::pair<uint64_t, uint64_t> &MatchInfo) { in applyFoldGlobalOffset() argument
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H A D | AArch64PostLegalizerCombiner.cpp | 55 std::tuple<unsigned, LLT, Register> &MatchInfo) { in matchExtractVecEltPairwiseAdd() 98 std::tuple<unsigned, LLT, Register> &MatchInfo) { in applyExtractVecEltPairwiseAdd()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUCombinerHelper.cpp | 185 MachineInstr *&MatchInfo) { in matchFoldableFneg() 251 MachineInstr *&MatchInfo) { in applyFoldableFneg()
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H A D | AMDGPUPostLegalizerCombiner.cpp | 206 MachineInstr &MI, std::function<void(MachineIRBuilder &)> &MatchInfo) { in matchRcpSqrtToRsq() 250 MachineInstr &MI, CvtF32UByteMatchInfo &MatchInfo) { in matchCvtF32UByteN() 278 MachineInstr &MI, const CvtF32UByteMatchInfo &MatchInfo) { in applyCvtF32UByteN()
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H A D | AMDGPURegBankCombiner.cpp | 151 MachineInstr &MI, Med3MatchInfo &MatchInfo) { in matchIntMinMaxToMed3() 197 MachineInstr &MI, Med3MatchInfo &MatchInfo) { in matchFPMinMaxToMed3() 322 Med3MatchInfo &MatchInfo) { in applyMed3()
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H A D | AMDGPUPreLegalizerCombiner.cpp | 62 ClampI64ToI16MatchInfo &MatchInfo) { in matchClampI64ToI16() 122 MachineInstr &MI, const ClampI64ToI16MatchInfo &MatchInfo) { in applyClampI64ToI16()
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/openbsd/gnu/llvm/llvm/lib/DebugInfo/LogicalView/Core/ |
H A D | LVOptions.cpp | 506 bool LVPatterns::matchPattern(StringRef Input, const LVMatchInfo &MatchInfo) { in matchPattern()
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/openbsd/gnu/llvm/llvm/lib/FileCheck/ |
H A D | FileCheck.cpp | 1294 SmallVector<StringRef, 4> MatchInfo; in match() local
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