1 /** 2 * \file 3 * Copyright 2011 Xamarin Inc 4 * Licensed under the MIT license. See LICENSE file in the project root for full license information. 5 */ 6 7 #ifndef __MONO_MINI_ARM_H__ 8 #define __MONO_MINI_ARM_H__ 9 10 #include <mono/arch/arm/arm-codegen.h> 11 #include <mono/utils/mono-context.h> 12 #include <glib.h> 13 14 #if defined(ARM_FPU_NONE) 15 #define MONO_ARCH_SOFT_FLOAT_FALLBACK 1 16 #endif 17 18 #if defined(__ARM_EABI__) 19 #if G_BYTE_ORDER == G_LITTLE_ENDIAN 20 #define ARM_ARCHITECTURE "armel" 21 #else 22 #define ARM_ARCHITECTURE "armeb" 23 #endif 24 #else 25 #define ARM_ARCHITECTURE "arm" 26 #endif 27 28 #if defined(ARM_FPU_VFP) 29 #define ARM_FP_MODEL "vfp" 30 #elif defined(ARM_FPU_NONE) 31 #define ARM_FP_MODEL "vfp+fallback" 32 #elif defined(ARM_FPU_VFP_HARD) 33 #define ARM_FP_MODEL "vfp+hard" 34 #else 35 #error "At least one of ARM_FPU_NONE, ARM_FPU_VFP or ARM_FPU_VFP_HARD must be defined." 36 #endif 37 38 #define MONO_ARCH_ARCHITECTURE ARM_ARCHITECTURE "," ARM_FP_MODEL 39 40 #define MONO_ARCH_CPU_SPEC mono_arm_cpu_desc 41 42 #if G_BYTE_ORDER == G_LITTLE_ENDIAN 43 #define ARM_LSW_REG ARMREG_R0 44 #define ARM_MSW_REG ARMREG_R1 45 #else 46 #define ARM_LSW_REG ARMREG_R1 47 #define ARM_MSW_REG ARMREG_R0 48 #endif 49 50 #define MONO_MAX_IREGS 16 51 52 #define MONO_SAVED_GREGS 10 /* r4-r11, ip, lr */ 53 54 /* r4-r11, ip, lr: registers saved in the LMF */ 55 #define MONO_ARM_REGSAVE_MASK 0x5ff0 56 #define MONO_ARM_FIRST_SAVED_REG ARMREG_R4 57 #define MONO_ARM_NUM_SAVED_REGS 10 58 59 /* Parameters used by the register allocator */ 60 61 #define MONO_ARCH_CALLEE_REGS ((1<<ARMREG_R0) | (1<<ARMREG_R1) | (1<<ARMREG_R2) | (1<<ARMREG_R3) | (1<<ARMREG_IP)) 62 #define MONO_ARCH_CALLEE_SAVED_REGS ((1<<ARMREG_V1) | (1<<ARMREG_V2) | (1<<ARMREG_V3) | (1<<ARMREG_V4) | (1<<ARMREG_V5) | (1<<ARMREG_V6) | (1<<ARMREG_V7)) 63 64 /* 65 * TODO: Make use of VFP v3 registers d16-d31. 66 */ 67 68 /* 69 * TODO: We can't use registers d8-d15 in hard float mode because the 70 * register allocator doesn't allocate floating point registers globally. 71 */ 72 73 #if defined(ARM_FPU_VFP_HARD) 74 #define MONO_SAVED_FREGS 16 75 #define MONO_MAX_FREGS 32 76 77 /* 78 * d8-d15 must be preserved across function calls. We use d14-d15 as 79 * scratch registers in the JIT. The rest have no meaning tied to them. 80 */ 81 #define MONO_ARCH_CALLEE_FREGS 0x00005555 82 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x55550000 83 #else 84 #define MONO_SAVED_FREGS 8 85 #define MONO_MAX_FREGS 16 86 87 /* 88 * No registers need to be preserved across function calls. We use d0-d1 89 * as scratch registers in the JIT. The rest have no meaning tied to them. 90 */ 91 #define MONO_ARCH_CALLEE_FREGS 0x55555550 92 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x00000000 93 #endif 94 95 #define MONO_ARCH_USE_FPSTACK FALSE 96 #define MONO_ARCH_FPSTACK_SIZE 0 97 98 #define MONO_ARCH_INST_SREG2_MASK(ins) (0) 99 100 #define MONO_ARCH_INST_FIXED_REG(desc) \ 101 (mono_arch_is_soft_float () ? \ 102 ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1) : \ 103 ((desc) == 'l' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1)) 104 105 #define MONO_ARCH_INST_IS_REGPAIR(desc) \ 106 (mono_arch_is_soft_float () ? \ 107 ((desc) == 'l' || (desc) == 'L' || (desc) == 'f' || (desc) == 'g') : \ 108 ((desc) == 'l' || (desc) == 'L')) 109 110 #define MONO_ARCH_INST_IS_FLOAT(desc) \ 111 (mono_arch_is_soft_float () ? \ 112 (FALSE) : \ 113 ((desc) == 'f' || (desc) == 'g')) 114 115 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_MSW_REG : -1) 116 117 #ifdef TARGET_WATCHOS 118 #define MONO_ARCH_FRAME_ALIGNMENT 16 119 #else 120 #define MONO_ARCH_FRAME_ALIGNMENT 8 121 #endif 122 123 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get 124 * reproduceable results for benchmarks */ 125 #define MONO_ARCH_CODE_ALIGNMENT 32 126 127 /* This needs to hold both a 32 bit int and a 64 bit double */ 128 #define mono_unwind_reg_t guint64 129 130 /* Argument marshallings for calls between gsharedvt and normal code */ 131 typedef enum { 132 GSHAREDVT_ARG_NONE = 0, 133 GSHAREDVT_ARG_BYVAL_TO_BYREF = 1, 134 GSHAREDVT_ARG_BYREF_TO_BYVAL = 2, 135 GSHAREDVT_ARG_BYREF_TO_BYVAL_I1 = 3, 136 GSHAREDVT_ARG_BYREF_TO_BYVAL_I2 = 4, 137 GSHAREDVT_ARG_BYREF_TO_BYVAL_U1 = 5, 138 GSHAREDVT_ARG_BYREF_TO_BYVAL_U2 = 6 139 } GSharedVtArgMarshal; 140 141 /* Return value marshalling for calls between gsharedvt and normal code */ 142 typedef enum { 143 GSHAREDVT_RET_NONE = 0, 144 GSHAREDVT_RET_IREG = 1, 145 GSHAREDVT_RET_IREGS = 2, 146 GSHAREDVT_RET_I1 = 3, 147 GSHAREDVT_RET_U1 = 4, 148 GSHAREDVT_RET_I2 = 5, 149 GSHAREDVT_RET_U2 = 6, 150 GSHAREDVT_RET_VFP_R4 = 7, 151 GSHAREDVT_RET_VFP_R8 = 8 152 } GSharedVtRetMarshal; 153 154 typedef struct { 155 /* Method address to call */ 156 gpointer addr; 157 /* The trampoline reads this, so keep the size explicit */ 158 int ret_marshal; 159 /* If ret_marshal != NONE, this is the reg of the vret arg, else -1 */ 160 int vret_arg_reg; 161 /* The stack slot where the return value will be stored */ 162 int vret_slot; 163 int stack_usage, map_count; 164 /* If not -1, then make a virtual call using this vtable offset */ 165 int vcall_offset; 166 /* If 1, make an indirect call to the address in the rgctx reg */ 167 int calli; 168 /* Whenever this is a in or an out call */ 169 int gsharedvt_in; 170 /* Whenever this call uses fp registers */ 171 int have_fregs; 172 gpointer caller_cinfo, callee_cinfo; 173 /* Maps stack slots/registers in the caller to the stack slots/registers in the callee */ 174 /* A negative value means a register, i.e. -1=r0, -2=r1 etc. */ 175 int map [MONO_ZERO_LEN_ARRAY]; 176 } GSharedVtCallInfo; 177 178 179 typedef enum { 180 RegTypeNone, 181 /* Passed/returned in an ireg */ 182 RegTypeGeneral, 183 /* Passed/returned in a pair of iregs */ 184 RegTypeIRegPair, 185 /* Passed on the stack */ 186 RegTypeBase, 187 /* First word in r3, second word on the stack */ 188 RegTypeBaseGen, 189 /* FP value passed in either an ireg or a vfp reg */ 190 RegTypeFP, 191 /* Struct passed/returned in gregs */ 192 RegTypeStructByVal, 193 RegTypeStructByAddr, 194 RegTypeStructByAddrOnStack, 195 /* gsharedvt argument passed by addr in greg */ 196 RegTypeGSharedVtInReg, 197 /* gsharedvt argument passed by addr on stack */ 198 RegTypeGSharedVtOnStack, 199 RegTypeHFA 200 } ArgStorage; 201 202 typedef struct { 203 gint32 offset; 204 guint16 vtsize; /* in param area */ 205 /* RegTypeHFA */ 206 int esize; 207 /* RegTypeHFA/RegTypeStructByVal */ 208 int nregs; 209 guint8 reg; 210 ArgStorage storage; 211 /* RegTypeStructByVal */ 212 gint32 struct_size, align; 213 guint8 size : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */ 214 } ArgInfo; 215 216 typedef struct { 217 int nargs; 218 guint32 stack_usage; 219 /* The index of the vret arg in the argument list for RegTypeStructByAddr */ 220 int vret_arg_index; 221 ArgInfo ret; 222 ArgInfo sig_cookie; 223 ArgInfo args [1]; 224 } CallInfo; 225 226 /* Structure used by the sequence points in AOTed code */ 227 typedef struct { 228 gpointer ss_trigger_page; 229 gpointer bp_trigger_page; 230 gpointer ss_tramp_addr; 231 guint8* bp_addrs [MONO_ZERO_LEN_ARRAY]; 232 } SeqPointInfo; 233 234 235 #define PARAM_REGS 4 236 #define FP_PARAM_REGS 8 237 238 typedef struct { 239 double fpregs [FP_PARAM_REGS]; 240 mgreg_t res, res2; 241 guint8 *ret; 242 guint32 has_fpregs; 243 guint32 n_stackargs; 244 /* This should come last as the structure is dynamically extended */ 245 mgreg_t regs [PARAM_REGS]; 246 } DynCallArgs; 247 248 void arm_patch (guchar *code, const guchar *target); 249 guint8* mono_arm_emit_load_imm (guint8 *code, int dreg, guint32 val); 250 int mono_arm_is_rotated_imm8 (guint32 val, gint *rot_amount); 251 252 void 253 mono_arm_throw_exception_by_token (guint32 type_token, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs); 254 255 gpointer 256 mono_arm_start_gsharedvt_call (GSharedVtCallInfo *info, gpointer *caller, gpointer *callee, gpointer mrgctx_reg, double *caller_fregs, double *callee_fregs); 257 258 typedef enum { 259 MONO_ARM_FPU_NONE = 0, 260 MONO_ARM_FPU_VFP = 1, 261 MONO_ARM_FPU_VFP_HARD = 2 262 } MonoArmFPU; 263 264 /* keep the size of the structure a multiple of 8 */ 265 struct MonoLMF { 266 /* 267 * If the second lowest bit is set to 1, then this is a MonoLMFExt structure, and 268 * the other fields are not valid. 269 */ 270 gpointer previous_lmf; 271 gpointer lmf_addr; 272 /* This is only set in trampoline LMF frames */ 273 MonoMethod *method; 274 mgreg_t sp; 275 mgreg_t ip; 276 mgreg_t fp; 277 /* Currently only used in trampolines on armhf to hold d0-d15. We don't really 278 * need to put d0-d7 in the LMF, but it simplifies the trampoline code. 279 */ 280 double fregs [16]; 281 /* all but sp and pc: matches the PUSH instruction layout in the trampolines 282 * 0-4 should be considered undefined (execpt in the magic tramp) 283 * sp is saved at IP. 284 */ 285 mgreg_t iregs [14]; 286 }; 287 288 typedef struct MonoCompileArch { 289 gpointer seq_point_info_var, ss_trigger_page_var; 290 gpointer seq_point_ss_method_var; 291 gpointer seq_point_bp_method_var; 292 gpointer vret_addr_loc; 293 gboolean omit_fp, omit_fp_computed; 294 gpointer cinfo; 295 gpointer *vfp_scratch_slots [2]; 296 int atomic_tmp_offset; 297 guint8 *thunks; 298 int thunks_size; 299 } MonoCompileArch; 300 301 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1 302 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1 303 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1 304 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1 305 #define MONO_ARCH_EMULATE_FREM 1 306 #define MONO_ARCH_EMULATE_DIV 1 307 #define MONO_ARCH_EMULATE_CONV_R8_UN 1 308 #define MONO_ARCH_EMULATE_MUL_OVF 1 309 310 #define ARM_FIRST_ARG_REG 0 311 #define ARM_LAST_ARG_REG 3 312 313 #define MONO_ARCH_USE_SIGACTION 1 314 315 #if defined(HOST_WATCHOS) 316 #undef MONO_ARCH_USE_SIGACTION 317 #endif 318 319 #define MONO_ARCH_NEED_DIV_CHECK 1 320 321 #define MONO_ARCH_HAVE_GENERALIZED_IMT_TRAMPOLINE 1 322 323 #define MONO_ARCH_HAVE_FULL_AOT_TRAMPOLINES 1 324 #define MONO_ARCH_HAVE_DECOMPOSE_LONG_OPTS 1 325 326 #define MONO_ARCH_AOT_SUPPORTED 1 327 #define MONO_ARCH_LLVM_SUPPORTED 1 328 329 #define MONO_ARCH_GSHARED_SUPPORTED 1 330 #define MONO_ARCH_DYN_CALL_SUPPORTED 1 331 #define MONO_ARCH_DYN_CALL_PARAM_AREA 0 332 333 #if !(defined(TARGET_ANDROID) && defined(MONO_CROSS_COMPILE)) 334 #define MONO_ARCH_SOFT_DEBUG_SUPPORTED 1 335 #endif 336 337 #define MONO_ARCH_HAVE_EXCEPTIONS_INIT 1 338 #define MONO_ARCH_HAVE_GET_TRAMPOLINES 1 339 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1 340 #define MONO_ARCH_HAVE_SIGCTX_TO_MONOCTX 1 341 #define MONO_ARCH_GC_MAPS_SUPPORTED 1 342 #define MONO_ARCH_HAVE_SETUP_ASYNC_CALLBACK 1 343 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1 344 #define MONO_ARCH_HAVE_SETUP_RESUME_FROM_SIGNAL_HANDLER_CTX 1 345 #define MONO_ARCH_GSHAREDVT_SUPPORTED 1 346 #define MONO_ARCH_HAVE_GENERAL_RGCTX_LAZY_FETCH_TRAMPOLINE 1 347 #define MONO_ARCH_HAVE_OPCODE_NEEDS_EMULATION 1 348 #define MONO_ARCH_HAVE_OBJC_GET_SELECTOR 1 349 #define MONO_ARCH_HAVE_OP_TAIL_CALL 1 350 #define MONO_ARCH_HAVE_DUMMY_INIT 1 351 #define MONO_ARCH_HAVE_SDB_TRAMPOLINES 1 352 #define MONO_ARCH_HAVE_PATCH_CODE_NEW 1 353 #define MONO_ARCH_HAVE_OP_GENERIC_CLASS_INIT 1 354 355 #if defined(TARGET_WATCHOS) || (defined(__linux__) && !defined(TARGET_ANDROID)) 356 #define MONO_ARCH_DISABLE_HW_TRAPS 1 357 #define MONO_ARCH_HAVE_UNWIND_BACKTRACE 1 358 #endif 359 360 /* ARM doesn't have too many registers, so we have to use a callee saved one */ 361 #define MONO_ARCH_RGCTX_REG ARMREG_V5 362 #define MONO_ARCH_IMT_REG MONO_ARCH_RGCTX_REG 363 /* First argument reg */ 364 #define MONO_ARCH_VTABLE_REG ARMREG_R0 365 #define MONO_ARCH_EXC_REG ARMREG_R0 366 367 #define MONO_CONTEXT_SET_LLVM_EXC_REG(ctx, exc) do { (ctx)->regs [0] = (gsize)exc; } while (0) 368 369 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do { \ 370 MONO_CONTEXT_SET_BP ((ctx), __builtin_frame_address (0)); \ 371 MONO_CONTEXT_SET_SP ((ctx), __builtin_frame_address (0)); \ 372 MONO_CONTEXT_SET_IP ((ctx), (func)); \ 373 } while (0) 374 375 #define MONO_ARCH_INIT_TOP_LMF_ENTRY(lmf) 376 377 void 378 mono_arm_throw_exception (MonoObject *exc, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs); 379 380 void 381 mono_arm_throw_exception_by_token (guint32 type_token, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs); 382 383 void 384 mono_arm_resume_unwind (guint32 dummy1, mgreg_t pc, mgreg_t sp, mgreg_t *int_regs, gdouble *fp_regs); 385 386 gboolean 387 mono_arm_thumb_supported (void); 388 389 gboolean 390 mono_arm_eabi_supported (void); 391 392 int 393 mono_arm_i8_align (void); 394 395 GSList* 396 mono_arm_get_exception_trampolines (gboolean aot); 397 398 guint8* 399 mono_arm_get_thumb_plt_entry (guint8 *code); 400 401 guint8* 402 mono_arm_patchable_b (guint8 *code, int cond); 403 404 guint8* 405 mono_arm_patchable_bl (guint8 *code, int cond); 406 407 gboolean 408 mono_arm_is_hard_float (void); 409 410 void 411 mono_arm_unaligned_stack (MonoMethod *method); 412 413 /* MonoJumpInfo **ji */ 414 guint8* 415 mono_arm_emit_aotconst (gpointer ji, guint8 *code, guint8 *buf, int dreg, int patch_type, gconstpointer data); 416 417 CallInfo* 418 mono_arch_get_call_info (MonoMemPool *mp, MonoMethodSignature *sig); 419 420 #endif /* __MONO_MINI_ARM_H__ */ 421