1 /** @file 2 HTE handling routines for MRC use. 3 4 Copyright (c) 2013-2015 Intel Corporation. 5 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 **/ 9 #ifndef __HTE_H 10 #define __HTE_H 11 12 #define STATIC static 13 #define VOID void 14 15 #if !defined(__GNUC__) && (__STDC_VERSION__ < 199901L) 16 typedef uint32_t UINT32; 17 typedef uint16_t UINT16; 18 typedef uint8_t UINT8; 19 #endif 20 21 typedef enum 22 { 23 MrcNoHaltSystemOnError, 24 MrcHaltSystemOnError, 25 MrcHaltHteEngineOnError, 26 MrcNoHaltHteEngineOnError 27 } HALT_TYPE; 28 29 typedef enum 30 { 31 MrcMemInit, MrcMemTest 32 } MEM_INIT_OR_TEST; 33 34 #define READ_TRAIN 1 35 #define WRITE_TRAIN 2 36 37 #define HTE_MEMTEST_NUM 2 38 #define HTE_LOOP_CNT 5 // EXP_LOOP_CNT field of HTE_CMD_CTL. This CANNOT be less than 4 39 #define HTE_LFSR_VICTIM_SEED 0xF294BA21 // Random seed for victim. 40 #define HTE_LFSR_AGRESSOR_SEED 0xEBA7492D // Random seed for aggressor. 41 UINT32 42 HteMemInit( 43 MRC_PARAMS *CurrentMrcData, 44 UINT8 MemInitFlag, 45 UINT8 HaltHteEngineOnError); 46 47 UINT16 48 BasicWriteReadHTE( 49 MRC_PARAMS *CurrentMrcData, 50 UINT32 Address, 51 UINT8 FirstRun, 52 UINT8 Mode); 53 54 UINT16 55 WriteStressBitLanesHTE( 56 MRC_PARAMS *CurrentMrcData, 57 UINT32 Address, 58 UINT8 FirstRun); 59 60 VOID 61 HteMemOp( 62 UINT32 Address, 63 UINT8 FirstRun, 64 UINT8 IsWrite); 65 66 #endif 67