1 /*========================== begin_copyright_notice ============================ 2 3 Copyright (C) 2017-2021 Intel Corporation 4 5 SPDX-License-Identifier: MIT 6 7 ============================= end_copyright_notice ===========================*/ 8 9 #ifndef TARGET_GENX_H 10 #define TARGET_GENX_H 11 12 #include "visa_igc_common_header.h" 13 #include "llvm/ADT/ArrayRef.h" 14 #include "llvm/ADT/SmallVector.h" 15 #include "llvm/ADT/StringRef.h" 16 #include "llvm/GenXIntrinsics/GenXIntrinsics.h" 17 #include "llvm/IR/DerivedTypes.h" 18 #include "llvm/IR/Instructions.h" 19 #include "llvm/IR/Intrinsics.h" 20 #include "llvm/IR/InlineAsm.h" 21 #include "llvm/Support/MathExtras.h" 22 #include "llvm/Support/raw_ostream.h" 23 #include "llvm/Analysis/LoopInfo.h" 24 25 #include "vc/Utils/GenX/TypeSize.h" 26 27 #include <string> 28 29 namespace llvm { 30 31 class BasicBlock; 32 class CallInst; 33 class Constant; 34 class DebugLoc; 35 class DominatorTree; 36 class formatted_raw_ostream; 37 class Function; 38 class FunctionGroup; 39 class FunctionPass; 40 class GenXSubtarget; 41 class Instruction; 42 class MDNode; 43 class ModulePass; 44 class ShuffleVectorInst; 45 class TargetOptions; 46 class Twine; 47 class Value; 48 class raw_ostream; 49 class raw_pwrite_stream; 50 51 enum BalingKind { 52 BK_Legalization, // build baling info for legalization 53 BK_CodeGen, // build baling info for the final vISA emission 54 BK_Analysis, // build baling info for analysis (register pressure) 55 }; 56 57 FunctionPass *createGenXPrinterPass(raw_ostream &O, const std::string &Banner); 58 ModulePass *createGenXGroupPrinterPass(raw_ostream &O, 59 const std::string &Banner); 60 FunctionPass *createGenXAnalysisDumperPass(FunctionPass *Analysis, 61 StringRef DumpNamePrefix, 62 StringRef DumpNameSuffix); 63 ModulePass *createGenXModuleAnalysisDumperPass(ModulePass *Analysis, 64 StringRef DumpNamePrefix, 65 StringRef DumpNameSuffix); 66 67 FunctionPass *createGenXCFSimplificationPass(); 68 ModulePass *createGenXEarlySimdCFConformancePass(); 69 FunctionPass *createGenXReduceIntSizePass(); 70 FunctionPass *createGenXInstCombineCleanup(); 71 FunctionPass *createGenXInlineAsmLoweringPass(); 72 FunctionPass *createGenXLoweringPass(); 73 FunctionPass *createGenXVectorCombinerPass(); 74 FunctionPass *createGenXLowerAggrCopiesPass(); 75 FunctionPass *createGenXLowerJmpTableSwitchPass(); 76 FunctionPass *createGenXGEPLoweringPass(); 77 FunctionPass *createGenXRegionCollapsingPass(); 78 FunctionPass *createGenXExtractVectorizerPass(); 79 FunctionPass *createGenXRawSendRipperPass(); 80 FunctionPass *createGenXFuncBalingPass(BalingKind Kind, GenXSubtarget *ST); 81 FunctionPass *createGenXPrologEpilogInsertionPass(); 82 FunctionPass *createGenXLegalizationPass(); 83 ModulePass *createGenXEmulatePass(); 84 ModulePass *createGenXEmulationImportPass(); 85 FunctionPass *createGenXDeadVectorRemovalPass(); 86 FunctionPass *createGenXPatternMatchPass(); 87 FunctionPass *createGenXPostLegalizationPass(); 88 FunctionPass *createTransformPrivMemPass(); 89 ModulePass *createGenXThreadPrivateMemoryPass(); 90 FunctionPass *createGenXPromotePredicatePass(); 91 FunctionPass *createGenXIMadPostLegalizationPass(); 92 FunctionPass *createGenXAggregatePseudoLoweringPass(); 93 ModulePass *createGenXModulePass(); 94 ModulePass *createGenXLateSimdCFConformanceWrapperPass(); 95 ModulePass *createGenXLivenessWrapperPass(); 96 FunctionPass *createGenXLoadStoreLoweringPass(); 97 ModulePass *createGenXFunctionPointersLoweringPass(); 98 ModulePass *createGenXCategoryWrapperPass(); 99 ModulePass *createGenXGroupBalingWrapperPass(BalingKind Kind, 100 GenXSubtarget *ST); 101 ModulePass *createGenXUnbalingWrapperPass(); 102 ModulePass *createGenXDepressurizerWrapperPass(); 103 ModulePass *createGenXLateLegalizationWrapperPass(); 104 ModulePass *createGenXNumberingWrapperPass(); 105 ModulePass *createGenXLiveRangesWrapperPass(bool DisableCoalescing = false); 106 ModulePass *createGenXRematerializationWrapperPass(); 107 ModulePass *createGenXCoalescingWrapperPass(); 108 ModulePass *createGenXAddressCommoningWrapperPass(); 109 ModulePass *createGenXArgIndirectionWrapperPass(); 110 FunctionPass *createGenXTidyControlFlowPass(); 111 ModulePass *createGenXVisaRegAllocWrapperPass(); 112 ModulePass *createGenXCisaBuilderWrapperPass(); 113 ModulePass *createGenXFinalizerPass(raw_pwrite_stream &o); 114 ModulePass *createGenXDebugInfoPass(); 115 ModulePass *createGenXGlobalValueLoweringPass(); 116 ModulePass *createGenXPromoteStatefulToBindlessPass(); 117 ModulePass *createGenXStackUsagePass(); 118 ModulePass *createGenXStructSplitterPass(); 119 120 namespace genx { 121 122 // A local encoding (not part of vISA or GenX) of whether an operand should be signed. 123 enum Signedness { 124 DONTCARESIGNED = 3, SIGNED = 1, UNSIGNED = 2 125 }; 126 constexpr unsigned BoolBits = vc::BoolBits; 127 constexpr unsigned ByteBits = vc::ByteBits; 128 constexpr unsigned WordBits = vc::WordBits; 129 constexpr unsigned DWordBits = vc::DWordBits; 130 constexpr unsigned QWordBits = vc::QWordBits; 131 constexpr unsigned OWordBits = vc::OWordBits; 132 133 constexpr unsigned ByteBytes = ByteBits / ByteBits; 134 constexpr unsigned WordBytes = WordBits / ByteBits; 135 constexpr unsigned DWordBytes = DWordBits / ByteBits; 136 constexpr unsigned QWordBytes = QWordBits / ByteBits; 137 constexpr unsigned OWordBytes = OWordBits / ByteBits; 138 139 constexpr unsigned SurfaceElementBytes = 4; 140 constexpr unsigned SamplerElementBytes = 4; 141 142 // Currently EM determines behavior of 32 lanes. 143 // Probably that should be moved to subtarget if 144 // different targets will support different EM sizes. 145 constexpr unsigned TotalEMSize = 32; 146 147 // vISA allows [-512,511] for operation to be baled as offset 148 // for rdregion, copied from visa 149 constexpr int G4_MAX_ADDR_IMM = 511; 150 constexpr int G4_MIN_ADDR_IMM = -512; 151 152 // Default GRF Width if subtarget is not available 153 constexpr unsigned defaultGRFByteSize = 32; 154 155 // describe integer vector immediate (V, UV) 156 enum ImmIntVec : int8_t { 157 Width = 8, // num elem in vector 158 ElemSize = 4, // in bits 159 MaxUInt = (1 << ElemSize) - 1, 160 MinUInt = 0, 161 MaxSInt = (1 << (ElemSize - 1)) - 1, 162 MinSInt = -(1 << (ElemSize - 1)) 163 }; 164 165 // Name of BSS predefined VISA variable represented as a global. 166 constexpr const char BSSVariableName[] = "llvm.genx.predefined.bss"; 167 168 } // End genx namespace 169 } // End llvm namespace 170 171 #endif 172